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GitHub Repository: PojavLauncherTeam/mobile
Path: blob/master/src/hotspot/cpu/aarch64/gc/shenandoah/c1/shenandoahBarrierSetC1_aarch64.cpp
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/*
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* Copyright (c) 2018, 2021, Red Hat, Inc. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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*
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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*
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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*
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* questions.
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*
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*/
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#include "precompiled.hpp"
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#include "c1/c1_LIRAssembler.hpp"
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#include "c1/c1_MacroAssembler.hpp"
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#include "gc/shared/gc_globals.hpp"
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#include "gc/shenandoah/shenandoahBarrierSet.hpp"
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#include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
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#include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
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#define __ masm->masm()->
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void LIR_OpShenandoahCompareAndSwap::emit_code(LIR_Assembler* masm) {
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Register addr = _addr->as_register_lo();
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Register newval = _new_value->as_register();
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Register cmpval = _cmp_value->as_register();
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Register tmp1 = _tmp1->as_register();
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Register tmp2 = _tmp2->as_register();
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Register result = result_opr()->as_register();
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ShenandoahBarrierSet::assembler()->iu_barrier(masm->masm(), newval, rscratch2);
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if (UseCompressedOops) {
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__ encode_heap_oop(tmp1, cmpval);
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cmpval = tmp1;
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__ encode_heap_oop(tmp2, newval);
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newval = tmp2;
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}
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ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm->masm(), addr, cmpval, newval, /*acquire*/ true, /*release*/ true, /*is_cae*/ false, result);
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if (CompilerConfig::is_c1_only_no_jvmci()) {
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// The membar here is necessary to prevent reordering between the
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// release store in the CAS above and a subsequent volatile load.
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// However for tiered compilation C1 inserts a full barrier before
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// volatile loads which means we don't need an additional barrier
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// here (see LIRGenerator::volatile_field_load()).
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__ membar(__ AnyAny);
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}
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}
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#undef __
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#ifdef ASSERT
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#define __ gen->lir(__FILE__, __LINE__)->
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#else
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#define __ gen->lir()->
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#endif
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LIR_Opr ShenandoahBarrierSetC1::atomic_cmpxchg_at_resolved(LIRAccess& access, LIRItem& cmp_value, LIRItem& new_value) {
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BasicType bt = access.type();
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if (access.is_oop()) {
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LIRGenerator *gen = access.gen();
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if (ShenandoahSATBBarrier) {
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pre_barrier(gen, access.access_emit_info(), access.decorators(), access.resolved_addr(),
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LIR_OprFact::illegalOpr /* pre_val */);
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}
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if (ShenandoahCASBarrier) {
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cmp_value.load_item();
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new_value.load_item();
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LIR_Opr t1 = gen->new_register(T_OBJECT);
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LIR_Opr t2 = gen->new_register(T_OBJECT);
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LIR_Opr addr = access.resolved_addr()->as_address_ptr()->base();
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LIR_Opr result = gen->new_register(T_INT);
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__ append(new LIR_OpShenandoahCompareAndSwap(addr, cmp_value.result(), new_value.result(), t1, t2, result));
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return result;
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}
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}
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return BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value);
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}
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LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess& access, LIRItem& value) {
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LIRGenerator* gen = access.gen();
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BasicType type = access.type();
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LIR_Opr result = gen->new_register(type);
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value.load_item();
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LIR_Opr value_opr = value.result();
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if (access.is_oop()) {
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value_opr = iu_barrier(access.gen(), value_opr, access.access_emit_info(), access.decorators());
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}
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assert(type == T_INT || is_reference_type(type) LP64_ONLY( || type == T_LONG ), "unexpected type");
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LIR_Opr tmp = gen->new_register(T_INT);
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__ xchg(access.resolved_addr(), value_opr, result, tmp);
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if (access.is_oop()) {
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result = load_reference_barrier(access.gen(), result, LIR_OprFact::addressConst(0), access.decorators());
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LIR_Opr tmp = gen->new_register(type);
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__ move(result, tmp);
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result = tmp;
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if (ShenandoahSATBBarrier) {
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pre_barrier(access.gen(), access.access_emit_info(), access.decorators(), LIR_OprFact::illegalOpr,
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result /* pre_val */);
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}
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}
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return result;
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}
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