Path: blob/master/src/hotspot/cpu/x86/globalDefinitions_x86.hpp
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/*1* Copyright (c) 1999, 2021, Oracle and/or its affiliates. All rights reserved.2* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.3*4* This code is free software; you can redistribute it and/or modify it5* under the terms of the GNU General Public License version 2 only, as6* published by the Free Software Foundation.7*8* This code is distributed in the hope that it will be useful, but WITHOUT9* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or10* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License11* version 2 for more details (a copy is included in the LICENSE file that12* accompanied this code).13*14* You should have received a copy of the GNU General Public License version15* 2 along with this work; if not, write to the Free Software Foundation,16* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.17*18* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA19* or visit www.oracle.com if you need additional information or have any20* questions.21*22*/2324#ifndef CPU_X86_GLOBALDEFINITIONS_X86_HPP25#define CPU_X86_GLOBALDEFINITIONS_X86_HPP2627const int StackAlignmentInBytes = 16;2829// Indicates whether the C calling conventions require that30// 32-bit integer argument values are extended to 64 bits.31const bool CCallingConventionRequiresIntsAsLongs = false;3233#define SUPPORTS_NATIVE_CX83435#define CPU_MULTI_COPY_ATOMIC3637// The expected size in bytes of a cache line, used to pad data structures.38#if COMPILER1_AND_COMPILER239#ifdef _LP6440// tiered, 64-bit, large machine41#define DEFAULT_CACHE_LINE_SIZE 12842#define OM_CACHE_LINE_SIZE 6443#else44// tiered, 32-bit, medium machine45#define DEFAULT_CACHE_LINE_SIZE 6446#endif47#elif defined(COMPILER1)48// pure C1, 32-bit, small machine49// i486 was the last Intel chip with 16-byte cache line size50#define DEFAULT_CACHE_LINE_SIZE 3251#elif defined(COMPILER2)52#ifdef _LP6453// pure C2, 64-bit, large machine54#define DEFAULT_CACHE_LINE_SIZE 12855#define OM_CACHE_LINE_SIZE 6456#else57// pure C2, 32-bit, medium machine58#define DEFAULT_CACHE_LINE_SIZE 6459#endif60#endif6162#if defined(COMPILER2)63// Include Restricted Transactional Memory lock eliding optimization64#define INCLUDE_RTM_OPT 165#endif6667#if defined(LINUX) || defined(__APPLE__)68#define SUPPORT_RESERVED_STACK_AREA69#endif7071#if INCLUDE_JVMCI72#define COMPRESSED_CLASS_POINTERS_DEPENDS_ON_COMPRESSED_OOPS EnableJVMCI73#else74#define COMPRESSED_CLASS_POINTERS_DEPENDS_ON_COMPRESSED_OOPS false75#endif7677#endif // CPU_X86_GLOBALDEFINITIONS_X86_HPP787980