CoCalc -- atomic_linux

GitHub Repository: PojavLauncherTeam/mobile
Path: blob/master/src/hotspot/os_cpu/linux_aarch64/atomic_linux_aarch64.S
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// Copyright (c) 2021, Red Hat Inc. All rights reserved.
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// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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//
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// This code is free software; you can redistribute it and/or modify it
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// under the terms of the GNU General Public License version 2 only, as
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// published by the Free Software Foundation.
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//
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// This code is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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// version 2 for more details (a copy is included in the LICENSE file that
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// accompanied this code).
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//
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// You should have received a copy of the GNU General Public License version
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// 2 along with this work; if not, write to the Free Software Foundation,
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// Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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//
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// Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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// or visit www.oracle.com if you need additional information or have any
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// questions.
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        .text
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        .globl aarch64_atomic_fetch_add_8_default_impl
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        .align 5
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aarch64_atomic_fetch_add_8_default_impl:
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        prfm    pstl1strm, [x0]
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0:      ldaxr   x2, [x0]
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        add     x8, x2, x1
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        stlxr   w9, x8, [x0]
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        cbnz    w9, 0b
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        dmb     ish
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        mov     x0, x2
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        ret
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        .globl aarch64_atomic_fetch_add_4_default_impl
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        .align 5
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aarch64_atomic_fetch_add_4_default_impl:
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        prfm    pstl1strm, [x0]
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0:      ldaxr   w2, [x0]
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        add     w8, w2, w1
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        stlxr   w9, w8, [x0]
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        cbnz    w9, 0b
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        dmb     ish
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        mov     w0, w2
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        ret
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        .globl aarch64_atomic_xchg_4_default_impl
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        .align 5
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aarch64_atomic_xchg_4_default_impl:
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        prfm    pstl1strm, [x0]
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0:      ldaxr   w2, [x0]
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        stlxr   w8, w1, [x0]
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        cbnz    w8, 0b
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        dmb     ish
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        mov     w0, w2
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        ret
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        .globl aarch64_atomic_xchg_8_default_impl
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        .align 5
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aarch64_atomic_xchg_8_default_impl:
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        prfm    pstl1strm, [x0]
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0:      ldaxr   x2, [x0]
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        stlxr   w8, x1, [x0]
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        cbnz    w8, 0b
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        dmb     ish
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        mov     x0, x2
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        ret
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        .globl aarch64_atomic_cmpxchg_1_default_impl
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        .align 5
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aarch64_atomic_cmpxchg_1_default_impl:
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        dmb     ish
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        prfm    pstl1strm, [x0]
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0:      ldxrb   w3, [x0]
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        eor     w8, w3, w1
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        tst     x8, #0xff
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        b.ne    1f
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        stxrb   w8, w2, [x0]
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        cbnz    w8, 0b
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1:      mov     w0, w3
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        dmb     ish
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        ret
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        .globl aarch64_atomic_cmpxchg_4_default_impl
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        .align 5
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aarch64_atomic_cmpxchg_4_default_impl:
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        dmb     ish
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        prfm    pstl1strm, [x0]
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0:      ldxr    w3, [x0]
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        cmp     w3, w1
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        b.ne    1f
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        stxr    w8, w2, [x0]
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        cbnz    w8, 0b
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1:      mov     w0, w3
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        dmb     ish
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        ret
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        .globl aarch64_atomic_cmpxchg_8_default_impl
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        .align 5
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aarch64_atomic_cmpxchg_8_default_impl:
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        dmb     ish
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        prfm    pstl1strm, [x0]
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0:      ldxr    x3, [x0]
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        cmp     x3, x1
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        b.ne    1f
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        stxr    w8, x2, [x0]
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        cbnz    w8, 0b
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1:      mov     x0, x3
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        dmb     ish
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        ret
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        .globl aarch64_atomic_cmpxchg_1_relaxed_default_impl
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        .align 5
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aarch64_atomic_cmpxchg_1_relaxed_default_impl:
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        prfm    pstl1strm, [x0]
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0:      ldxrb   w3, [x0]
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        eor     w8, w3, w1
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        tst     x8, #0xff
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        b.ne    1f
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        stxrb   w8, w2, [x0]
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        cbnz    w8, 0b
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1:      mov     w0, w3
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        ret
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        .globl aarch64_atomic_cmpxchg_4_relaxed_default_impl
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        .align 5
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aarch64_atomic_cmpxchg_4_relaxed_default_impl:
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        prfm    pstl1strm, [x0]
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0:      ldxr    w3, [x0]
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        cmp     w3, w1
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        b.ne    1f
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        stxr    w8, w2, [x0]
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        cbnz    w8, 0b
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1:      mov     w0, w3
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        ret
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        .globl aarch64_atomic_cmpxchg_8_relaxed_default_impl
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        .align 5
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aarch64_atomic_cmpxchg_8_relaxed_default_impl:
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        prfm    pstl1strm, [x0]
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0:      ldxr    x3, [x0]
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        cmp     x3, x1
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        b.ne    1f
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        stxr    w8, x2, [x0]
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        cbnz    w8, 0b
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1:      mov     x0, x3
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        ret
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