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godotengine
GitHub Repository: godotengine/godot
Path: blob/master/servers/rendering/rendering_device_driver.h
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/**************************************************************************/
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/* rendering_device_driver.h */
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/**************************************************************************/
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/* This file is part of: */
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/* GODOT ENGINE */
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/* https://godotengine.org */
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/**************************************************************************/
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/* Copyright (c) 2014-present Godot Engine contributors (see AUTHORS.md). */
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/* Copyright (c) 2007-2014 Juan Linietsky, Ariel Manzur. */
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/* */
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/* Permission is hereby granted, free of charge, to any person obtaining */
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/* a copy of this software and associated documentation files (the */
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/* "Software"), to deal in the Software without restriction, including */
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/* without limitation the rights to use, copy, modify, merge, publish, */
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/* distribute, sublicense, and/or sell copies of the Software, and to */
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/* permit persons to whom the Software is furnished to do so, subject to */
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/* the following conditions: */
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/* */
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/* The above copyright notice and this permission notice shall be */
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/* included in all copies or substantial portions of the Software. */
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/* */
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/* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */
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/* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */
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/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. */
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/* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */
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/* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */
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/* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */
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/* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
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/**************************************************************************/
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#pragma once
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// ***********************************************************************************
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// RenderingDeviceDriver - Design principles
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// -----------------------------------------
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// - Very little validation is done, and normally only in dev or debug builds.
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// - Error reporting is generally simple: returning an id of 0 or a false boolean.
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// - Certain enums/constants/structs follow Vulkan values/layout. That makes things easier for RDDVulkan (it asserts compatibility).
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// - We allocate as little as possible in functions expected to be quick (a counterexample is loading/saving shaders) and use alloca() whenever suitable.
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// - We try to back opaque ids with the native ones or memory addresses.
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// - When using bookkeeping structures because the actual API id of a resource is not enough, we use a PagedAllocator.
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// - Every struct has default initializers.
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// - Using VectorView to take array-like arguments. Vector<uint8_t> is an exception (an indiom for "BLOB").
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// - If a driver needs some higher-level information (the kind of info RenderingDevice keeps), it shall store a copy of what it needs.
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// There's no backwards communication from the driver to query data from RenderingDevice.
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// ***********************************************************************************
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#include "core/object/object.h"
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#include "core/variant/type_info.h"
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#include "servers/rendering/rendering_context_driver.h"
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#include "servers/rendering/rendering_device_commons.h"
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#include "servers/rendering/rendering_shader_container.h"
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// These utilities help drivers avoid allocations.
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#define ALLOCA(m_size) ((m_size != 0) ? alloca(m_size) : nullptr)
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#define ALLOCA_ARRAY(m_type, m_count) ((m_type *)ALLOCA(sizeof(m_type) * (m_count)))
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#define ALLOCA_SINGLE(m_type) ALLOCA_ARRAY(m_type, 1)
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// This helps forwarding certain arrays to the API with confidence.
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#define ARRAYS_COMPATIBLE(m_type_a, m_type_b) (sizeof(m_type_a) == sizeof(m_type_b) && alignof(m_type_a) == alignof(m_type_b))
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// This is used when you also need to ensure structured types are compatible field-by-field.
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// TODO: The fieldwise check is unimplemented, but still this one is useful, as a strong annotation about the needs.
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#define ARRAYS_COMPATIBLE_FIELDWISE(m_type_a, m_type_b) ARRAYS_COMPATIBLE(m_type_a, m_type_b)
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// Another utility, to make it easy to compare members of different enums, which is not fine with some compilers.
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#define ENUM_MEMBERS_EQUAL(m_a, m_b) ((int64_t)m_a == (int64_t)m_b)
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// This helps using a single paged allocator for many resource types.
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template <typename... RESOURCE_TYPES>
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struct VersatileResourceTemplate {
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static constexpr size_t RESOURCE_SIZES[] = { sizeof(RESOURCE_TYPES)... };
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static constexpr size_t MAX_RESOURCE_SIZE = std::max_element(RESOURCE_SIZES, RESOURCE_SIZES + sizeof...(RESOURCE_TYPES))[0];
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uint8_t data[MAX_RESOURCE_SIZE];
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template <typename T>
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static T *allocate(PagedAllocator<VersatileResourceTemplate, true> &p_allocator) {
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T *obj = (T *)p_allocator.alloc();
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memnew_placement(obj, T);
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return obj;
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}
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template <typename T>
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static void free(PagedAllocator<VersatileResourceTemplate, true> &p_allocator, T *p_object) {
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p_object->~T();
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p_allocator.free((VersatileResourceTemplate *)p_object);
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}
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};
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class RenderingDeviceDriver : public RenderingDeviceCommons {
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public:
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struct ID {
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uint64_t id = 0;
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_ALWAYS_INLINE_ ID() = default;
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_ALWAYS_INLINE_ ID(uint64_t p_id) :
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id(p_id) {}
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};
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#define DEFINE_ID(m_name) \
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struct m_name##ID : public ID { \
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_ALWAYS_INLINE_ explicit operator bool() const { \
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return id != 0; \
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} \
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_ALWAYS_INLINE_ m_name##ID &operator=(m_name##ID p_other) { \
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id = p_other.id; \
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return *this; \
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} \
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_ALWAYS_INLINE_ bool operator<(const m_name##ID &p_other) const { \
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return id < p_other.id; \
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} \
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_ALWAYS_INLINE_ bool operator==(const m_name##ID &p_other) const { \
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return id == p_other.id; \
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} \
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_ALWAYS_INLINE_ bool operator!=(const m_name##ID &p_other) const { \
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return id != p_other.id; \
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} \
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_ALWAYS_INLINE_ m_name##ID(const m_name##ID &p_other) : ID(p_other.id) {} \
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_ALWAYS_INLINE_ explicit m_name##ID(uint64_t p_int) : ID(p_int) {} \
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_ALWAYS_INLINE_ explicit m_name##ID(void *p_ptr) : ID((uint64_t)p_ptr) {} \
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_ALWAYS_INLINE_ m_name##ID() = default; \
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};
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// Id types declared before anything else to prevent cyclic dependencies between the different concerns.
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DEFINE_ID(Buffer);
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DEFINE_ID(Texture);
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DEFINE_ID(Sampler);
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DEFINE_ID(VertexFormat);
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DEFINE_ID(CommandQueue);
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DEFINE_ID(CommandQueueFamily);
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DEFINE_ID(CommandPool);
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DEFINE_ID(CommandBuffer);
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DEFINE_ID(SwapChain);
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DEFINE_ID(Framebuffer);
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DEFINE_ID(Shader);
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DEFINE_ID(UniformSet);
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DEFINE_ID(Pipeline);
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DEFINE_ID(RenderPass);
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DEFINE_ID(QueryPool);
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DEFINE_ID(Fence);
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DEFINE_ID(Semaphore);
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public:
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/*****************/
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/**** GENERIC ****/
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/*****************/
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virtual Error initialize(uint32_t p_device_index, uint32_t p_frame_count) = 0;
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/****************/
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/**** MEMORY ****/
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/****************/
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enum MemoryAllocationType {
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MEMORY_ALLOCATION_TYPE_CPU, // For images, CPU allocation also means linear, GPU is tiling optimal.
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MEMORY_ALLOCATION_TYPE_GPU,
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};
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/*****************/
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/**** BUFFERS ****/
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/*****************/
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enum BufferUsageBits {
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BUFFER_USAGE_TRANSFER_FROM_BIT = (1 << 0),
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BUFFER_USAGE_TRANSFER_TO_BIT = (1 << 1),
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BUFFER_USAGE_TEXEL_BIT = (1 << 2),
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BUFFER_USAGE_UNIFORM_BIT = (1 << 4),
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BUFFER_USAGE_STORAGE_BIT = (1 << 5),
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BUFFER_USAGE_INDEX_BIT = (1 << 6),
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BUFFER_USAGE_VERTEX_BIT = (1 << 7),
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BUFFER_USAGE_INDIRECT_BIT = (1 << 8),
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BUFFER_USAGE_DEVICE_ADDRESS_BIT = (1 << 17),
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};
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enum {
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BUFFER_WHOLE_SIZE = ~0ULL
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};
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virtual BufferID buffer_create(uint64_t p_size, BitField<BufferUsageBits> p_usage, MemoryAllocationType p_allocation_type) = 0;
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// Only for a buffer with BUFFER_USAGE_TEXEL_BIT.
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virtual bool buffer_set_texel_format(BufferID p_buffer, DataFormat p_format) = 0;
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virtual void buffer_free(BufferID p_buffer) = 0;
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virtual uint64_t buffer_get_allocation_size(BufferID p_buffer) = 0;
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virtual uint8_t *buffer_map(BufferID p_buffer) = 0;
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virtual void buffer_unmap(BufferID p_buffer) = 0;
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// Only for a buffer with BUFFER_USAGE_DEVICE_ADDRESS_BIT.
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virtual uint64_t buffer_get_device_address(BufferID p_buffer) = 0;
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/*****************/
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/**** TEXTURE ****/
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/*****************/
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struct TextureView {
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DataFormat format = DATA_FORMAT_MAX;
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TextureSwizzle swizzle_r = TEXTURE_SWIZZLE_R;
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TextureSwizzle swizzle_g = TEXTURE_SWIZZLE_G;
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TextureSwizzle swizzle_b = TEXTURE_SWIZZLE_B;
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TextureSwizzle swizzle_a = TEXTURE_SWIZZLE_A;
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};
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enum TextureLayout {
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TEXTURE_LAYOUT_UNDEFINED,
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TEXTURE_LAYOUT_GENERAL,
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TEXTURE_LAYOUT_STORAGE_OPTIMAL,
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TEXTURE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL,
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TEXTURE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL,
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TEXTURE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL,
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TEXTURE_LAYOUT_SHADER_READ_ONLY_OPTIMAL,
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TEXTURE_LAYOUT_COPY_SRC_OPTIMAL,
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TEXTURE_LAYOUT_COPY_DST_OPTIMAL,
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TEXTURE_LAYOUT_RESOLVE_SRC_OPTIMAL,
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TEXTURE_LAYOUT_RESOLVE_DST_OPTIMAL,
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TEXTURE_LAYOUT_FRAGMENT_SHADING_RATE_ATTACHMENT_OPTIMAL,
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TEXTURE_LAYOUT_FRAGMENT_DENSITY_MAP_ATTACHMENT_OPTIMAL,
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TEXTURE_LAYOUT_MAX
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};
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enum TextureAspect {
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TEXTURE_ASPECT_COLOR = 0,
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TEXTURE_ASPECT_DEPTH = 1,
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TEXTURE_ASPECT_STENCIL = 2,
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TEXTURE_ASPECT_MAX
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};
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enum TextureUsageMethod {
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TEXTURE_USAGE_VRS_FRAGMENT_SHADING_RATE_BIT = TEXTURE_USAGE_MAX_BIT << 1,
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TEXTURE_USAGE_VRS_FRAGMENT_DENSITY_MAP_BIT = TEXTURE_USAGE_MAX_BIT << 2,
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};
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enum TextureAspectBits {
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TEXTURE_ASPECT_COLOR_BIT = (1 << TEXTURE_ASPECT_COLOR),
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TEXTURE_ASPECT_DEPTH_BIT = (1 << TEXTURE_ASPECT_DEPTH),
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TEXTURE_ASPECT_STENCIL_BIT = (1 << TEXTURE_ASPECT_STENCIL),
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};
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struct TextureSubresource {
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TextureAspect aspect = TEXTURE_ASPECT_COLOR;
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uint32_t layer = 0;
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uint32_t mipmap = 0;
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};
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struct TextureSubresourceLayers {
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BitField<TextureAspectBits> aspect = {};
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uint32_t mipmap = 0;
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uint32_t base_layer = 0;
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uint32_t layer_count = 0;
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};
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struct TextureSubresourceRange {
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BitField<TextureAspectBits> aspect = {};
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uint32_t base_mipmap = 0;
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uint32_t mipmap_count = 0;
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uint32_t base_layer = 0;
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uint32_t layer_count = 0;
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};
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struct TextureCopyableLayout {
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uint64_t offset = 0;
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uint64_t size = 0;
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uint64_t row_pitch = 0;
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uint64_t depth_pitch = 0;
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uint64_t layer_pitch = 0;
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};
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virtual TextureID texture_create(const TextureFormat &p_format, const TextureView &p_view) = 0;
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virtual TextureID texture_create_from_extension(uint64_t p_native_texture, TextureType p_type, DataFormat p_format, uint32_t p_array_layers, bool p_depth_stencil, uint32_t p_mipmaps) = 0;
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// texture_create_shared_*() can only use original, non-view textures as original. RenderingDevice is responsible for ensuring that.
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virtual TextureID texture_create_shared(TextureID p_original_texture, const TextureView &p_view) = 0;
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virtual TextureID texture_create_shared_from_slice(TextureID p_original_texture, const TextureView &p_view, TextureSliceType p_slice_type, uint32_t p_layer, uint32_t p_layers, uint32_t p_mipmap, uint32_t p_mipmaps) = 0;
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virtual void texture_free(TextureID p_texture) = 0;
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virtual uint64_t texture_get_allocation_size(TextureID p_texture) = 0;
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virtual void texture_get_copyable_layout(TextureID p_texture, const TextureSubresource &p_subresource, TextureCopyableLayout *r_layout) = 0;
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virtual uint8_t *texture_map(TextureID p_texture, const TextureSubresource &p_subresource) = 0;
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virtual void texture_unmap(TextureID p_texture) = 0;
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virtual BitField<TextureUsageBits> texture_get_usages_supported_by_format(DataFormat p_format, bool p_cpu_readable) = 0;
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virtual bool texture_can_make_shared_with_format(TextureID p_texture, DataFormat p_format, bool &r_raw_reinterpretation) = 0;
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/*****************/
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/**** SAMPLER ****/
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/*****************/
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virtual SamplerID sampler_create(const SamplerState &p_state) = 0;
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virtual void sampler_free(SamplerID p_sampler) = 0;
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virtual bool sampler_is_format_supported_for_filter(DataFormat p_format, SamplerFilter p_filter) = 0;
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/**********************/
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/**** VERTEX ARRAY ****/
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/**********************/
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virtual VertexFormatID vertex_format_create(VectorView<VertexAttribute> p_vertex_attribs) = 0;
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virtual void vertex_format_free(VertexFormatID p_vertex_format) = 0;
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/******************/
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/**** BARRIERS ****/
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/******************/
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enum PipelineStageBits {
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PIPELINE_STAGE_TOP_OF_PIPE_BIT = (1 << 0),
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PIPELINE_STAGE_DRAW_INDIRECT_BIT = (1 << 1),
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PIPELINE_STAGE_VERTEX_INPUT_BIT = (1 << 2),
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PIPELINE_STAGE_VERTEX_SHADER_BIT = (1 << 3),
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PIPELINE_STAGE_TESSELLATION_CONTROL_SHADER_BIT = (1 << 4),
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PIPELINE_STAGE_TESSELLATION_EVALUATION_SHADER_BIT = (1 << 5),
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PIPELINE_STAGE_GEOMETRY_SHADER_BIT = (1 << 6),
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PIPELINE_STAGE_FRAGMENT_SHADER_BIT = (1 << 7),
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PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT = (1 << 8),
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PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT = (1 << 9),
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PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT = (1 << 10),
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PIPELINE_STAGE_COMPUTE_SHADER_BIT = (1 << 11),
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PIPELINE_STAGE_COPY_BIT = (1 << 12),
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PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT = (1 << 13),
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PIPELINE_STAGE_RESOLVE_BIT = (1 << 14),
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PIPELINE_STAGE_ALL_GRAPHICS_BIT = (1 << 15),
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PIPELINE_STAGE_ALL_COMMANDS_BIT = (1 << 16),
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PIPELINE_STAGE_CLEAR_STORAGE_BIT = (1 << 17),
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PIPELINE_STAGE_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT = (1 << 22),
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PIPELINE_STAGE_FRAGMENT_DENSITY_PROCESS_BIT = (1 << 23),
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};
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enum BarrierAccessBits {
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BARRIER_ACCESS_INDIRECT_COMMAND_READ_BIT = (1 << 0),
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BARRIER_ACCESS_INDEX_READ_BIT = (1 << 1),
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BARRIER_ACCESS_VERTEX_ATTRIBUTE_READ_BIT = (1 << 2),
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BARRIER_ACCESS_UNIFORM_READ_BIT = (1 << 3),
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BARRIER_ACCESS_INPUT_ATTACHMENT_READ_BIT = (1 << 4),
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BARRIER_ACCESS_SHADER_READ_BIT = (1 << 5),
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BARRIER_ACCESS_SHADER_WRITE_BIT = (1 << 6),
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BARRIER_ACCESS_COLOR_ATTACHMENT_READ_BIT = (1 << 7),
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BARRIER_ACCESS_COLOR_ATTACHMENT_WRITE_BIT = (1 << 8),
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BARRIER_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT = (1 << 9),
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BARRIER_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT = (1 << 10),
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BARRIER_ACCESS_COPY_READ_BIT = (1 << 11),
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BARRIER_ACCESS_COPY_WRITE_BIT = (1 << 12),
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BARRIER_ACCESS_HOST_READ_BIT = (1 << 13),
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BARRIER_ACCESS_HOST_WRITE_BIT = (1 << 14),
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BARRIER_ACCESS_MEMORY_READ_BIT = (1 << 15),
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BARRIER_ACCESS_MEMORY_WRITE_BIT = (1 << 16),
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BARRIER_ACCESS_FRAGMENT_SHADING_RATE_ATTACHMENT_READ_BIT = (1 << 23),
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BARRIER_ACCESS_FRAGMENT_DENSITY_MAP_ATTACHMENT_READ_BIT = (1 << 24),
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BARRIER_ACCESS_RESOLVE_READ_BIT = (1 << 25),
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BARRIER_ACCESS_RESOLVE_WRITE_BIT = (1 << 26),
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BARRIER_ACCESS_STORAGE_CLEAR_BIT = (1 << 27),
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};
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struct MemoryBarrier {
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BitField<BarrierAccessBits> src_access = {};
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BitField<BarrierAccessBits> dst_access = {};
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};
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struct BufferBarrier {
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BufferID buffer;
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BitField<BarrierAccessBits> src_access = {};
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BitField<BarrierAccessBits> dst_access = {};
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uint64_t offset = 0;
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uint64_t size = 0;
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};
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struct TextureBarrier {
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TextureID texture;
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BitField<BarrierAccessBits> src_access = {};
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BitField<BarrierAccessBits> dst_access = {};
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TextureLayout prev_layout = TEXTURE_LAYOUT_UNDEFINED;
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TextureLayout next_layout = TEXTURE_LAYOUT_UNDEFINED;
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TextureSubresourceRange subresources;
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};
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virtual void command_pipeline_barrier(
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CommandBufferID p_cmd_buffer,
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BitField<PipelineStageBits> p_src_stages,
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BitField<PipelineStageBits> p_dst_stages,
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VectorView<MemoryBarrier> p_memory_barriers,
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VectorView<BufferBarrier> p_buffer_barriers,
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VectorView<TextureBarrier> p_texture_barriers) = 0;
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/****************/
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/**** FENCES ****/
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/****************/
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virtual FenceID fence_create() = 0;
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virtual Error fence_wait(FenceID p_fence) = 0;
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virtual void fence_free(FenceID p_fence) = 0;
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/********************/
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/**** SEMAPHORES ****/
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/********************/
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virtual SemaphoreID semaphore_create() = 0;
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virtual void semaphore_free(SemaphoreID p_semaphore) = 0;
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/*************************/
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/**** COMMAND BUFFERS ****/
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/*************************/
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// ----- QUEUE FAMILY -----
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enum CommandQueueFamilyBits {
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COMMAND_QUEUE_FAMILY_GRAPHICS_BIT = 0x1,
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COMMAND_QUEUE_FAMILY_COMPUTE_BIT = 0x2,
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COMMAND_QUEUE_FAMILY_TRANSFER_BIT = 0x4
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};
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// The requested command queue family must support all specified bits or it'll fail to return a valid family otherwise. If a valid surface is specified, the queue must support presenting to it.
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// It is valid to specify no bits and a valid surface: in this case, the dedicated presentation queue family will be the preferred option.
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virtual CommandQueueFamilyID command_queue_family_get(BitField<CommandQueueFamilyBits> p_cmd_queue_family_bits, RenderingContextDriver::SurfaceID p_surface = 0) = 0;
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// ----- QUEUE -----
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virtual CommandQueueID command_queue_create(CommandQueueFamilyID p_cmd_queue_family, bool p_identify_as_main_queue = false) = 0;
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virtual Error command_queue_execute_and_present(CommandQueueID p_cmd_queue, VectorView<SemaphoreID> p_wait_semaphores, VectorView<CommandBufferID> p_cmd_buffers, VectorView<SemaphoreID> p_cmd_semaphores, FenceID p_cmd_fence, VectorView<SwapChainID> p_swap_chains) = 0;
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virtual void command_queue_free(CommandQueueID p_cmd_queue) = 0;
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// ----- POOL -----
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enum CommandBufferType {
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COMMAND_BUFFER_TYPE_PRIMARY,
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COMMAND_BUFFER_TYPE_SECONDARY,
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};
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virtual CommandPoolID command_pool_create(CommandQueueFamilyID p_cmd_queue_family, CommandBufferType p_cmd_buffer_type) = 0;
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virtual bool command_pool_reset(CommandPoolID p_cmd_pool) = 0;
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virtual void command_pool_free(CommandPoolID p_cmd_pool) = 0;
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// ----- BUFFER -----
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virtual CommandBufferID command_buffer_create(CommandPoolID p_cmd_pool) = 0;
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virtual bool command_buffer_begin(CommandBufferID p_cmd_buffer) = 0;
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virtual bool command_buffer_begin_secondary(CommandBufferID p_cmd_buffer, RenderPassID p_render_pass, uint32_t p_subpass, FramebufferID p_framebuffer) = 0;
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virtual void command_buffer_end(CommandBufferID p_cmd_buffer) = 0;
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virtual void command_buffer_execute_secondary(CommandBufferID p_cmd_buffer, VectorView<CommandBufferID> p_secondary_cmd_buffers) = 0;
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/********************/
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/**** SWAP CHAIN ****/
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/********************/
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// The swap chain won't be valid for use until it is resized at least once.
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virtual SwapChainID swap_chain_create(RenderingContextDriver::SurfaceID p_surface) = 0;
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// The swap chain must not be in use when a resize is requested. Wait until all rendering associated to the swap chain is finished before resizing it.
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virtual Error swap_chain_resize(CommandQueueID p_cmd_queue, SwapChainID p_swap_chain, uint32_t p_desired_framebuffer_count) = 0;
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// Acquire the framebuffer that can be used for drawing. This must be called only once every time a new frame will be rendered.
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virtual FramebufferID swap_chain_acquire_framebuffer(CommandQueueID p_cmd_queue, SwapChainID p_swap_chain, bool &r_resize_required) = 0;
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// Retrieve the render pass that can be used to draw on the swap chain's framebuffers.
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virtual RenderPassID swap_chain_get_render_pass(SwapChainID p_swap_chain) = 0;
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// Retrieve the rotation in degrees to apply as a pre-transform. Usually 0 on PC. May be 0, 90, 180 & 270 on Android.
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virtual int swap_chain_get_pre_rotation_degrees(SwapChainID p_swap_chain) { return 0; }
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// Retrieve the format used by the swap chain's framebuffers.
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virtual DataFormat swap_chain_get_format(SwapChainID p_swap_chain) = 0;
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// Tells the swapchain the max_fps so it can use the proper frame pacing.
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// Android uses this with Swappy library. Some implementations or platforms may ignore this hint.
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virtual void swap_chain_set_max_fps(SwapChainID p_swap_chain, int p_max_fps) {}
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// Wait until all rendering associated to the swap chain is finished before deleting it.
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virtual void swap_chain_free(SwapChainID p_swap_chain) = 0;
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/*********************/
458
/**** FRAMEBUFFER ****/
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/*********************/
460
461
virtual FramebufferID framebuffer_create(RenderPassID p_render_pass, VectorView<TextureID> p_attachments, uint32_t p_width, uint32_t p_height) = 0;
462
virtual void framebuffer_free(FramebufferID p_framebuffer) = 0;
463
464
/****************/
465
/**** SHADER ****/
466
/****************/
467
468
struct ImmutableSampler {
469
UniformType type = UNIFORM_TYPE_MAX;
470
uint32_t binding = 0xffffffff; // Binding index as specified in shader.
471
LocalVector<ID> ids;
472
};
473
474
// Creates a Pipeline State Object (PSO) out of the shader and all the input data it needs.
475
// Immutable samplers can be embedded when creating the pipeline layout on the condition they remain valid and unchanged, so they don't need to be
476
// specified when creating uniform sets PSO resource for binding.
477
virtual ShaderID shader_create_from_container(const Ref<RenderingShaderContainer> &p_shader_container, const Vector<ImmutableSampler> &p_immutable_samplers) = 0;
478
// Only meaningful if API_TRAIT_SHADER_CHANGE_INVALIDATION is SHADER_CHANGE_INVALIDATION_ALL_OR_NONE_ACCORDING_TO_LAYOUT_HASH.
479
virtual uint32_t shader_get_layout_hash(ShaderID p_shader) { return 0; }
480
virtual void shader_free(ShaderID p_shader) = 0;
481
virtual void shader_destroy_modules(ShaderID p_shader) = 0;
482
483
public:
484
/*********************/
485
/**** UNIFORM SET ****/
486
/*********************/
487
488
struct BoundUniform {
489
UniformType type = UNIFORM_TYPE_MAX;
490
uint32_t binding = 0xffffffff; // Binding index as specified in shader.
491
LocalVector<ID> ids;
492
// Flag to indicate that this is an immutable sampler so it is skipped when creating uniform
493
// sets, as it would be set previously when creating the pipeline layout.
494
bool immutable_sampler = false;
495
};
496
497
virtual UniformSetID uniform_set_create(VectorView<BoundUniform> p_uniforms, ShaderID p_shader, uint32_t p_set_index, int p_linear_pool_index) = 0;
498
virtual void linear_uniform_set_pools_reset(int p_linear_pool_index) {}
499
virtual void uniform_set_free(UniformSetID p_uniform_set) = 0;
500
virtual bool uniform_sets_have_linear_pools() const { return false; }
501
502
// ----- COMMANDS -----
503
504
virtual void command_uniform_set_prepare_for_use(CommandBufferID p_cmd_buffer, UniformSetID p_uniform_set, ShaderID p_shader, uint32_t p_set_index) = 0;
505
506
/******************/
507
/**** TRANSFER ****/
508
/******************/
509
510
struct BufferCopyRegion {
511
uint64_t src_offset = 0;
512
uint64_t dst_offset = 0;
513
uint64_t size = 0;
514
};
515
516
struct TextureCopyRegion {
517
TextureSubresourceLayers src_subresources;
518
Vector3i src_offset;
519
TextureSubresourceLayers dst_subresources;
520
Vector3i dst_offset;
521
Vector3i size;
522
};
523
524
struct BufferTextureCopyRegion {
525
uint64_t buffer_offset = 0;
526
TextureSubresourceLayers texture_subresources;
527
Vector3i texture_offset;
528
Vector3i texture_region_size;
529
};
530
531
virtual void command_clear_buffer(CommandBufferID p_cmd_buffer, BufferID p_buffer, uint64_t p_offset, uint64_t p_size) = 0;
532
virtual void command_copy_buffer(CommandBufferID p_cmd_buffer, BufferID p_src_buffer, BufferID p_dst_buffer, VectorView<BufferCopyRegion> p_regions) = 0;
533
534
virtual void command_copy_texture(CommandBufferID p_cmd_buffer, TextureID p_src_texture, TextureLayout p_src_texture_layout, TextureID p_dst_texture, TextureLayout p_dst_texture_layout, VectorView<TextureCopyRegion> p_regions) = 0;
535
virtual void command_resolve_texture(CommandBufferID p_cmd_buffer, TextureID p_src_texture, TextureLayout p_src_texture_layout, uint32_t p_src_layer, uint32_t p_src_mipmap, TextureID p_dst_texture, TextureLayout p_dst_texture_layout, uint32_t p_dst_layer, uint32_t p_dst_mipmap) = 0;
536
virtual void command_clear_color_texture(CommandBufferID p_cmd_buffer, TextureID p_texture, TextureLayout p_texture_layout, const Color &p_color, const TextureSubresourceRange &p_subresources) = 0;
537
538
virtual void command_copy_buffer_to_texture(CommandBufferID p_cmd_buffer, BufferID p_src_buffer, TextureID p_dst_texture, TextureLayout p_dst_texture_layout, VectorView<BufferTextureCopyRegion> p_regions) = 0;
539
virtual void command_copy_texture_to_buffer(CommandBufferID p_cmd_buffer, TextureID p_src_texture, TextureLayout p_src_texture_layout, BufferID p_dst_buffer, VectorView<BufferTextureCopyRegion> p_regions) = 0;
540
541
/******************/
542
/**** PIPELINE ****/
543
/******************/
544
545
virtual void pipeline_free(PipelineID p_pipeline) = 0;
546
547
// ----- BINDING -----
548
549
virtual void command_bind_push_constants(CommandBufferID p_cmd_buffer, ShaderID p_shader, uint32_t p_first_index, VectorView<uint32_t> p_data) = 0;
550
551
// ----- CACHE -----
552
553
virtual bool pipeline_cache_create(const Vector<uint8_t> &p_data) = 0;
554
virtual void pipeline_cache_free() = 0;
555
virtual size_t pipeline_cache_query_size() = 0;
556
virtual Vector<uint8_t> pipeline_cache_serialize() = 0;
557
558
/*******************/
559
/**** RENDERING ****/
560
/*******************/
561
562
// ----- SUBPASS -----
563
564
enum AttachmentLoadOp {
565
ATTACHMENT_LOAD_OP_LOAD = 0,
566
ATTACHMENT_LOAD_OP_CLEAR = 1,
567
ATTACHMENT_LOAD_OP_DONT_CARE = 2,
568
};
569
570
enum AttachmentStoreOp {
571
ATTACHMENT_STORE_OP_STORE = 0,
572
ATTACHMENT_STORE_OP_DONT_CARE = 1,
573
};
574
575
struct Attachment {
576
DataFormat format = DATA_FORMAT_MAX;
577
TextureSamples samples = TEXTURE_SAMPLES_MAX;
578
AttachmentLoadOp load_op = ATTACHMENT_LOAD_OP_DONT_CARE;
579
AttachmentStoreOp store_op = ATTACHMENT_STORE_OP_DONT_CARE;
580
AttachmentLoadOp stencil_load_op = ATTACHMENT_LOAD_OP_DONT_CARE;
581
AttachmentStoreOp stencil_store_op = ATTACHMENT_STORE_OP_DONT_CARE;
582
TextureLayout initial_layout = TEXTURE_LAYOUT_UNDEFINED;
583
TextureLayout final_layout = TEXTURE_LAYOUT_UNDEFINED;
584
};
585
586
struct AttachmentReference {
587
static constexpr uint32_t UNUSED = 0xffffffff;
588
uint32_t attachment = UNUSED;
589
TextureLayout layout = TEXTURE_LAYOUT_UNDEFINED;
590
BitField<TextureAspectBits> aspect = {};
591
};
592
593
struct Subpass {
594
LocalVector<AttachmentReference> input_references;
595
LocalVector<AttachmentReference> color_references;
596
AttachmentReference depth_stencil_reference;
597
LocalVector<AttachmentReference> resolve_references;
598
LocalVector<uint32_t> preserve_attachments;
599
AttachmentReference fragment_shading_rate_reference;
600
Size2i fragment_shading_rate_texel_size;
601
};
602
603
struct SubpassDependency {
604
uint32_t src_subpass = 0xffffffff;
605
uint32_t dst_subpass = 0xffffffff;
606
BitField<PipelineStageBits> src_stages = {};
607
BitField<PipelineStageBits> dst_stages = {};
608
BitField<BarrierAccessBits> src_access = {};
609
BitField<BarrierAccessBits> dst_access = {};
610
};
611
612
virtual RenderPassID render_pass_create(VectorView<Attachment> p_attachments, VectorView<Subpass> p_subpasses, VectorView<SubpassDependency> p_subpass_dependencies, uint32_t p_view_count, AttachmentReference p_fragment_density_map_attachment) = 0;
613
virtual void render_pass_free(RenderPassID p_render_pass) = 0;
614
615
// ----- COMMANDS -----
616
617
union RenderPassClearValue {
618
Color color = {};
619
struct {
620
float depth;
621
uint32_t stencil;
622
};
623
624
RenderPassClearValue() {}
625
};
626
627
struct AttachmentClear {
628
BitField<TextureAspectBits> aspect = {};
629
uint32_t color_attachment = 0xffffffff;
630
RenderPassClearValue value;
631
};
632
633
virtual void command_begin_render_pass(CommandBufferID p_cmd_buffer, RenderPassID p_render_pass, FramebufferID p_framebuffer, CommandBufferType p_cmd_buffer_type, const Rect2i &p_rect, VectorView<RenderPassClearValue> p_clear_values) = 0;
634
virtual void command_end_render_pass(CommandBufferID p_cmd_buffer) = 0;
635
virtual void command_next_render_subpass(CommandBufferID p_cmd_buffer, CommandBufferType p_cmd_buffer_type) = 0;
636
virtual void command_render_set_viewport(CommandBufferID p_cmd_buffer, VectorView<Rect2i> p_viewports) = 0;
637
virtual void command_render_set_scissor(CommandBufferID p_cmd_buffer, VectorView<Rect2i> p_scissors) = 0;
638
virtual void command_render_clear_attachments(CommandBufferID p_cmd_buffer, VectorView<AttachmentClear> p_attachment_clears, VectorView<Rect2i> p_rects) = 0;
639
640
// Binding.
641
virtual void command_bind_render_pipeline(CommandBufferID p_cmd_buffer, PipelineID p_pipeline) = 0;
642
virtual void command_bind_render_uniform_set(CommandBufferID p_cmd_buffer, UniformSetID p_uniform_set, ShaderID p_shader, uint32_t p_set_index) = 0;
643
virtual void command_bind_render_uniform_sets(CommandBufferID p_cmd_buffer, VectorView<UniformSetID> p_uniform_sets, ShaderID p_shader, uint32_t p_first_set_index, uint32_t p_set_count) = 0;
644
645
// Drawing.
646
virtual void command_render_draw(CommandBufferID p_cmd_buffer, uint32_t p_vertex_count, uint32_t p_instance_count, uint32_t p_base_vertex, uint32_t p_first_instance) = 0;
647
virtual void command_render_draw_indexed(CommandBufferID p_cmd_buffer, uint32_t p_index_count, uint32_t p_instance_count, uint32_t p_first_index, int32_t p_vertex_offset, uint32_t p_first_instance) = 0;
648
virtual void command_render_draw_indexed_indirect(CommandBufferID p_cmd_buffer, BufferID p_indirect_buffer, uint64_t p_offset, uint32_t p_draw_count, uint32_t p_stride) = 0;
649
virtual void command_render_draw_indexed_indirect_count(CommandBufferID p_cmd_buffer, BufferID p_indirect_buffer, uint64_t p_offset, BufferID p_count_buffer, uint64_t p_count_buffer_offset, uint32_t p_max_draw_count, uint32_t p_stride) = 0;
650
virtual void command_render_draw_indirect(CommandBufferID p_cmd_buffer, BufferID p_indirect_buffer, uint64_t p_offset, uint32_t p_draw_count, uint32_t p_stride) = 0;
651
virtual void command_render_draw_indirect_count(CommandBufferID p_cmd_buffer, BufferID p_indirect_buffer, uint64_t p_offset, BufferID p_count_buffer, uint64_t p_count_buffer_offset, uint32_t p_max_draw_count, uint32_t p_stride) = 0;
652
653
// Buffer binding.
654
virtual void command_render_bind_vertex_buffers(CommandBufferID p_cmd_buffer, uint32_t p_binding_count, const BufferID *p_buffers, const uint64_t *p_offsets) = 0;
655
virtual void command_render_bind_index_buffer(CommandBufferID p_cmd_buffer, BufferID p_buffer, IndexBufferFormat p_format, uint64_t p_offset) = 0;
656
657
// Dynamic state.
658
virtual void command_render_set_blend_constants(CommandBufferID p_cmd_buffer, const Color &p_constants) = 0;
659
virtual void command_render_set_line_width(CommandBufferID p_cmd_buffer, float p_width) = 0;
660
661
// ----- PIPELINE -----
662
663
virtual PipelineID render_pipeline_create(
664
ShaderID p_shader,
665
VertexFormatID p_vertex_format,
666
RenderPrimitive p_render_primitive,
667
PipelineRasterizationState p_rasterization_state,
668
PipelineMultisampleState p_multisample_state,
669
PipelineDepthStencilState p_depth_stencil_state,
670
PipelineColorBlendState p_blend_state,
671
VectorView<int32_t> p_color_attachments,
672
BitField<PipelineDynamicStateFlags> p_dynamic_state,
673
RenderPassID p_render_pass,
674
uint32_t p_render_subpass,
675
VectorView<PipelineSpecializationConstant> p_specialization_constants) = 0;
676
677
/*****************/
678
/**** COMPUTE ****/
679
/*****************/
680
681
// ----- COMMANDS -----
682
683
// Binding.
684
virtual void command_bind_compute_pipeline(CommandBufferID p_cmd_buffer, PipelineID p_pipeline) = 0;
685
virtual void command_bind_compute_uniform_set(CommandBufferID p_cmd_buffer, UniformSetID p_uniform_set, ShaderID p_shader, uint32_t p_set_index) = 0;
686
virtual void command_bind_compute_uniform_sets(CommandBufferID p_cmd_buffer, VectorView<UniformSetID> p_uniform_sets, ShaderID p_shader, uint32_t p_first_set_index, uint32_t p_set_count) = 0;
687
688
// Dispatching.
689
virtual void command_compute_dispatch(CommandBufferID p_cmd_buffer, uint32_t p_x_groups, uint32_t p_y_groups, uint32_t p_z_groups) = 0;
690
virtual void command_compute_dispatch_indirect(CommandBufferID p_cmd_buffer, BufferID p_indirect_buffer, uint64_t p_offset) = 0;
691
692
// ----- PIPELINE -----
693
694
virtual PipelineID compute_pipeline_create(ShaderID p_shader, VectorView<PipelineSpecializationConstant> p_specialization_constants) = 0;
695
696
/******************/
697
/**** CALLBACK ****/
698
/******************/
699
700
typedef void (*DriverCallback)(RenderingDeviceDriver *p_driver, CommandBufferID p_command_buffer, void *p_userdata);
701
702
/*****************/
703
/**** QUERIES ****/
704
/*****************/
705
706
// ----- TIMESTAMP -----
707
708
// Basic.
709
virtual QueryPoolID timestamp_query_pool_create(uint32_t p_query_count) = 0;
710
virtual void timestamp_query_pool_free(QueryPoolID p_pool_id) = 0;
711
virtual void timestamp_query_pool_get_results(QueryPoolID p_pool_id, uint32_t p_query_count, uint64_t *r_results) = 0;
712
virtual uint64_t timestamp_query_result_to_time(uint64_t p_result) = 0;
713
714
// Commands.
715
virtual void command_timestamp_query_pool_reset(CommandBufferID p_cmd_buffer, QueryPoolID p_pool_id, uint32_t p_query_count) = 0;
716
virtual void command_timestamp_write(CommandBufferID p_cmd_buffer, QueryPoolID p_pool_id, uint32_t p_index) = 0;
717
718
/****************/
719
/**** LABELS ****/
720
/****************/
721
722
virtual void command_begin_label(CommandBufferID p_cmd_buffer, const char *p_label_name, const Color &p_color) = 0;
723
virtual void command_end_label(CommandBufferID p_cmd_buffer) = 0;
724
725
/****************/
726
/**** DEBUG *****/
727
/****************/
728
virtual void command_insert_breadcrumb(CommandBufferID p_cmd_buffer, uint32_t p_data) = 0;
729
730
/********************/
731
/**** SUBMISSION ****/
732
/********************/
733
734
virtual void begin_segment(uint32_t p_frame_index, uint32_t p_frames_drawn) = 0;
735
virtual void end_segment() = 0;
736
737
/**************/
738
/**** MISC ****/
739
/**************/
740
741
enum ObjectType {
742
OBJECT_TYPE_TEXTURE,
743
OBJECT_TYPE_SAMPLER,
744
OBJECT_TYPE_BUFFER,
745
OBJECT_TYPE_SHADER,
746
OBJECT_TYPE_UNIFORM_SET,
747
OBJECT_TYPE_PIPELINE,
748
};
749
750
struct MultiviewCapabilities {
751
bool is_supported = false;
752
bool geometry_shader_is_supported = false;
753
bool tessellation_shader_is_supported = false;
754
uint32_t max_view_count = 0;
755
uint32_t max_instance_count = 0;
756
};
757
758
struct FragmentShadingRateCapabilities {
759
Size2i min_texel_size;
760
Size2i max_texel_size;
761
Size2i max_fragment_size;
762
bool pipeline_supported = false;
763
bool primitive_supported = false;
764
bool attachment_supported = false;
765
};
766
767
struct FragmentDensityMapCapabilities {
768
Size2i min_texel_size;
769
Size2i max_texel_size;
770
Size2i offset_granularity;
771
bool attachment_supported = false;
772
bool dynamic_attachment_supported = false;
773
bool non_subsampled_images_supported = false;
774
bool invocations_supported = false;
775
bool offset_supported = false;
776
};
777
778
enum ApiTrait {
779
API_TRAIT_HONORS_PIPELINE_BARRIERS,
780
API_TRAIT_SHADER_CHANGE_INVALIDATION,
781
API_TRAIT_TEXTURE_TRANSFER_ALIGNMENT,
782
API_TRAIT_TEXTURE_DATA_ROW_PITCH_STEP,
783
API_TRAIT_SECONDARY_VIEWPORT_SCISSOR,
784
API_TRAIT_CLEARS_WITH_COPY_ENGINE,
785
API_TRAIT_USE_GENERAL_IN_COPY_QUEUES,
786
API_TRAIT_BUFFERS_REQUIRE_TRANSITIONS,
787
};
788
789
enum ShaderChangeInvalidation {
790
SHADER_CHANGE_INVALIDATION_ALL_BOUND_UNIFORM_SETS,
791
// What Vulkan does.
792
SHADER_CHANGE_INVALIDATION_INCOMPATIBLE_SETS_PLUS_CASCADE,
793
// What D3D12 does.
794
SHADER_CHANGE_INVALIDATION_ALL_OR_NONE_ACCORDING_TO_LAYOUT_HASH,
795
};
796
797
enum DeviceFamily {
798
DEVICE_UNKNOWN,
799
DEVICE_OPENGL,
800
DEVICE_VULKAN,
801
DEVICE_DIRECTX,
802
DEVICE_METAL,
803
};
804
805
struct Capabilities {
806
DeviceFamily device_family = DEVICE_UNKNOWN;
807
uint32_t version_major = 1;
808
uint32_t version_minor = 0;
809
};
810
811
virtual void set_object_name(ObjectType p_type, ID p_driver_id, const String &p_name) = 0;
812
virtual uint64_t get_resource_native_handle(DriverResource p_type, ID p_driver_id) = 0;
813
virtual uint64_t get_total_memory_used() = 0;
814
virtual uint64_t get_lazily_memory_used() = 0;
815
virtual uint64_t limit_get(Limit p_limit) = 0;
816
virtual uint64_t api_trait_get(ApiTrait p_trait);
817
virtual bool has_feature(Features p_feature) = 0;
818
virtual const MultiviewCapabilities &get_multiview_capabilities() = 0;
819
virtual const FragmentShadingRateCapabilities &get_fragment_shading_rate_capabilities() = 0;
820
virtual const FragmentDensityMapCapabilities &get_fragment_density_map_capabilities() = 0;
821
virtual String get_api_name() const = 0;
822
virtual String get_api_version() const = 0;
823
virtual String get_pipeline_cache_uuid() const = 0;
824
virtual const Capabilities &get_capabilities() const = 0;
825
virtual const RenderingShaderContainerFormat &get_shader_container_format() const = 0;
826
827
virtual bool is_composite_alpha_supported(CommandQueueID p_queue) const { return false; }
828
829
/******************/
830
831
virtual ~RenderingDeviceDriver();
832
};
833
834
using RDD = RenderingDeviceDriver;
835
836