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orangepi-xunlong
GitHub Repository: orangepi-xunlong/orangepi-build
Path: blob/next/external/packages/pack-uboot/sun60iw2/bin/dts/u-boot-current.dts
15422 views
/dts-v1/;

/ {
	model = "sun60iw2";
	interrupt-parent = <0x01>;
	#address-cells = <0x02>;
	#size-cells = <0x02>;
	board = "T736\0T736-DEMO-AIOT";
	compatible = "allwinner,t736\0arm,sun60iw2p1";

	vf_mapping_table {
		vf-version = "V0.31";
		table = <0x00 0x00 0x01 0x100 0x02 0x200>;
		phandle = <0x14b>;
	};

	cluster0-opp-table {
		compatible = "allwinner,sun50i-operating-points";
		opp-shared;
		phandle = <0x06>;

		opp@408000000 {
			opp-hz = <0x00 0x18519600>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = "\0\f5";
			opp-microvolt-vf0100 = "\0\f5";
			opp-microvolt-vf0200 = "\0\f5";
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@720000000 {
			opp-hz = <0x00 0x2aea5400>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = "\0\f5";
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@792000000 {
			opp-hz = <0x00 0x2f34f600>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = "\0\f5";
			opp-microvolt-vf0200 = "\0\f5";
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1008000000 {
			opp-hz = <0x00 0x3c14dc00>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = "\0\f5";
			opp-microvolt-vf0100 = "\0\f5";
			opp-microvolt-vf0200 = "\0\f5";
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1104000000 {
			opp-hz = <0x00 0x41cdb400>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = "\0\f5";
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1200000000 {
			opp-hz = <0x00 0x47868c00>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = "\0\f5";
			opp-microvolt-vf0100 = <0xcf850>;
			opp-microvolt-vf0200 = "\0\f5";
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1296000000 {
			opp-hz = <0x00 0x4d3f6400>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0xdbba0>;
			opp-microvolt-vf0200 = "\0\f5";
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1392000000 {
			opp-hz = <0x00 0x52f83c00>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0xe7ef0>;
			opp-microvolt-vf0200 = <0xcf850>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1416000000 {
			opp-hz = <0x00 0x54667200>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = "\0\f5";
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1512000000 {
			opp-hz = <0x00 0x5a1f4a00>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0xf4240>;
			opp-microvolt-vf0200 = <0xdbba0>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1608000000 {
			opp-hz = <0x00 0x5fd82200>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0xdbba0>;
			opp-microvolt-vf0100 = <0x100590>;
			opp-microvolt-vf0200 = <0xe7ef0>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1704000000 {
			opp-hz = <0x00 0x6590fa00>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0xf4240>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1800000000 {
			opp-hz = <0x00 0x6b49d200>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0xf4240>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x100590>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@416000000 {
			opp-hz = <0x00 0x18cba800>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = "\0\f5";
			opp-microvolt-26m-vf0100 = "\0\f5";
			opp-microvolt-26m-vf0200 = "\0\f5";
		};

		opp@728000000 {
			opp-hz = <0x00 0x2b646600>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = "\0\f5";
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@780000000 {
			opp-hz = <0x00 0x2e7ddb00>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = "\0\f5";
			opp-microvolt-26m-vf0200 = "\0\f5";
		};

		opp@1014000000 {
			opp-hz = <0x00 0x3c706980>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = "\0\f5";
			opp-microvolt-26m-vf0100 = "\0\f5";
			opp-microvolt-26m-vf0200 = "\0\f5";
		};

		opp@1092000000 {
			opp-hz = <0x00 0x41169900>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = "\0\f5";
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1196000000 {
			opp-hz = <0x00 0x47498300>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = "\0\f5";
			opp-microvolt-26m-vf0100 = <0xcf850>;
			opp-microvolt-26m-vf0200 = "\0\f5";
		};

		opp@1300000000 {
			opp-hz = <0x00 0x4d7c6d00>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0xdbba0>;
			opp-microvolt-26m-vf0200 = "\0\f5";
		};

		opp@1404000000 {
			opp-hz = <0x00 0x53af5700>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = "\0\f5";
			opp-microvolt-26m-vf0100 = <0xe7ef0>;
			opp-microvolt-26m-vf0200 = <0xcf850>;
		};

		opp@1508000000 {
			opp-hz = <0x00 0x59e24100>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0xf4240>;
			opp-microvolt-26m-vf0200 = <0xdbba0>;
		};

		opp@1586000000 {
			opp-hz = <0x00 0x5e887080>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0xdbba0>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1612000000 {
			opp-hz = <0x00 0x60152b00>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x100590>;
			opp-microvolt-26m-vf0200 = <0xe7ef0>;
		};

		opp@1716000000 {
			opp-hz = <0x00 0x66481500>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0xf4240>;
		};

		opp@1794000000 {
			opp-hz = <0x00 0x6aee4480>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0xf4240>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x100590>;
		};
	};

	cluster1-opp-table {
		compatible = "allwinner,sun50i-operating-points";
		opp-shared;
		phandle = <0x08>;

		opp@408000000 {
			opp-hz = <0x00 0x18519600>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = "\0\f5";
			opp-microvolt-vf0100 = "\0\f5";
			opp-microvolt-vf0200 = "\0\f5";
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@720000000 {
			opp-hz = <0x00 0x2aea5400>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = "\0\f5";
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@792000000 {
			opp-hz = <0x00 0x2f34f600>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = "\0\f5";
			opp-microvolt-vf0200 = "\0\f5";
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1008000000 {
			opp-hz = <0x00 0x3c14dc00>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = "\0\f5";
			opp-microvolt-vf0100 = "\0\f5";
			opp-microvolt-vf0200 = "\0\f5";
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1200000000 {
			opp-hz = <0x00 0x47868c00>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = "\0\f5";
			opp-microvolt-vf0100 = "\0\f5";
			opp-microvolt-vf0200 = "\0\f5";
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1296000000 {
			opp-hz = <0x00 0x4d3f6400>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = "\0\f5";
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1392000000 {
			opp-hz = <0x00 0x52f83c00>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = "\0\f5";
			opp-microvolt-vf0100 = <0xcf850>;
			opp-microvolt-vf0200 = "\0\f5";
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1512000000 {
			opp-hz = <0x00 0x5a1f4a00>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = "\0\f5";
			opp-microvolt-vf0100 = <0xdbba0>;
			opp-microvolt-vf0200 = "\0\f5";
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1608000000 {
			opp-hz = <0x00 0x5fd82200>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0xcf850>;
			opp-microvolt-vf0100 = <0xe7ef0>;
			opp-microvolt-vf0200 = <0xcf850>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1704000000 {
			opp-hz = <0x00 0x6590fa00>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0xdbba0>;
			opp-microvolt-vf0100 = <0xf4240>;
			opp-microvolt-vf0200 = <0xdbba0>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1800000000 {
			opp-hz = <0x00 0x6b49d200>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0xe7ef0>;
			opp-microvolt-vf0100 = <0x100590>;
			opp-microvolt-vf0200 = <0xe7ef0>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1896000000 {
			opp-hz = <0x00 0x7102aa00>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0xf4240>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1920000000 {
			opp-hz = <0x00 0x7270e000>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0xf4240>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1992000000 {
			opp-hz = <0x00 0x76bb8200>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x100590>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x100590>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@416000000 {
			opp-hz = <0x00 0x18cba800>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = "\0\f5";
			opp-microvolt-26m-vf0100 = "\0\f5";
			opp-microvolt-26m-vf0200 = "\0\f5";
		};

		opp@728000000 {
			opp-hz = <0x00 0x2b646600>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = "\0\f5";
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@780000000 {
			opp-hz = <0x00 0x2e7ddb00>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = "\0\f5";
			opp-microvolt-26m-vf0200 = "\0\f5";
		};

		opp@1014000000 {
			opp-hz = <0x00 0x3c706980>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = "\0\f5";
			opp-microvolt-26m-vf0100 = "\0\f5";
			opp-microvolt-26m-vf0200 = "\0\f5";
		};

		opp@1196000000 {
			opp-hz = <0x00 0x47498300>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = "\0\f5";
			opp-microvolt-26m-vf0100 = "\0\f5";
			opp-microvolt-26m-vf0200 = "\0\f5";
		};

		opp@1300000000 {
			opp-hz = <0x00 0x4d7c6d00>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = "\0\f5";
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1404000000 {
			opp-hz = <0x00 0x53af5700>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = "\0\f5";
			opp-microvolt-26m-vf0100 = <0xcf850>;
			opp-microvolt-26m-vf0200 = "\0\f5";
		};

		opp@1508000000 {
			opp-hz = <0x00 0x59e24100>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = "\0\f5";
			opp-microvolt-26m-vf0100 = <0xdbba0>;
			opp-microvolt-26m-vf0200 = "\0\f5";
		};

		opp@1586000000 {
			opp-hz = <0x00 0x5e887080>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0xcf850>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1612000000 {
			opp-hz = <0x00 0x60152b00>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0xe7ef0>;
			opp-microvolt-26m-vf0200 = <0xcf850>;
		};

		opp@1690000000 {
			opp-hz = <0x00 0x64bb5a80>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0xdbba0>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1716000000 {
			opp-hz = <0x00 0x66481500>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0xf4240>;
			opp-microvolt-26m-vf0200 = <0xdbba0>;
		};

		opp@1794000000 {
			opp-hz = <0x00 0x6aee4480>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0xe7ef0>;
			opp-microvolt-26m-vf0100 = <0x100590>;
			opp-microvolt-26m-vf0200 = <0xe7ef0>;
		};

		opp@1898000000 {
			opp-hz = <0x00 0x71212e80>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0xf4240>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0xf4240>;
		};

		opp@1976000000 {
			opp-hz = <0x00 0x75c75e00>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x100590>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@2002000000 {
			opp-hz = <0x00 0x77541880>;
			clock-latency-ns = <0x3b9b0>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x100590>;
		};
	};

	dsu-opp-table {
		compatible = "allwinner,dsu-operating-points";
		phandle = <0x14>;

		opp@288000000 {
			opp-hz = <0x00 0x112a8800>;
			opp-microvolt-vf0000 = "\0\f5";
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@312000000 {
			opp-hz = <0x00 0x1298be00>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = "\0\f5";
			opp-microvolt-vf0200 = "\0\f5";
			opp-microvolt-26m-vf0000 = "\0\f5";
			opp-microvolt-26m-vf0100 = "\0\f5";
			opp-microvolt-26m-vf0200 = "\0\f5";
		};

		opp@528000000 {
			opp-hz = <0x00 0x1f78a400>;
			opp-microvolt-vf0000 = "\0\f5";
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@600000000 {
			opp-hz = <0x00 0x23c34600>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = "\0\f5";
			opp-microvolt-vf0200 = "\0\f5";
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@744000000 {
			opp-hz = <0x00 0x2c588a00>;
			opp-microvolt-vf0000 = "\0\f5";
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@792000000 {
			opp-hz = <0x00 0x2f34f600>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = "\0\f5";
			opp-microvolt-vf0200 = "\0\f5";
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@840000000 {
			opp-hz = <0x00 0x32116200>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = "\0\f5";
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@888000000 {
			opp-hz = <0x00 0x34edce00>;
			opp-microvolt-vf0000 = "\0\f5";
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@912000000 {
			opp-hz = <0x00 0x365c0400>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0xcf850>;
			opp-microvolt-vf0200 = "\0\f5";
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@984000000 {
			opp-hz = <0x00 0x3aa6a600>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0xdbba0>;
			opp-microvolt-vf0200 = "\0\f5";
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1032000000 {
			opp-hz = <0x00 0x3d831200>;
			opp-microvolt-vf0000 = "\0\f5";
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1056000000 {
			opp-hz = <0x00 0x3ef14800>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0xe7ef0>;
			opp-microvolt-vf0200 = <0xcf850>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1152000000 {
			opp-hz = <0x00 0x44aa2000>;
			opp-microvolt-vf0000 = <0xdbba0>;
			opp-microvolt-vf0100 = <0xf4240>;
			opp-microvolt-vf0200 = <0xdbba0>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1200000000 {
			opp-hz = <0x00 0x47868c00>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x100590>;
			opp-microvolt-vf0200 = <0xe7ef0>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1224000000 {
			opp-hz = <0x00 0x48f4c200>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0xf4240>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1248000000 {
			opp-hz = <0x00 0x4a62f800>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x100590>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0xf4240>;
		};

		opp@1296000000 {
			opp-hz = <0x00 0x4d3f6400>;
			opp-microvolt-vf0000 = <0xf4240>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@546000000 {
			opp-hz = <0x00 0x208b4c80>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = "\0\f5";
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@598000000 {
			opp-hz = <0x00 0x23a4c180>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = "\0\f5";
			opp-microvolt-26m-vf0200 = "\0\f5";
		};

		opp@780000000 {
			opp-hz = <0x00 0x2e7ddb00>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = "\0\f5";
			opp-microvolt-26m-vf0100 = "\0\f5";
			opp-microvolt-26m-vf0200 = "\0\f5";
		};

		opp@832000000 {
			opp-hz = <0x00 0x31975000>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = "\0\f5";
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@910000000 {
			opp-hz = <0x00 0x363d7f80>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = "\0\f5";
			opp-microvolt-26m-vf0100 = <0xcf850>;
			opp-microvolt-26m-vf0200 = "\0\f5";
		};

		opp@988000000 {
			opp-hz = <0x00 0x3ae3af00>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0xdbba0>;
			opp-microvolt-26m-vf0200 = "\0\f5";
		};

		opp@1066000000 {
			opp-hz = <0x00 0x3f89de80>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = "\0\f5";
			opp-microvolt-26m-vf0100 = <0xe7ef0>;
			opp-microvolt-26m-vf0200 = <0xcf850>;
		};

		opp@1144000000 {
			opp-hz = <0x00 0x44300e00>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0xf4240>;
			opp-microvolt-26m-vf0200 = <0xdbba0>;
		};

		opp@1196000000 {
			opp-hz = <0x00 0x47498300>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0xdbba0>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};

		opp@1222000000 {
			opp-hz = <0x00 0x48d63d80>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x100590>;
			opp-microvolt-26m-vf0200 = <0xe7ef0>;
		};

		opp@1274000000 {
			opp-hz = <0x00 0x4befb280>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0x00>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x100590>;
		};

		opp@1352000000 {
			opp-hz = <0x00 0x5095e200>;
			opp-microvolt-vf0000 = <0x00>;
			opp-microvolt-vf0100 = <0x00>;
			opp-microvolt-vf0200 = <0x00>;
			opp-microvolt-26m-vf0000 = <0xf4240>;
			opp-microvolt-26m-vf0100 = <0x00>;
			opp-microvolt-26m-vf0200 = <0x00>;
		};
	};

	npu-opp-table {
		compatible = "allwinner,npu-operating-points";
		phandle = <0xa8>;

		opp-492 {
			opp-hz = <0x00 0x1d535300>;
			opp-microvolt-vf0000 = "\0\f5";
			opp-microvolt-vf0200 = "\0\f5";
			opp-microvolt-vf0201 = "\0\f5";
			opp-microvolt-vf0202 = "\0\f5";
			opp-microvolt-vf0203 = "\0\f5";
			opp-microvolt-vf0204 = "\0\f5";
			opp-microvolt-vf0205 = "\0\f5";
			opp-microvolt-vf0206 = "\0\f5";
			opp-microvolt-vf0300 = "\0\f5";
			opp-microvolt-26m-vf0000 = "\0\f5";
			opp-microvolt-26m-vf0200 = "\0\f5";
			opp-microvolt-26m-vf0201 = "\0\f5";
			opp-microvolt-26m-vf0202 = "\0\f5";
			opp-microvolt-26m-vf0203 = "\0\f5";
			opp-microvolt-26m-vf0204 = "\0\f5";
			opp-microvolt-26m-vf0205 = "\0\f5";
			opp-microvolt-26m-vf0206 = "\0\f5";
			opp-microvolt-26m-vf0300 = "\0\f5";
			phandle = <0x14c>;
		};

		opp-852 {
			opp-hz = <0x00 0x32c87d00>;
			opp-microvolt-vf0000 = "\0\f5";
			opp-microvolt-vf0200 = "\0\f5";
			opp-microvolt-vf0201 = "\0\f5";
			opp-microvolt-vf0202 = <0xd6d80>;
			opp-microvolt-vf0203 = <0xd6d80>;
			opp-microvolt-vf0204 = <0xd6d80>;
			opp-microvolt-26m-vf0000 = "\0\f5";
			opp-microvolt-26m-vf0200 = "\0\f5";
			opp-microvolt-26m-vf0201 = "\0\f5";
			opp-microvolt-26m-vf0202 = <0xd6d80>;
			opp-microvolt-26m-vf0203 = <0xd6d80>;
			opp-microvolt-26m-vf0204 = "\0\f5";
			phandle = <0x14d>;
		};

		opp-1008 {
			opp-hz = <0x00 0x3c14dc00>;
			opp-microvolt-vf0000 = <0xea600>;
			opp-microvolt-vf0202 = <0xfb770>;
			opp-microvolt-vf0203 = <0xfb770>;
			opp-microvolt-vf0204 = <0xf4240>;
			opp-microvolt-vf0205 = <0xea600>;
			opp-microvolt-vf0206 = <0xdbba0>;
			opp-microvolt-vf0300 = <0xdbba0>;
			opp-microvolt-26m-vf0000 = <0xea600>;
			opp-microvolt-26m-vf0202 = <0xfb770>;
			opp-microvolt-26m-vf0203 = <0xfb770>;
			opp-microvolt-26m-vf0204 = <0xf4240>;
			opp-microvolt-26m-vf0205 = <0xea600>;
			opp-microvolt-26m-vf0206 = <0xdbba0>;
			opp-microvolt-26m-vf0300 = <0xdbba0>;
			phandle = <0x14e>;
		};

		opp-1120 {
			opp-hz = <0x00 0x42c1d800>;
			opp-microvolt-vf0205 = <0x107ac0>;
			opp-microvolt-vf0206 = <0xfde80>;
			opp-microvolt-vf0300 = <0xfde80>;
			opp-microvolt-26m-vf0205 = <0x107ac0>;
			opp-microvolt-26m-vf0206 = <0xfde80>;
			opp-microvolt-26m-vf0300 = <0xfde80>;
			phandle = <0x14f>;
		};
	};

	ve-opp-table {
		compatible = "allwinner,ve-operating-points";
		phandle = <0x28>;

		opp-vf0000 {
			opp-hz-0 = <0x00 0x25317c00>;
			opp-microvolt-0 = "\0\f5";
		};

		opp-vf0100 {
			opp-hz-0 = <0x00 0x25317c00>;
			opp-microvolt-0 = "\0\f5";
		};

		opp-vf0101 {
			opp-hz-0 = <0x00 0x25317c00>;
			opp-microvolt-0 = "\0\f5";
		};

		opp-vf0200 {
			opp-hz-0 = <0x00 0x25317c00>;
			opp-microvolt-0 = "\0\f5";
		};

		opp-vf0201 {
			opp-hz-0 = <0x00 0x25317c00>;
			opp-microvolt-0 = "\0\f5";
		};
	};

	aliases {
		serial0 = "/soc@3000000/uart@2500000";
		serial1 = "/soc@3000000/uart@2501000";
		serial2 = "/soc@3000000/uart@2502000";
		serial3 = "/soc@3000000/uart@2503000";
		serial4 = "/soc@3000000/uart@2504000";
		serial5 = "/soc@3000000/uart@2505000";
		serial6 = "/soc@3000000/uart@2506000";
		serial7 = "/soc@3000000/uart@7080000";
		serial8 = "/soc@3000000/uart@7081000";
		ethernet0 = "/soc@3000000/ethernet@4500000";
		ethernet1 = "/soc@3000000/ethernet@4510000";
		sunxi-mmc0 = "/soc@3000000/sdmmc@4020000";
		sunxi-mmc2 = "/soc@3000000/sdmmc@4023000";
		twi0 = "/soc@3000000/twi@2510000";
		twi1 = "/soc@3000000/twi@2511000";
		twi2 = "/soc@3000000/twi@2512000";
		twi3 = "/soc@3000000/twi@2513000";
		twi4 = "/soc@3000000/twi@2514000";
		twi5 = "/soc@3000000/twi@2515000";
		twi6 = "/soc@3000000/twi@2516000";
		twi7 = "/soc@3000000/twi@2517000";
		twi8 = "/soc@3000000/twi@2518000";
		twi9 = "/soc@3000000/twi@2519000";
		twi10 = "/soc@3000000/twi@251A000";
		twi11 = "/soc@3000000/twi@251B000";
		twi12 = "/soc@3000000/twi@251C000";
		twi13 = "/soc@3000000/twi@7083000";
		twi14 = "/soc@3000000/twi@7084000";
		twi15 = "/soc@3000000/twi@7085000";
		pwm0 = "/soc@3000000/pwm@2527000";
		pwm1 = "/soc@3000000/pwm@2528000";
		pwm2 = "/soc@3000000/pwm@7023000";
		spi0 = "/soc@3000000/spi@2540000";
		spi1 = "/soc@3000000/spi@2541000";
		spi2 = "/soc@3000000/spi@2542000";
		spi3 = "/soc@3000000/spi@2543000";
		spi4 = "/soc@3000000/spi@2544000";
		spi5 = "/soc@3000000/spi@7092000";
		gpadc0 = "/soc@3000000/gpadc@2521000";
		ir0 = "/soc@3000000/irrx@2526000";
		ir1 = "/soc@3000000/irrx@7040000";
		ir2 = "/soc@3000000/irtx@2525000";
		arisc-config = "/arisc_config";
		pmu0 = "/soc@3000000/twi@7083000/pmu@36";
		bat_supply = "/soc@3000000/twi@7083000/pmu@34/bat-power-supply";
		husb311 = "/soc@3000000/twi@251C000/husb311@4e";
		phy_switcher = "/phy_switcher@10";
	};

	vdd-sys {
		compatible = "regulator-fixed";
		regulator-name = "vdd_sys";
		regulator-min-microvolt = <0xdbba0>;
		regulator-max-microvolt = <0xdbba0>;
		regulator-boot-on;
		regulator-always-on;
		phandle = <0x27>;
	};

	reserved-memory {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;

		bl31 {
			reg = <0x00 0x48000000 0x00 0x1000000>;
		};
	};

	chosen {
		bootargs = "earlyprintk=sunxi-uart,0x2500000 loglevel=8 initcall_debug=0 console=ttyS0 init=/init";
		linux,initrd-start = <0x00 0x00>;
		linux,initrd-end = <0x00 0x00>;
		rng-seed;
		kaslr-seed;
	};

	memory@40000000 {
		device_type = "memory";
		reg = <0x00 0x40000000 0x00 0x20000000>;
	};

	firmware {

		android {
			compatible = "android,firmware";
			boot_devices = "soc@3000000/4020000.sdmmc,soc@3000000/4022000.sdmmc,soc@3000000/4023000.sdmmc,soc@3000000/4520000.ufs,soc@3000000";

			vbmeta {
				compatible = "android,vbmeta";
				parts = "vbmeta,vbmeta_system,vbmeta_vendor,boot,init_boot";
			};
		};

		optee {
			compatible = "linaro,optee-tz";
			method = "smc";
		};
	};

	arm_pmu {
		compatible = "arm,armv8-pmuv3";
		interrupt-parent = <0x02>;
		interrupts = <0x01 0x07 0x04>;
	};

	cpus {
		#address-cells = <0x02>;
		#size-cells = <0x00>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x00 0x00>;
			enable-method = "psci";
			cpu-idle-states = <0x03 0x04>;
			capacity-dmips-mhz = <0x1ae>;
			clocks = <0x05 0x01>;
			operating-points-v2 = <0x06>;
			dynamic-power-coefficient = <0xa2>;
			#cooling-cells = <0x02>;
			cpu-supply = <0x07>;
			phandle = <0x0a>;
		};

		cpu@100 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x00 0x100>;
			enable-method = "psci";
			cpu-idle-states = <0x03 0x04>;
			capacity-dmips-mhz = <0x1ae>;
			clocks = <0x05 0x01>;
			operating-points-v2 = <0x06>;
			dynamic-power-coefficient = <0xa2>;
			#cooling-cells = <0x02>;
			phandle = <0x0b>;
		};

		cpu@200 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x00 0x200>;
			enable-method = "psci";
			cpu-idle-states = <0x03 0x04>;
			capacity-dmips-mhz = <0x1ae>;
			clocks = <0x05 0x01>;
			operating-points-v2 = <0x06>;
			dynamic-power-coefficient = <0xa2>;
			#cooling-cells = <0x02>;
			phandle = <0x0c>;

			thermal-idle {
				#cooling-cells = <0x02>;
				duration-us = <0x2710>;
				exit-latency-us = <0x1f4>;
				phandle = <0x19>;
			};
		};

		cpu@300 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x00 0x300>;
			enable-method = "psci";
			cpu-idle-states = <0x03 0x04>;
			capacity-dmips-mhz = <0x1ae>;
			clocks = <0x05 0x01>;
			operating-points-v2 = <0x06>;
			dynamic-power-coefficient = <0xa2>;
			#cooling-cells = <0x02>;
			phandle = <0x0d>;

			thermal-idle {
				#cooling-cells = <0x02>;
				duration-us = <0x2710>;
				exit-latency-us = <0x1f4>;
				phandle = <0x1a>;
			};
		};

		cpu@400 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x00 0x400>;
			enable-method = "psci";
			cpu-idle-states = <0x03 0x04>;
			capacity-dmips-mhz = <0x1ae>;
			clocks = <0x05 0x01>;
			operating-points-v2 = <0x06>;
			dynamic-power-coefficient = <0xa2>;
			#cooling-cells = <0x02>;
			phandle = <0x0e>;

			thermal-idle {
				#cooling-cells = <0x02>;
				duration-us = <0x2710>;
				exit-latency-us = <0x1f4>;
				phandle = <0x1b>;
			};
		};

		cpu@500 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x00 0x500>;
			enable-method = "psci";
			cpu-idle-states = <0x03 0x04>;
			capacity-dmips-mhz = <0x1ae>;
			clocks = <0x05 0x01>;
			operating-points-v2 = <0x06>;
			dynamic-power-coefficient = <0xa2>;
			#cooling-cells = <0x02>;
			phandle = <0x0f>;

			thermal-idle {
				#cooling-cells = <0x02>;
				duration-us = <0x2710>;
				exit-latency-us = <0x1f4>;
				phandle = <0x1c>;
			};
		};

		cpu@600 {
			device_type = "cpu";
			compatible = "arm,cortex-a76";
			reg = <0x00 0x600>;
			enable-method = "psci";
			cpu-idle-states = <0x03 0x04>;
			capacity-dmips-mhz = <0x400>;
			clocks = <0x05 0x02>;
			operating-points-v2 = <0x08>;
			dynamic-power-coefficient = <0x256>;
			#cooling-cells = <0x02>;
			cpu-supply = <0x09>;
			phandle = <0x10>;

			thermal-idle {
				#cooling-cells = <0x02>;
				duration-us = <0x2710>;
				exit-latency-us = <0x1f4>;
				phandle = <0x1e>;
			};
		};

		cpu@700 {
			device_type = "cpu";
			compatible = "arm,cortex-a76";
			reg = <0x00 0x700>;
			enable-method = "psci";
			cpu-idle-states = <0x03 0x04>;
			capacity-dmips-mhz = <0x400>;
			clocks = <0x05 0x02>;
			operating-points-v2 = <0x08>;
			dynamic-power-coefficient = <0x256>;
			#cooling-cells = <0x02>;
			phandle = <0x11>;

			thermal-idle {
				#cooling-cells = <0x02>;
				duration-us = <0x2710>;
				exit-latency-us = <0x1f4>;
				phandle = <0x1f>;
			};
		};

		cpu-map {

			cluster0 {

				core0 {
					cpu = <0x0a>;
				};

				core1 {
					cpu = <0x0b>;
				};

				core2 {
					cpu = <0x0c>;
				};

				core3 {
					cpu = <0x0d>;
				};

				core4 {
					cpu = <0x0e>;
				};

				core5 {
					cpu = <0x0f>;
				};
			};

			cluster1 {

				core0 {
					cpu = <0x10>;
				};

				core1 {
					cpu = <0x11>;
				};
			};
		};

		idle-states {
			entry-method = "arm,psci";

			cpu-sleep-0 {
				compatible = "arm,idle-state";
				arm,psci-suspend-param = <0x10000>;
				entry-latency-us = <0x2e>;
				exit-latency-us = <0x3b>;
				min-residency-us = <0xdf2>;
				local-timer-stop;
				phandle = <0x03>;
			};

			cluster-sleep-0 {
				compatible = "arm,idle-state";
				arm,psci-suspend-param = <0x1010000>;
				entry-latency-us = <0x2f>;
				exit-latency-us = <0x4a>;
				min-residency-us = <0x1388>;
				local-timer-stop;
				phandle = <0x04>;
			};
		};
	};

	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
	};

	dcxo19_2M_clk {
		#clock-cells = <0x00>;
		compatible = "fixed-clock";
		clock-frequency = <0x124f800>;
		clock-output-names = "dcxo19_2M";
		phandle = <0x150>;
	};

	dcxo24M_clk {
		#clock-cells = <0x00>;
		compatible = "fixed-clock";
		clock-frequency = <0x16e3600>;
		clock-output-names = "dcxo24M";
		phandle = <0x2c>;
	};

	dcxo26M_clk {
		#clock-cells = <0x00>;
		compatible = "fixed-clock";
		clock-frequency = <0x18cba80>;
		clock-output-names = "dcxo26M";
		phandle = <0x151>;
	};

	sys24M_clk {
		#clock-cells = <0x00>;
		compatible = "fixed-clock";
		clock-frequency = <0x16e3600>;
		clock-output-names = "sys24M";
		phandle = <0x2e>;
	};

	rc16m_clk {
		#clock-cells = <0x00>;
		compatible = "fixed-clock";
		clock-frequency = <0xf42400>;
		clock-accuracy = <0x11e1a300>;
		clock-output-names = "rc-16m";
		phandle = <0x2d>;
	};

	ext32k_clk {
		#clock-cells = <0x00>;
		compatible = "fixed-clock";
		clock-frequency = <0x8000>;
		clock-output-names = "ext-32k";
		phandle = <0x152>;
	};

	interrupt-controller@3400000 {
		compatible = "arm,gic-v3";
		#interrupt-cells = <0x03>;
		#address-cells = <0x00>;
		interrupt-controller;
		reg = <0x00 0x3400000 0x00 0x10000 0x00 0x3460000 0x00 0xff004>;
		interrupt-parent = <0x02>;
		phandle = <0x02>;
	};

	interrupt-controller@0 {
		compatible = "allwinner,sunxi-wakeupgen";
		interrupt-controller;
		#interrupt-cells = <0x03>;
		#address-cells = <0x00>;
		interrupt-parent = <0x02>;
		phandle = <0x01>;
	};

	timer_arch {
		compatible = "arm,armv8-timer";
		interrupts = <0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08>;
		clock-frequency = <0x16e3600>;
		interrupt-parent = <0x02>;
		arm,no-tick-in-suspend;
	};

	intc-nmi@7010320 {
		compatible = "allwinner,sun8i-nmi";
		interrupt-parent = <0x02>;
		#interrupt-cells = <0x02>;
		#address-cells = <0x00>;
		interrupt-controller;
		reg = <0x00 0x7010320 0x00 0x0c>;
		interrupts = <0x00 0xbc 0x04>;
		phandle = <0x61>;
	};

	iommu@3900000 {
		compatible = "allwinner,iommu-v20";
		reg = <0x00 0x3900000 0x00 0x20000>;
		interrupts = <0x00 0xaa 0x04 0x00 0xab 0x04>;
		interrupt-names = "iommu-irq1\0iommu-irq2";
		clocks = <0x12 0x36 0x12 0x37 0x12 0x38 0x12 0x3c 0x12 0x3d 0x12 0x3e>;
		clock-names = "iommu0-sys-hclk\0iommu0-sys-pclk\0iommu0-sys-mclk\0iommu1-sys-hclk\0iommu1-sys-pclk\0iommu1-sys-mclk";
		resets = <0x12 0x03 0x12 0x0a>;
		#iommu-cells = <0x02>;
		version = <0x16>;
		tlb_prefetch = <0x3007f>;
		tlb_invalid_mode = <0x01>;
		ptw_invalid_mode = <0x01>;
		masters = "USB\0CSI\0ISP\0VE_ENC\0dummy04\0dummy05\0VE_DEC0\0VE_DEC1\0DE0\0DI\0G2D\0EINK\0DEBUG_MODE";
		phandle = <0x29>;

		usb_iommu {
			iommu-master;
			id = <0x00>;
		};

		csi_iommu {
			iommu-master;
			id = <0x01>;
			power-domains = <0x13 0x00>;
		};

		isp_iommu {
			iommu-master;
			id = <0x02>;
			power-domains = <0x13 0x00>;
		};

		ve_enc_iommu {
			iommu-master;
			id = <0x03>;
			power-domains = <0x13 0x03>;
		};

		dummy04 {
			iommu-master;
			id = <0x04>;
			skip;
		};

		dummy05 {
			iommu-master;
			id = <0x05>;
			skip;
		};

		ve_dec0_iommu {
			iommu-master;
			id = <0x06>;
			power-domains = <0x13 0x02>;
		};

		ve_dec1_iommu {
			iommu-master;
			id = <0x07>;
			power-domains = <0x13 0x02>;
		};

		de0_iommu {
			iommu-master;
			id = <0x08>;
			power-domains = <0x13 0x01>;
		};

		di_iommu {
			iommu-master;
			id = <0x09>;
			power-domains = <0x13 0x01>;
		};

		g2d_iommu {
			iommu-master;
			id = <0x0a>;
			power-domains = <0x13 0x01>;
		};

		eink_iommu {
			iommu-master;
			id = <0x0b>;
			power-domains = <0x13 0x01>;
		};
	};

	dsufreq@0 {
		compatible = "allwinner,dsufreq";
		reg = <0x00 0x8860000 0x00 0x1000>;
		clocks = <0x05 0x03>;
		operating-points-v2 = <0x14>;
		dsu-supply = <0x07>;
		phandle = <0x153>;
	};

	thermal-zones {
		phandle = <0x154>;

		cpul_thermal_zone {
			polling-delay-passive = <0x64>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x15 0x03>;
			sustainable-power = <0x2f4>;
			phandle = <0x155>;

			trips {
				phandle = <0x156>;

				trip-point@0 {
					temperature = <0x11170>;
					type = "passive";
					hysteresis = <0x7d0>;
					phandle = <0x157>;
				};

				trip-point@1 {
					temperature = <0x15f90>;
					type = "passive";
					hysteresis = <0x7d0>;
					phandle = <0x16>;
				};

				cpu_crit@0 {
					temperature = <0x1adb0>;
					type = "critical";
					hysteresis = <0x00>;
					phandle = <0x158>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x16>;
					cooling-device = <0x0a 0xffffffff 0xffffffff>;
					contribution = <0x400>;
				};
			};
		};

		cpub_thermal_zone {
			polling-delay-passive = <0x64>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x15 0x00>;
			sustainable-power = <0x392>;
			phandle = <0x159>;

			trips {
				phandle = <0x15a>;

				trip-point@0 {
					temperature = <0x11170>;
					type = "passive";
					hysteresis = <0x7d0>;
					phandle = <0x15b>;
				};

				trip-point@1 {
					temperature = <0x15f90>;
					type = "passive";
					hysteresis = <0x7d0>;
					phandle = <0x17>;
				};

				cpu_crit@0 {
					temperature = <0x1adb0>;
					type = "critical";
					hysteresis = <0x00>;
					phandle = <0x15c>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x17>;
					cooling-device = <0x10 0xffffffff 0xffffffff>;
					contribution = <0x400>;
				};
			};
		};

		cpul_idle_zone {
			polling-delay-passive = <0x64>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x15 0x05>;
			phandle = <0x15d>;

			trips {
				phandle = <0x15e>;

				trip-point@0 {
					temperature = <0x15f90>;
					type = "passive";
					hysteresis = <0x7d0>;
					phandle = <0x15f>;
				};

				trip-point@1 {
					temperature = <0x186a0>;
					type = "passive";
					hysteresis = <0x7d0>;
					phandle = <0x18>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x18>;
					cooling-device = <0x19 0x00 0x32 0x1a 0x00 0x32 0x1b 0x00 0x32 0x1c 0x00 0x32>;
					contribution = <0x400>;
				};
			};
		};

		cpub_idle_zone {
			polling-delay-passive = <0x64>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x15 0x06>;
			phandle = <0x160>;

			trips {
				phandle = <0x161>;

				trip-point@0 {
					temperature = <0x15f90>;
					type = "passive";
					hysteresis = <0x7d0>;
					phandle = <0x162>;
				};

				trip-point@1 {
					temperature = <0x186a0>;
					type = "passive";
					hysteresis = <0x7d0>;
					phandle = <0x1d>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x1d>;
					cooling-device = <0x1e 0x00 0x64 0x1f 0x00 0x64>;
					contribution = <0x400>;
				};
			};
		};

		gpu_thermal_zone {
			polling-delay-passive = <0x64>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x15 0x04>;
			sustainable-power = <0x960>;
			phandle = <0x163>;

			trips {
				phandle = <0x164>;

				trip-point@0 {
					temperature = <0xea60>;
					type = "passive";
					hysteresis = <0x00>;
					phandle = <0x20>;
				};

				trip-point@1 {
					temperature = <0x15f90>;
					type = "passive";
					hysteresis = <0x00>;
					phandle = <0x22>;
				};

				gpu_crit@0 {
					temperature = <0x1adb0>;
					type = "critical";
					hysteresis = <0x00>;
					phandle = <0x23>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x20>;
					cooling-device = <0x21 0x00 0x00>;
					contribution = <0x400>;
				};

				map1 {
					trip = <0x22>;
					cooling-device = <0x21 0x00 0x03>;
					contribution = <0x400>;
				};

				map2 {
					trip = <0x23>;
					cooling-device = <0x21 0x03 0x03>;
					contribution = <0x400>;
				};
			};
		};

		npu_thermal_zone {
			polling-delay-passive = <0x64>;
			polling-delay = <0x3e8>;
			thermal-sensors = <0x15 0x02>;
			phandle = <0x165>;

			trips {
				phandle = <0x166>;

				npu_crit@0 {
					temperature = <0x1adb0>;
					type = "critical";
					hysteresis = <0x00>;
					phandle = <0x167>;
				};
			};
		};

		ddr_thermal_zone {
			polling-delay-passive = <0x00>;
			polling-delay = <0x00>;
			thermal-sensors = <0x15 0x01>;
			phandle = <0x168>;

			trips {
				phandle = <0x169>;

				ddr_crit@0 {
					temperature = <0x1adb0>;
					type = "critical";
					hysteresis = <0x00>;
					phandle = <0x16a>;
				};
			};
		};

		skin_zone {
			polling-delay-passive = <0x00>;
			polling-delay = <0x00>;
			thermal-sensors = <0x15 0x07>;

			trips {
				phandle = <0x16b>;

				skin_crit@0 {
					temperature = <0xc350>;
					type = "critical";
					hysteresis = <0x00>;
					phandle = <0x16c>;
				};
			};
		};
	};

	pck-600@7060000 {
		compatible = "allwinner,sun60iw2-pck\0syscon\0simple-mfd";
		reg = <0x00 0x7060000 0x00 0xb000>;
		phandle = <0x16d>;

		power-controller {
			compatible = "allwinner,sun60iw2-pck-600";
			clocks = <0x24 0x13>;
			clock-names = "pck";
			#power-domain-cells = <0x01>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x13>;

			pd_vi@0 {
				reg = <0x00>;
			};

			pd_ve_dec@2 {
				reg = <0x02>;
			};

			pd_ve_enc@3 {
				reg = <0x03>;
			};

			pd_gpu_top@5 {
				reg = <0x05>;
			};

			pd_gpu_core@6 {
				reg = <0x06>;
			};

			pd_pcie@7 {
				reg = <0x07>;
			};

			pd_npu@4 {
				reg = <0x04>;
			};

			pd_usb2@8 {
				reg = <0x08>;
			};

			pd_de_sys@1 {
				reg = <0x01>;
			};

			pd_vo@9 {
				reg = <0x09>;
			};

			pd_vo1@10 {
				reg = <0x0a>;
			};
		};
	};

	dram {
		compatible = "allwinner,dram";
		clocks = <0x12 0x01>;
		clock-names = "pll_ddr";
		phandle = <0x16e>;
	};

	clk_ddr {
		compatible = "allwinner,sun60iw2_clock_ddr";
		reg = <0x00 0x2002000 0x00 0x1000>;
		clocks = <0x12 0x01>;
		clock-names = "pll_ddr";
		#clock-cells = <0x00>;
		phandle = <0x25>;
	};

	opp_table {
		compatible = "operating-points-v2";
		phandle = <0x26>;

		opp@150000000 {
			opp-hz = <0x00 0x8f0d180>;
			clock-latency-ns = <0x249f0>;
			opp-microvolt = <0xdbba0>;
		};
	};

	dmcfreq@3120000 {
		compatible = "allwinner,sun60iw2-dmc\0syscon";
		reg = <0x00 0xa020000 0x00 0x2000 0x00 0x2020000 0x00 0x4000 0x00 0xa100000 0x00 0x11000>;
		interrupts = <0x00 0xb7 0x04>;
		clocks = <0x25 0x12 0x33>;
		clock-names = "dram\0bus";
		operating-points-v2 = <0x26>;
		upthreshold = <0x3c>;
		downdifferential = <0x14>;
		vddcore-supply = <0x27>;
		normalvoltage = <0xdbba0>;
		boostvoltage = <0xdbba0>;
		phandle = <0x16f>;
	};

	soc@3000000 {
		compatible = "simple-bus";
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;
		phandle = <0x170>;

		ve@1c0e000 {
			compatible = "allwinner,sunxi-cedar-ve";
			reg = <0x00 0x1c0e000 0x00 0x3000 0x00 0x3000000 0x00 0x10>;
			interrupts = <0x00 0x31 0x04>;
			clocks = <0x12 0x21 0x12 0x4b 0x12 0x53 0x12 0x58 0x12 0x81 0x12 0x80>;
			clock-names = "pll_ve\0ahb_gate\0mbus_gate\0mbus_ve\0bus_ve\0ve";
			resets = <0x12 0x19>;
			reset-names = "reset_ve";
			operating-points-v2 = <0x28>;
			iommus = <0x29 0x06 0x01>;
			ve-supply = <0x2a>;
			status = "okay";
			phandle = <0x171>;
		};

		ve1@1c0e000 {
			compatible = "allwinner,sunxi-cedar-ve1";
			iommus = <0x29 0x07 0x01>;
			phandle = <0x172>;
		};

		ve2@1c10000 {
			compatible = "allwinner,sunxi-cedar-ve2";
			reg = <0x00 0x1c10000 0x00 0x1000 0x00 0x3000000 0x00 0x10>;
			interrupts = <0x00 0x30 0x04>;
			clocks = <0x12 0x22 0x12 0x4a 0x12 0x54 0x12 0x60 0x12 0x82 0x12 0x7f>;
			clock-names = "pll_ve\0ahb_gate\0mbus_gate\0mbus_ve\0bus_ve\0ve";
			resets = <0x12 0x1a>;
			reset-names = "reset_ve";
			operating-points-v2 = <0x28>;
			iommus = <0x29 0x03 0x01>;
			ve_top_reg_offset = <0x800>;
			phandle = <0x173>;
		};

		rtc_ccu@7090000 {
			compatible = "allwinner,sun60iw2-rtc-ccu";
			reg = <0x00 0x7090000 0x00 0x400>;
			#clock-cells = <0x01>;
			#reset-cells = <0x01>;
			phandle = <0x2b>;
		};

		cpupll_ccu@8870000 {
			compatible = "allwinner,sun60iw2-cpupll";
			reg = <0x00 0x8870000 0x00 0x3034>;
			clocks = <0x2b 0x0c>;
			clock-names = "dcxo";
			#clock-cells = <0x01>;
			#reset-cells = <0x01>;
			phandle = <0x05>;
		};

		ccu@2002000 {
			compatible = "allwinner,sun60iw2-ccu";
			reg = <0x00 0x2002000 0x00 0x2000>;
			clocks = <0x2c 0x2b 0x03 0x2d>;
			clock-names = "hosc\0losc\0iosc";
			#clock-cells = <0x01>;
			#reset-cells = <0x01>;
			clk-init-gate = <0x01>;
			phandle = <0x12>;
		};

		r_ccu@7010000 {
			compatible = "allwinner,sun60iw2-r-ccu";
			reg = <0x00 0x7010000 0x00 0x340>;
			#clock-cells = <0x01>;
			#reset-cells = <0x01>;
			phandle = <0x24>;
		};

		dump_reg@44000 {
			compatible = "allwinner,sunxi-dump-reg";
			reg = <0x00 0x44000 0x00 0x04>;
			phandle = <0x174>;
		};

		timer@3009000 {
			compatible = "allwinner,sun50i-timer";
			device_type = "soc_timer";
			reg = <0x00 0x3009000 0x00 0x400>;
			interrupt-parent = <0x02>;
			interrupts = <0x00 0x59 0x04>;
			clock-names = "parent\0bus\0timer0-mod\0timer1-mod";
			clocks = <0x2e 0x12 0x74 0x12 0x6a 0x12 0x6b>;
			resets = <0x12 0x13>;
			phandle = <0x175>;
		};

		rtc@7090000 {
			compatible = "allwinner,rtc-v201";
			device_type = "rtc";
			wakeup-source;
			reg = <0x00 0x7090000 0x00 0x320>;
			interrupts = <0x00 0xc4 0x04>;
			clocks = <0x24 0x18 0x2b 0x06 0x2b 0x0b>;
			clock-names = "r-ahb-rtc\0rtc-1k\0rtc-spi";
			resets = <0x24 0x0a>;
			gpr_cur_pos = <0x06>;
			gpr_bootcount_pos = <0x07>;
			phandle = <0x176>;
		};

		pinctrl@2000000 {
			compatible = "allwinner,sun60iw2-pinctrl";
			reg = <0x00 0x2000000 0x00 0x600>;
			interrupts = <0x00 0x45 0x04 0x00 0x47 0x04 0x00 0x49 0x04 0x00 0x4b 0x04 0x00 0x4d 0x04 0x00 0x4f 0x04 0x00 0x51 0x04 0x00 0x53 0x04 0x00 0x55 0x04 0x00 0x57 0x04>;
			clocks = <0x12 0x2d 0x2c 0x2b 0x03>;
			clock-names = "apb\0hosc\0losc";
			gpio-controller;
			#gpio-cells = <0x03>;
			interrupt-controller;
			#interrupt-cells = <0x03>;
			phandle = <0x33>;

			sdc0@5 {
				pins = "PF2";
				function = "sdc0";
				drive-strength = <0x1e>;
				bias-pull-up;
				power-source = <0xce4>;
				phandle = <0x10e>;
			};

			sdc0@6 {
				pins = "PF2";
				function = "sdc0";
				drive-strength = <0x1e>;
				bias-pull-up;
				power-source = <0x708>;
				phandle = <0x110>;
			};

			sdc0@0 {
				pins = "PF0\0PF1\0PF3\0PF4\0PF5";
				function = "sdc0";
				drive-strength = <0x0a>;
				bias-pull-up;
				power-source = <0xce4>;
				phandle = <0x10d>;
			};

			sdc0@1 {
				pins = "PF0\0PF1\0PF3\0PF4\0PF5";
				function = "sdc0";
				drive-strength = <0x0a>;
				bias-pull-up;
				power-source = <0x708>;
				phandle = <0x10f>;
			};

			sdc0@2 {
				pins = "PF0\0PF1\0PF2\0PF3\0PF4\0PF5";
				function = "gpio_in";
				power-source = <0xce4>;
				phandle = <0x111>;
			};

			sdc0@3 {
				pins = "PF2\0PF4";
				function = "uart0";
				drive-strength = <0x0a>;
				bias-pull-up;
				power-source = <0xce4>;
				phandle = <0x112>;
			};

			sdc0@4 {
				pins = "PF0\0PF1\0PF3\0PF5";
				function = "jtag";
				drive-strength = <0x0a>;
				bias-pull-up;
				power-source = <0xce4>;
				phandle = <0x113>;
			};

			sdc1@0 {
				pins = "PG1\0PG2\0PG3\0PG4\0PG5";
				function = "sdc1";
				drive-strength = <0x0a>;
				bias-pull-up;
				phandle = <0x114>;
			};

			sdc1@1 {
				pins = "PG0\0PG1\0PG2\0PG3\0PG4\0PG5";
				function = "gpio_in";
				phandle = <0x116>;
			};

			sdc1@2 {
				pins = "PG0";
				function = "sdc1";
				drive-strength = <0x14>;
				bias-pull-up;
				phandle = <0x115>;
			};

			sdc2@0 {
				pins = "PC6\0PC8\0PC9\0PC10\0PC11\0PC13\0PC14\0PC15\0PC16";
				function = "sdc2";
				drive-strength = <0x14>;
				bias-pull-up;
				phandle = <0x105>;
			};

			sdc2@1 {
				pins = "PC0\0PC1\0PC5\0PC6\0PC8\0PC9\0PC10\0PC11\0PC13\0PC14\0PC15\0PC16";
				function = "gpio_in";
				phandle = <0x108>;
			};

			sdc2@2 {
				pins = "PC0";
				function = "sdc2";
				drive-strength = <0x28>;
				bias-pull-down;
				phandle = <0x106>;
			};

			sdc2@3 {
				pins = "PC5\0PC1";
				function = "sdc2";
				drive-strength = <0x28>;
				bias-pull-up;
				phandle = <0x107>;
			};

			sdc3@0 {
				pins = "PC6\0PC8\0PC9\0PC10\0PC11\0PC13\0PC14\0PC15\0PC16";
				function = "sdc3";
				drive-strength = <0x14>;
				bias-pull-up;
				phandle = <0x109>;
			};

			sdc3@1 {
				pins = "PC0\0PC1\0PC5\0PC6\0PC8\0PC9\0PC10\0PC11\0PC13\0PC14\0PC15\0PC16";
				function = "gpio_in";
				phandle = <0x10c>;
			};

			sdc3@2 {
				pins = "PC0";
				function = "sdc3";
				drive-strength = <0x28>;
				bias-pull-down;
				phandle = <0x10a>;
			};

			sdc3@3 {
				pins = "PC5\0PC1";
				function = "sdc3";
				drive-strength = <0x28>;
				bias-pull-up;
				phandle = <0x10b>;
			};

			csi_mclk0@0 {
				pins = "PE0";
				function = "mcsi0";
				drive-strength = <0x14>;
				phandle = <0xad>;
			};

			csi_mclk0@1 {
				pins = "PE0";
				function = "gpio_in";
				phandle = <0xae>;
			};

			csi_mclk1@0 {
				pins = "PE5";
				function = "mcsi1";
				drive-strength = <0x14>;
				phandle = <0xaf>;
			};

			csi_mclk1@1 {
				pins = "PE5";
				function = "gpio_in";
				phandle = <0xb0>;
			};

			csi_mclk2@0 {
				pins = "PE9";
				function = "mcsi2";
				drive-strength = <0x14>;
				phandle = <0xb1>;
			};

			csi_mclk2@1 {
				pins = "PE9";
				function = "gpio_in";
				phandle = <0xb2>;
			};

			ncsi0_8bit@0 {
				pins = "PE0\0PE1\0PE2\0PE3\0PE4\0PE6\0PE7\0PE8\0PE9\0PE10";
				function = "ncsi";
				drive-strength = <0x14>;
				phandle = <0x177>;
			};

			ncsi0_8bit@1 {
				pins = "PE0\0PE1\0PE2\0PE3\0PE4\0PE6\0PE7\0PE8\0PE9\0PE10";
				function = "gpio_in";
				phandle = <0x178>;
			};

			ncsi1_8bit@0 {
				pins = "PK0\0PK1\0PK2\0PK19\0PK18\0PK17\0PK16\0PK15\0PK14\0PK13\0PK12";
				function = "ncsi";
				drive-strength = <0x14>;
				phandle = <0x179>;
			};

			ncsi1_8bit@1 {
				pins = "PK0\0PK1\0PK2\0PK19\0PK18\0PK17\0PK16\0PK15\0PK14\0PK13\0PK12";
				function = "gpio_in";
				phandle = <0x17a>;
			};

			ncsi1_16bit@0 {
				pins = "PK0\0PK1\0PK2\0PK19\0PK18\0PK17\0PK16\0PK15\0PK14\0PK13\0PK12\0PK11\0PK10\0PK9\0PK8\0PK7\0PK6\0PK5\0PK4";
				function = "ncsi";
				drive-strength = <0x14>;
				phandle = <0x17b>;
			};

			ncsi1_16bit@1 {
				pins = "PK0\0PK1\0PK2\0PK19\0PK18\0PK17\0PK16\0PK15\0PK14\0PK13\0PK12\0PK11\0PK10\0PK9\0PK8\0PK7\0PK6\0PK5\0PK4";
				function = "gpio_in";
				phandle = <0x17c>;
			};

			mipia@0 {
				pins = "PK0\0PK1\0PK2\0PK3\0PK4\0PK5\0PK6\0PK7\0PK8\0PK9";
				function = "mcsia";
				drive-strength = <0x0a>;
				phandle = <0xb3>;
			};

			mipia@1 {
				pins = "PK0\0PK1\0PK2\0PK3\0PK4\0PK5\0PK6\0PK7\0PK8\0PK9";
				function = "gpio_in";
				phandle = <0xb4>;
			};

			mipib@0 {
				pins = "PK10\0PK11\0PK12\0PK13\0PK14\0PK15\0PK16\0PK17\0PK18\0PK19";
				function = "mcsib";
				drive-strength = <0x0a>;
				phandle = <0xb5>;
			};

			mipib@1 {
				pins = "PK10\0PK11\0PK12\0PK13\0PK14\0PK15\0PK16\0PK17\0PK18\0PK19";
				function = "gpio_in";
				phandle = <0xb6>;
			};

			mipic@0 {
				pins = "PK20\0PK21\0PK22\0PK23\0PK24\0PK25";
				function = "mcsic";
				drive-strength = <0x0a>;
				phandle = <0xb7>;
			};

			mipic@1 {
				pins = "PK20\0PK21\0PK22\0PK23\0PK24\0PK25";
				function = "gpio_in";
				phandle = <0xb8>;
			};

			dsi0_4lane@0 {
				pins = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD6\0PD7\0PD8\0PD9";
				function = "dsi0";
				drive-strength = <0x1e>;
				bias-disable;
				phandle = <0x17d>;
			};

			dsi0_4lane@1 {
				pins = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD6\0PD7\0PD8\0PD9";
				function = "io_disabled";
				bias-disable;
				phandle = <0x17e>;
			};

			dsi1_4lane@0 {
				pins = "PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD16\0PD17\0PD18\0PD19";
				function = "dsi1";
				drive-strength = <0x1e>;
				bias-disable;
				phandle = <0xe7>;
			};

			dsi1_4lane@1 {
				pins = "PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD16\0PD17\0PD18\0PD19";
				function = "io_disabled";
				bias-disable;
				phandle = <0xe8>;
			};

			lvds0@0 {
				pins = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD6\0PD7\0PD8\0PD9";
				function = "lvds0";
				drive-strength = <0x1e>;
				phandle = <0xef>;
			};

			lvds0@1 {
				pins = "PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PD6\0PD7\0PD8\0PD9";
				function = "gpio_in";
				phandle = <0xf0>;
			};

			lvds1@0 {
				pins = "PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD16\0PD17\0PD18\0PD19";
				function = "lvds1";
				drive-strength = <0x1e>;
				phandle = <0x17f>;
			};

			lvds1@1 {
				pins = "PD10\0PD11\0PD12\0PD13\0PD14\0PD15\0PD16\0PD17\0PD18\0PD19";
				function = "gpio_in";
				phandle = <0x180>;
			};

			lvds2@0 {
				pins = "PJ0\0PJ1\0PJ2\0PJ3\0PJ4\0PJ5\0PJ6\0PJ7\0PJ8\0PJ9";
				function = "lvds2";
				drive-strength = <0x1e>;
				phandle = <0xf4>;
			};

			lvds2@1 {
				pins = "PJ0\0PJ1\0PJ2\0PJ3\0PJ4\0PJ5\0PJ6\0PJ7\0PJ8\0PJ9";
				function = "gpio_in";
				phandle = <0xf5>;
			};

			lvds3@0 {
				pins = "PJ10\0PJ11\0PJ12\0PJ13\0PJ14\0PJ15\0PJ16\0PJ17\0PJ18\0PJ19";
				function = "lvds3";
				drive-strength = <0x1e>;
				phandle = <0x181>;
			};

			lvds3@1 {
				pins = "PJ10\0PJ11\0PJ12\0PJ13\0PJ14\0PJ15\0PJ16\0PJ17\0PJ18\0PJ19";
				function = "gpio_in";
				phandle = <0x182>;
			};

			rgb0@0 {
				pins = "PG0\0PG1\0PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PG2\0PG3\0PD6\0PD7\0PD8\0PD9\0PD10\0PD11\0PG4\0PG5\0PD12\0PD13\0PD14\0PD15\0PD16\0PD17\0PD18\0PD19\0PD20\0PD21";
				function = "lcd0";
				drive-strength = <0x0a>;
				phandle = <0x183>;
			};

			rgb0@1 {
				pins = "PG0\0PG1\0PD0\0PD1\0PD2\0PD3\0PD4\0PD5\0PG2\0PG3\0PD6\0PD7\0PD8\0PD9\0PD10\0PD11\0PG4\0PG5\0PD12\0PD13\0PD14\0PD15\0PD16\0PD17\0PD18\0PD19\0PD20\0PD21";
				function = "gpio_in";
				phandle = <0x184>;
			};

			rgb1@0 {
				pins = "PJ0\0PJ1\0PJ2\0PJ3\0PJ4\0PJ5\0PJ6\0PJ7\0PJ8\0PJ9\0PJ10\0PJ11\0PJ12\0PJ13\0PJ14\0PJ15\0PJ16\0PJ17\0PJ18\0PJ19\0PJ20\0PJ21\0PJ22\0PJ23\0PJ24\0PJ25\0PJ26\0PJ27";
				function = "lcd1";
				drive-strength = <0x0a>;
				phandle = <0x185>;
			};

			rgb1@1 {
				pins = "PJ0\0PJ1\0PJ2\0PJ3\0PJ4\0PJ5\0PJ6\0PJ7\0PJ8\0PJ9\0PJ10\0PJ11\0PJ12\0PJ13\0PJ14\0PJ15\0PJ16\0PJ17\0PJ18\0PJ19\0PJ20\0PJ21\0PJ22\0PJ23\0PJ24\0PJ25\0PJ26\0PJ27";
				function = "gpio_in";
				phandle = <0x186>;
			};

			test_pins@0 {
				pins = "PB9\0PB10";
				function = "test";
				drive-strength = <0x0a>;
				bias-pull-up;
				phandle = <0x30>;
			};

			test_pins@1 {
				pins = "PB9\0PB10";
				function = "gpio_in";
				phandle = <0x31>;
			};

			uart0_pins@0 {
				pins = [00 00];
				function = "uart0";
				drive-strength = <0x0a>;
				phandle = <0x34>;
			};

			uart0_pins@1 {
				pins = [00 00];
				function = "gpio_in";
				drive-strength = <0x0a>;
				phandle = <0x35>;
			};

			uart1_pins@0 {
				pins = "PG6\0PG7\0PG8\0PG9";
				function = "uart1";
				drive-strength = <0x0a>;
				bias-pull-up;
				phandle = <0x37>;
			};

			uart1_pins@1 {
				pins = "PG6\0PG7\0PG8\0PG9";
				function = "gpio_in";
				phandle = <0x38>;
			};

			uart2_pins@0 {
				pins = "PB0\0PB1\0PB2\0PB3";
				function = "uart2";
				drive-strength = <0x0a>;
				phandle = <0x39>;
			};

			uart2_pins@1 {
				pins = "PB0\0PB1\0PB2\0PB3";
				function = "io_disabled";
				drive-strength = <0x0a>;
				phandle = <0x3a>;
			};

			uart3_pins@0 {
				pins = "PI1\0PI12";
				function = "uart3";
				drive-strength = <0x0a>;
				phandle = <0x3b>;
			};

			uart3_pins@1 {
				pins = "PI11\0PI12";
				function = "io_disabled";
				drive-strength = <0x0a>;
				phandle = <0x3c>;
			};

			uart4_pins@0 {
				pins = "PI0\0PI1";
				function = "uart4";
				drive-strength = <0x0a>;
				phandle = <0x3d>;
			};

			uart4_pins@1 {
				pins = "PI0\0PI1";
				function = "io_disabled";
				drive-strength = <0x0a>;
				phandle = <0x3e>;
			};

			uart5_pins@0 {
				pins = "PI11\0PI12";
				function = "uart5";
				drive-strength = <0x0a>;
				phandle = <0x3f>;
			};

			uart5_pins@1 {
				pins = "PI11\0PI12";
				function = "io_disabled";
				drive-strength = <0x0a>;
				phandle = <0x40>;
			};

			uart6_pins@0 {
				pins = "PI6\0PI7";
				function = "uart6";
				drive-strength = <0x0a>;
				phandle = <0x41>;
			};

			uart6_pins@1 {
				pins = "PI6\0PI7";
				function = "io_disabled";
				drive-strength = <0x0a>;
				phandle = <0x42>;
			};

			uart7_pins@0 {
				pins = "PB11\0PB12\0PB13\0PB14";
				function = "uart7";
				drive-strength = <0x0a>;
				phandle = <0x43>;
			};

			uart7_pins@1 {
				pins = "PB11\0PB12\0PB13\0PB14";
				function = "io_disabled";
				drive-strength = <0x0a>;
				phandle = <0x44>;
			};

			pwm0_9@0 {
				pins = "PI8";
				function = "pwm0_9";
				drive-strength = <0x0a>;
				phandle = <0x8a>;
			};

			pwm0_9@1 {
				pins = "PI8";
				function = "gpio_in";
				bias-pull-down;
				phandle = <0x8b>;
			};

			pwm1@0 {
				pins = "PE15";
				function = "pwm1_9";
				drive-strength = <0x0a>;
				phandle = <0x98>;
			};

			pwm1@1 {
				pins = "PE15";
				function = "gpio_in";
				bias-pull-down;
				phandle = <0x99>;
			};

			pwm6@0 {
				pins = "PI15";
				function = "pwm1_6";
				drive-strength = <0x0a>;
				phandle = <0x96>;
			};

			pwm6@1 {
				pins = "PI15";
				function = "gpio_in";
				bias-pull-down;
				phandle = <0x97>;
			};

			twi0@0 {
				pins = "PD22\0PD23";
				function = "twi0";
				drive-strength = <0x0a>;
				bias-pull-up;
				phandle = <0x45>;
			};

			twi0@1 {
				pins = "PD22\0PD23";
				function = "gpio_in";
				phandle = <0x46>;
			};

			twi2@0 {
				pins = "PE1\0PE2";
				function = "twi2";
				drive-strength = <0x0a>;
				bias-pull-up;
				phandle = <0x48>;
			};

			twi2@1 {
				pins = "PE1\0PE2";
				function = "gpio_in";
				phandle = <0x49>;
			};

			hym8563-int@0 {
				pins = "PK20";
				function = "gpio_in";
				drive-strength = <0x0a>;
				bias-pull-up;
				phandle = <0x4d>;
			};

			husb311-int@0 {
				pins = "PK21";
				function = "gpio_in";
				drive-strength = <0x0a>;
				bias-pull-up;
				phandle = <0x5a>;
			};

			twi3@0 {
				pins = "PE3\0PE4";
				function = "twi3";
				drive-strength = <0x0a>;
				bias-pull-up;
				phandle = <0x4b>;
			};

			twi3@1 {
				pins = "PE3\0PE4";
				function = "gpio_in";
				phandle = <0x4c>;
			};

			twi4@0 {
				pins = "PE10\0PE11";
				function = "twi4";
				drive-strength = <0x28>;
				bias-pull-up;
				phandle = <0x4e>;
			};

			twi4@1 {
				pins = "PE10\0PE11";
				function = "gpio_in";
				phandle = <0x4f>;
			};

			twi5@0 {
				pins = "PI11\0PI12";
				function = "twi5";
				drive-strength = <0x0a>;
				bias-pull-up;
				phandle = <0x50>;
			};

			twi5@1 {
				pins = "PI11\0PI12";
				function = "gpio_in";
				phandle = <0x51>;
			};

			twi7@0 {
				pins = "PH18\0PH19";
				function = "twi7";
				drive-strength = <0x0a>;
				bias-pull-up;
				phandle = <0x52>;
			};

			twi7@1 {
				pins = "PH18\0PH19";
				function = "gpio_in";
				phandle = <0x53>;
			};

			twi8@0 {
				pins = "PI15\0PI16";
				function = "twi8";
				drive-strength = <0x28>;
				bias-pull-up;
				phandle = <0x54>;
			};

			twi8@1 {
				pins = "PI15\0PI16";
				function = "gpio_in";
				phandle = <0x55>;
			};

			twi11@0 {
				pins = "PI4\0PI5";
				function = "twi11";
				drive-strength = <0x0a>;
				bias-pull-up;
				phandle = <0x56>;
			};

			twi11@1 {
				pins = "PI4\0PI5";
				function = "gpio_in";
				phandle = <0x57>;
			};

			twi12@0 {
				pins = "PK24\0PK25";
				function = "twi12";
				drive-strength = <0x0a>;
				bias-pull-up;
				phandle = <0x58>;
			};

			twi12@1 {
				pins = "PK24\0PK25";
				function = "gpio_in";
				phandle = <0x59>;
			};

			i2s0@0 {
				pins = "PB4";
				function = "i2s0_mclk";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x119>;
			};

			i2s0@1 {
				pins = "PB5";
				function = "i2s0_bclk";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x11a>;
			};

			i2s0@2 {
				pins = "PB6";
				function = "i2s0_lrck";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x11b>;
			};

			i2s0@4 {
				pins = "PB7";
				function = "i2s0_dout0";
				allwinner,drive = <0x01>;
				bias-pull-down;
				phandle = <0x11d>;
			};

			i2s0@3 {
				pins = "PB8";
				function = "i2s0_din0";
				allwinner,drive = <0x01>;
				bias-pull-down;
				phandle = <0x11c>;
			};

			i2s0@5 {
				pins = "PB4\0PB5\0PB6\0PB7\0PB8";
				function = "io_disabled";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x11e>;
			};

			i2s1@0 {
				pins = "PG10";
				function = "i2s1_mclk";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x122>;
			};

			i2s1@1 {
				pins = "PG11";
				function = "i2s1_bclk";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x123>;
			};

			i2s1@2 {
				pins = "PG12";
				function = "i2s1_lrck";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x124>;
			};

			i2s1@3 {
				pins = "PG13";
				function = "i2s1_dout0";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x125>;
			};

			i2s1@4 {
				pins = "PG14";
				function = "i2s1_din0";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x126>;
			};

			i2s1@5 {
				pins = "PG10\0PG11\0PG12\0PG13\0PG14";
				function = "io_disabled";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x127>;
			};

			i2s2@1 {
				pins = "PH3";
				function = "i2s2_bclk";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x187>;
			};

			i2s2@2 {
				pins = "PH4";
				function = "i2s2_lrck";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x188>;
			};

			i2s2@3 {
				pins = "PH6";
				function = "i2s2_din0";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x189>;
			};

			i2s2@4 {
				pins = "PH5";
				function = "i2s2_dout0";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x18a>;
			};

			i2s2@5 {
				pins = "PH3\0PH4\0PH5\0PH6";
				function = "io_disabled";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x18b>;
			};

			i2s4@0 {
				pins = "PJ17";
				function = "i2s4_mclk";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x12f>;
			};

			i2s4@1 {
				pins = "PJ16";
				function = "i2s4_bclk";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x130>;
			};

			i2s4@2 {
				pins = "PJ18";
				function = "i2s4_lrck";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x131>;
			};

			i2s4@3 {
				pins = "PJ19";
				function = "i2s4_din0";
				allwinner,drive = <0x01>;
				bias-pull-down;
				phandle = <0x132>;
			};

			i2s4@5 {
				pins = "PJ16\0PJ17\0PJ18\0PJ19";
				function = "io_disabled";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x133>;
			};

			owa@0 {
				pins = "PI10";
				function = "owa0";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x137>;
			};

			owa@1 {
				pins = "PI10";
				function = "io_disabled";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x138>;
			};

			dmic@0 {
				pins = "PH8\0PH9\0PH10\0PH11\0PH12";
				function = "dmic";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x13a>;
			};

			dmic@1 {
				pins = "PH8\0PH9\0PH10\0PH11\0PH12";
				function = "io_disabled";
				allwinner,drive = <0x01>;
				bias-disable;
				phandle = <0x13b>;
			};

			gmac0@0 {
				pins = "PH0\0PH1\0PH2\0PH3\0PH4\0PH5\0PH6\0PH7\0PH8\0PH9\0PH10\0PH11\0PH12\0PH13\0PH14\0PH15";
				function = "rgmii0";
				allwinner,drive = <0x01>;
				bias-pull-up;
				phandle = <0xbf>;
			};

			gmac0@1 {
				pins = "PH0\0PH1\0PH2\0PH3\0PH4\0PH5\0PH6\0PH7\0PH8\0PH9\0PH10\0PH11\0PH12\0PH13\0PH14\0PH15";
				function = "io_disabled";
				phandle = <0xc0>;
			};

			gmac1@0 {
				pins = "PJ0\0PJ1\0PJ2\0PJ3\0PJ4\0PJ5\0PJ6\0PJ7\0PJ8\0PJ9\0PJ10\0PJ11\0PJ12\0PJ13\0PJ14\0PJ15";
				function = "rgmii1";
				allwinner,drive = <0x01>;
				bias-pull-up;
				phandle = <0xc2>;
			};

			gmac1@1 {
				pins = "PJ0\0PJ1\0PJ2\0PJ3\0PJ4\0PJ5\0PJ6\0PJ7\0PJ8\0PJ9\0PJ10\0PJ11\0PJ12\0PJ13\0PJ14\0PJ15";
				function = "io_disabled";
				phandle = <0xc3>;
			};

			spi1@0 {
				pins = "PH2\0PH3\0PH5\0PH6";
				function = "spi1";
				allwinner,drive = <0x01>;
				phandle = <0xc4>;
			};

			spi1@1 {
				pins = "PH2\0PH3\0PH5\0PH6";
				function = "io_disabled";
				phandle = <0xc5>;
			};

			spi4@0 {
				pins = "PI2\0PI3\0PI4\0PI5\0PI9";
				function = "spi4";
				allwinner,drive = <0x01>;
				phandle = <0xc9>;
			};

			spi4@1 {
				pins = "PI2\0PI3\0PI4\0PI5\0PI9";
				function = "io_disabled";
				phandle = <0xca>;
			};

			spi2@0 {
				pins = "PB1\0PB2\0PB3";
				function = "spi2";
				allwinner,drive = <0x01>;
				phandle = <0xc6>;
			};

			spi2@1 {
				pins = "PB0";
				function = "spi2";
				allwinner,drive = <0x01>;
				bias-pull-up;
				phandle = <0xc7>;
			};

			spi2@2 {
				pins = "PB0\0PB1\0PB2\0PB3";
				function = "io_disabled";
				phandle = <0xc8>;
			};

			ledc@0 {
				pins = "PE4";
				function = "ledc";
				drive-strength = <0x0a>;
				phandle = <0xa6>;
			};

			ledc@1 {
				pins = "PE4";
				function = "gpio_in";
				phandle = <0xa7>;
			};
		};

		pinctrl@7025000 {
			#address-cells = <0x01>;
			compatible = "allwinner,sun60iw2-r-pinctrl";
			reg = <0x00 0x7025000 0x00 0x410>;
			interrupts = <0x00 0xc6 0x04 0x00 0xc8 0x04>;
			clocks = <0x24 0x01 0x2c 0x2b 0x03>;
			clock-names = "apb\0hosc\0losc";
			gpio-controller;
			#gpio-cells = <0x03>;
			interrupt-controller;
			#interrupt-cells = <0x03>;
			phandle = <0x32>;

			s_twi0@0 {
				pins = "PL0\0PL1";
				function = "s_twi0";
				drive-strength = <0x0a>;
				bias-pull-up;
				phandle = <0x5f>;
			};

			s_twi0@1 {
				pins = "PL0\0PL1";
				function = "gpio_in";
				phandle = <0x60>;
			};

			s_twi1@0 {
				pins = "PL8\0PL9";
				function = "s_twi1";
				drive-strength = <0x0a>;
				bias-pull-up;
				phandle = <0x7c>;
			};

			s_twi1@1 {
				pins = "PL8\0PL9";
				function = "gpio_in";
				phandle = <0x7d>;
			};

			s_twi2@0 {
				pins = "PL10\0PL11";
				function = "s_twi2";
				drive-strength = <0x0a>;
				bias-pull-up;
				phandle = <0x7e>;
			};

			s_twi2@1 {
				pins = "PL10\0PL11";
				function = "gpio_in";
				phandle = <0x7f>;
			};

			s_irrx@0 {
				pins = "PL4";
				function = "s_ir_rx";
				phandle = <0xa4>;
			};

			s_irrx@1 {
				pins = "PL4";
				function = "gpio_in";
				phandle = <0xa5>;
			};
		};

		watchdog@2050000 {
			compatible = "allwinner,wdt-v103";
			reg = <0x00 0x2050000 0x00 0x20>;
			interrupts = <0x00 0x6a 0x04>;
			phandle = <0x18c>;
		};

		dma-controller@4601000 {
			compatible = "allwinner,dma-v106";
			reg = <0x00 0x4601000 0x00 0x2000>;
			interrupts = <0x00 0x6f 0x04>;
			clocks = <0x12 0x62 0x12 0x61>;
			clock-names = "bus\0mbus";
			dma-channels = <0x10>;
			dma-requests = <0x40>;
			resets = <0x12 0x0b>;
			#dma-cells = <0x01>;
			phandle = <0x36>;
		};

		sid@3006000 {
			compatible = "allwinner,sunxi-sid";
			reg = <0x00 0x3006000 0x00 0x1000>;
			#address-cells = <0x01>;
			#size-cells = <0x01>;
			non-secure-maxoffset = <0x7c>;
			non-secure-maxlen = <0x20>;
			sid-supply = <0x2f>;
			voltage = <0x708>;
			phandle = <0x18d>;

			secure_status {
				reg = <0x00 0x00>;
				offset = <0xa0>;
				size = <0x04>;
			};

			chipid {
				reg = <0x00 0x00>;
				offset = <0x200>;
				size = <0x10>;
			};

			rotpk {
				reg = <0x00 0x00>;
				offset = <0x140>;
				size = <0x20>;
			};

			ufs_cal_word_l {
				offset = <0x260>;
				mask = <0xfffffff>;
				shift = <0x00>;
			};

			ufs_cal_word_h {
				offset = <0x264>;
				mask = <0xfffffff>;
				shift = <0x00>;
			};

			dvfs_ori {
				offset = <0x24c>;
				mask = <0xff>;
				shift = <0x08>;
			};

			dvfs_bak {
				offset = <0x24c>;
				mask = <0xff>;
				shift = <0x10>;
			};
		};

		sram_ctrl@3000000 {
			compatible = "allwinner,sram_ctrl";
			reg = <0x00 0x3000000 0x00 0x184>;
			phandle = <0x18e>;

			soc_ver {
				offset = <0x24>;
				mask = <0x07>;
				shift = <0x00>;
			};
		};

		ths@2522000 {
			compatible = "allwinner,sun60iw2p1-ths";
			reg = <0x00 0x2522000 0x00 0x500>;
			clocks = <0x12 0xbc 0x12 0xba>;
			clock-names = "bus\0gpadc";
			resets = <0x12 0x44>;
			#thermal-sensor-cells = <0x01>;
			phandle = <0x15>;
		};

		nsi-controller@2020000 {
			compatible = "allwinner,sunxi-nsi-v2";
			interrupts = <0x00 0x2b 0x04>;
			reg = <0x00 0x2020000 0x00 0x10000 0x00 0xa030000 0x00 0x20000>;
			clocks = <0x12 0x01 0x12 0x35 0x12 0x33 0x12 0x06 0x12 0x30 0x12 0x34 0x12 0x06 0x12 0x8a>;
			clock-names = "pll\0bus\0nsi\0nsi-p\0gic\0nsi-cfg\0bus-p\0cpu_direct";
			resets = <0x12 0x01 0x12 0x02>;
			reset-names = "bus_nsi\0bus_nsi_cfg";
			clock-frequency = <0x23c34600 0x23c34600>;
			#nsi-cells = <0x01>;
			clk_path_type = <0x01>;
			topology_type = <0x02>;
			channel_type = <0x02>;
			master_clks = <0x06 0x02 0x0a 0x04 0x12 0x02 0x13 0x02 0x14 0x02 0x20 0x02 0x21 0x02>;
			ia_pmu_data_unit = <0x10>;
			ra_pmu_data_unit = <0x40>;
			ta_pmu_data_unit = <0x40>;
			cpu_pmu_data_unit = <0x40>;
			sub_node_id_mapping;
			phandle = <0xcb>;

			cpu0 {
				id = <0x13>;
				cpu_direct_reg = <0xa030000 0x2000>;
				cpu_direct_mux = <0x8000200 0x00 0x00>;
			};

			cpu1 {
				id = <0x14>;
				cpu_direct_reg = <0xa034000 0x2000>;
				cpu_direct_mux = <0x8000200 0x00 0x00>;
			};

			npu {
				id = <0x12>;
				power-domains = <0x13 0x04>;
			};

			usb_pcie {
				id = <0x0d>;
				power-domains = <0x13 0x07>;
			};

			gpu {
				id = <0x06>;
				power-domains = <0x13 0x05>;
			};

			iommu0 {
				id = <0x0e>;
				mode = <0x00>;
				pri = <0x03>;
				select = <0x01>;
			};

			iommu1 {
				id = <0x0f>;
				mode = <0x00>;
				pri = <0x03>;
				select = <0x01>;
			};

			de {
				id = <0x02>;
				mode = <0x00>;
				pri = <0x02>;
				select = <0x01>;
				power-domains = <0x13 0x01>;
			};

			eink {
				id = <0x03>;
				mode = <0x00>;
				pri = <0x01>;
				select = <0x01>;
				power-domains = <0x13 0x01>;
			};

			di {
				id = <0x04>;
				mode = <0x00>;
				pri = <0x01>;
				select = <0x01>;
				power-domains = <0x13 0x01>;
			};

			g2d {
				id = <0x05>;
				mode = <0x00>;
				pri = <0x01>;
				select = <0x01>;
				power-domains = <0x13 0x01>;
			};

			ve0 {
				id = <0x07>;
				mode = <0x00>;
				pri = <0x01>;
				select = <0x01>;
				power-domains = <0x13 0x02>;
			};

			ve1 {
				id = <0x08>;
				mode = <0x00>;
				pri = <0x01>;
				select = <0x01>;
				power-domains = <0x13 0x02>;
			};

			ve2 {
				id = <0x09>;
				mode = <0x00>;
				pri = <0x01>;
				select = <0x01>;
				power-domains = <0x13 0x03>;
			};

			isp {
				id = <0x10>;
				mode = <0x00>;
				pri = <0x02>;
				select = <0x01>;
				power-domains = <0x13 0x00>;
			};

			csi {
				id = <0x11>;
				mode = <0x00>;
				pri = <0x02>;
				select = <0x01>;
				power-domains = <0x13 0x00>;
			};
		};

		pinctrl_test@2000000 {
			reg = <0x00 0x00 0x00 0x00>;
			compatible = "allwinner,sunxi-pinctrl-test";
			device_type = "pinctrl-test";
			pinctrl-0 = <0x30>;
			pinctrl-1 = <0x31>;
			pinctrl-names = "default\0sleep";
			test-gpios = <0x32 0x01 0x04 0x01>;
			suspend-gpios = <0x32 0x01 0x05 0x01>;
			wakeup-source;
			interrupt-parent = <0x33>;
			interrupts = <0x01 0x06 0x04>;
			phandle = <0x18f>;
		};

		uart@2500000 {
			compatible = "allwinner,uart-v100";
			reg = <0x00 0x2500000 0x00 0x400>;
			interrupts = <0x00 0x02 0x04>;
			sunxi,uart-fifosize = <0x40>;
			clocks = <0x12 0x9a>;
			resets = <0x12 0x29>;
			uart0_port = <0x00>;
			uart0_type = <0x02>;
			status = "okay";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0x34>;
			pinctrl-1 = <0x35>;
			phandle = <0x190>;
		};

		uart@2501000 {
			compatible = "allwinner,uart-v100";
			device_type = "uart1";
			reg = <0x00 0x2501000 0x00 0x400>;
			interrupts = <0x00 0x03 0x04>;
			sunxi,uart-fifosize = <0x100>;
			clocks = <0x12 0x9b>;
			resets = <0x12 0x2a>;
			uart1_port = <0x01>;
			uart1_type = <0x04>;
			dmas = <0x36 0x0f 0x36 0x0f>;
			dma-names = "fake_tx\0fake_rx";
			status = "okay";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0x37>;
			pinctrl-1 = <0x38>;
			phandle = <0x191>;
		};

		uart@2502000 {
			compatible = "allwinner,uart-v100";
			device_type = "uart2";
			reg = <0x00 0x2502000 0x00 0x400>;
			interrupts = <0x00 0x04 0x04>;
			sunxi,uart-fifosize = <0x100>;
			clocks = <0x12 0x9c>;
			resets = <0x12 0x2b>;
			uart2_port = <0x02>;
			uart2_type = <0x04>;
			dmas = <0x36 0x10 0x36 0x10>;
			dma-names = "fake_tx\0fake_rx";
			status = "disabled";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0x39>;
			pinctrl-1 = <0x3a>;
			phandle = <0x192>;
		};

		uart@2503000 {
			compatible = "allwinner,uart-v100";
			device_type = "uart3";
			reg = <0x00 0x2503000 0x00 0x400>;
			interrupts = <0x00 0x05 0x04>;
			sunxi,uart-fifosize = <0x100>;
			clocks = <0x12 0x9d>;
			resets = <0x12 0x2c>;
			uart3_port = <0x03>;
			uart3_type = <0x04>;
			dmas = <0x36 0x11 0x36 0x11>;
			dma-names = "fake_tx\0fake_rx";
			status = "disabled";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0x3b>;
			pinctrl-1 = <0x3c>;
			phandle = <0x193>;
		};

		uart@2504000 {
			compatible = "allwinner,uart-v100";
			device_type = "uart4";
			reg = <0x00 0x2504000 0x00 0x400>;
			interrupts = <0x00 0x06 0x04>;
			sunxi,uart-fifosize = <0x100>;
			clocks = <0x12 0x9e>;
			resets = <0x12 0x2d>;
			uart4_port = <0x04>;
			uart4_type = <0x04>;
			dmas = <0x36 0x12 0x36 0x12>;
			dma-names = "fake_tx\0fake_rx";
			status = "disabled";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0x3d>;
			pinctrl-1 = <0x3e>;
			phandle = <0x194>;
		};

		uart@2505000 {
			compatible = "allwinner,uart-v100";
			device_type = "uart5";
			reg = <0x00 0x2505000 0x00 0x400>;
			interrupts = <0x00 0x07 0x04>;
			sunxi,uart-fifosize = <0x100>;
			clocks = <0x12 0x9f>;
			resets = <0x12 0x2e>;
			uart5_port = <0x05>;
			uart5_type = <0x04>;
			dmas = <0x36 0x13 0x36 0x13>;
			dma-names = "fake_tx\0fake_rx";
			status = "disabled";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0x3f>;
			pinctrl-1 = <0x40>;
			phandle = <0x195>;
		};

		uart@2506000 {
			compatible = "allwinner,uart-v100";
			device_type = "uart6";
			reg = <0x00 0x2506000 0x00 0x400>;
			interrupts = <0x00 0x08 0x04>;
			sunxi,uart-fifosize = <0x100>;
			clocks = <0x12 0xa0>;
			resets = <0x12 0x2f>;
			uart6_port = <0x06>;
			uart6_type = <0x04>;
			dmas = <0x36 0x14 0x36 0x14>;
			dma-names = "fake_tx\0fake_rx";
			status = "disabled";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0x41>;
			pinctrl-1 = <0x42>;
			phandle = <0x196>;
		};

		uart@7080000 {
			compatible = "allwinner,uart-v100";
			device_type = "uart7";
			reg = <0x00 0x7080000 0x00 0x400>;
			interrupts = <0x00 0xc9 0x04>;
			sunxi,uart-fifosize = <0x40>;
			clocks = <0x24 0x0f>;
			resets = <0x24 0x05>;
			uart7_port = <0x07>;
			uart7_type = <0x02>;
			dmas = <0x36 0x32 0x36 0x32>;
			dma-names = "fake_tx\0fake_rx";
			status = "disabled";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0x43>;
			pinctrl-1 = <0x44>;
			phandle = <0x197>;
		};

		uart@7081000 {
			compatible = "allwinner,uart-v100";
			device_type = "uart8";
			reg = <0x00 0x7081000 0x00 0x400>;
			interrupts = <0x00 0xca 0x04>;
			sunxi,uart-fifosize = <0x40>;
			clocks = <0x24 0x0f>;
			resets = <0x24 0x04>;
			uart8_port = <0x08>;
			uart8_type = <0x02>;
			dmas = <0x36 0x33 0x36 0x33>;
			dma-names = "fake_tx\0fake_rx";
			status = "disabled";
			phandle = <0x198>;
		};

		twi@2510000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-twi-v101";
			device_type = "twi0";
			reg = <0x00 0x2510000 0x00 0x400>;
			interrupts = <0x00 0x0b 0x04>;
			clocks = <0x12 0xa1>;
			clock-names = "bus";
			resets = <0x12 0x30>;
			dmas = <0x36 0x25 0x36 0x25>;
			dma-names = "tx\0rx";
			status = "okay";
			clock-frequency = <0x61a80>;
			pinctrl-0 = <0x45>;
			pinctrl-1 = <0x46>;
			pinctrl-names = "default\0sleep";
			twi_drv_used = <0x01>;
			twi-supply = <0x09>;
			phandle = <0x199>;

			ctp {
				compatible = "allwinner,goodix";
				reg = <0x5d>;
				device_type = "ctp";
				status = "disabled";
				ctp_name = "gt9xxnew_ts";
				ctp_twi_id = <0x00>;
				ctp_twi_addr = <0x5d>;
				ctp_screen_max_x = <0x320>;
				ctp_screen_max_y = <0x500>;
				ctp_revert_x_flag = <0x01>;
				ctp_revert_y_flag = <0x01>;
				ctp_exchange_x_y_flag = <0x00>;
				ctp_int_port = <0x33 0x07 0x09 0x01>;
				ctp_wakeup = <0x33 0x07 0x0a 0x01>;
				ctp-supply = <0x47>;
				ctp_power_ldo_vol = <0xce4>;
			};

			gt9xx {
				compatible = "goodix,gt9xx";
				reg = <0x5d>;
				status = "okay";
				irq-gpios = <0x33 0x03 0x14 0x01>;
				irq-flags = <0x02>;
				reset-gpios = <0x33 0x03 0x15 0x01>;
				vdd_ana-supply = <0x47>;
				touchscreen-max-id = <0x0b>;
				touchscreen-size-x = <0x500>;
				touchscreen-size-y = <0x320>;
				touchscreen-max-w = <0x200>;
				touchscreen-max-p = <0x200>;
				goodix,slide-wakeup = <0x00>;
				goodix,type-a-report = <0x01>;
				goodix,driver-send-cfg = <0x00>;
				goodix,send-cfg-id = <0x00>;
				goodix,resume-in-workqueue = <0x00>;
				goodix,int-sync = <0x01>;
				goodix,revert_x = <0x00>;
				goodix,revert_y = <0x00>;
				goodix,swap-x2y = <0x00>;
				goodix,tp_idle_support = <0x01>;
				goodix,esd-protect = <0x01>;
				goodix,auto-update-cfg = <0x00>;
				goodix,power-off-sleep = <0x01>;
				goodix,pen-suppress-finger = <0x00>;
				goodix,cfg-group0 = [b4 00 05 20 03 0a 3d 00 01 0a 28 0f 50 32 03 05 00 00 00 00 00 00 06 17 19 1f 14 8e 2e 99 2d 2f 35 11 00 00 00 1a 03 10 00 00 00 00 00 00 00 00 00 00 00 32 50 94 d5 02 07 00 00 04 8e 48 00 8a 4d 00 86 53 00 83 59 00 80 60 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 04 05 06 07 08 09 0c 0d 0e 0f 10 11 14 15 16 17 ff ff ff ff ff ff ff ff ff ff ff ff 28 27 26 25 24 23 22 21 20 1f 1e 1c 1b 19 13 12 11 10 0f 0d 0c 0a 08 07 06 04 02 00 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ab 01];
			};
		};

		twi@2511000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-twi-v101";
			device_type = "twi1";
			reg = <0x00 0x2511000 0x00 0x400>;
			interrupts = <0x00 0x0c 0x04>;
			clocks = <0x12 0xa2>;
			clock-names = "bus";
			resets = <0x12 0x31>;
			dmas = <0x36 0x26 0x36 0x26>;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = <0x19a>;
		};

		twi@2512000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-twi-v101";
			device_type = "twi2";
			reg = <0x00 0x2512000 0x00 0x400>;
			interrupts = <0x00 0x0d 0x04>;
			clocks = <0x12 0xa3>;
			clock-names = "bus";
			resets = <0x12 0x32>;
			dmas = <0x36 0x27 0x36 0x27>;
			dma-names = "tx\0rx";
			status = "okay";
			clock-frequency = <0x61a80>;
			pinctrl-0 = <0x48>;
			pinctrl-1 = <0x49>;
			pinctrl-names = "default\0sleep";
			twi_drv_used = <0x01>;
			twi-supply = <0x4a>;
			phandle = <0x19b>;
		};

		twi@2513000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-twi-v101";
			device_type = "twi3";
			reg = <0x00 0x2513000 0x00 0x400>;
			interrupts = <0x00 0x0e 0x04>;
			clocks = <0x12 0xa4>;
			clock-names = "bus";
			resets = <0x12 0x33>;
			dmas = <0x36 0x28 0x36 0x28>;
			dma-names = "tx\0rx";
			status = "okay";
			clock-frequency = <0x61a80>;
			pinctrl-0 = <0x4b>;
			pinctrl-1 = <0x4c>;
			pinctrl-names = "default\0sleep";
			twi_drv_used = <0x01>;
			twi-supply = <0x4a>;
			phandle = <0x19c>;

			hym8563@51 {
				compatible = "haoyu,hym8563";
				reg = <0x51>;
				#clock-cells = <0x00>;
				clock-frequency = <0x8000>;
				clock-output-names = "hym8563";
				pinctrl-names = "default";
				pinctrl-0 = <0x4d>;
				interrupt-parent = <0x33>;
				interrupts = <0x0a 0x14 0x08>;
				status = "disabled";
				phandle = <0x19d>;
			};
		};

		twi@2514000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-twi-v101";
			device_type = "twi4";
			reg = <0x00 0x2514000 0x00 0x400>;
			interrupts = <0x00 0x0f 0x04>;
			clocks = <0x12 0xa5>;
			clock-names = "bus";
			resets = <0x12 0x34>;
			dmas = <0x36 0x29 0x36 0x29>;
			dma-names = "tx\0rx";
			status = "okay";
			clock-frequency = <0x186a0>;
			pinctrl-0 = <0x4e>;
			pinctrl-1 = <0x4f>;
			pinctrl-names = "default\0sleep";
			no_suspend = <0x01>;
			twi_drv_used = <0x01>;
			phandle = <0x19e>;

			touchscreen@14 {
				compatible = "goodix,gt9271";
				reg = <0x14>;
				interrupt-parent = <0x33>;
				interrupts = <0x04 0x08 0x04>;
				irq-gpios = <0x33 0x04 0x08 0x00>;
				reset-gpios = <0x33 0x04 0x05 0x00>;
				touchscreen-inverted-x;
				touchscreen-swapped-x-y;
				touchscreen-size-x = <0x500>;
				touchscreen-size-y = <0x320>;
			};
		};

		twi@2515000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-twi-v101";
			device_type = "twi5";
			reg = <0x00 0x2515000 0x00 0x400>;
			interrupts = <0x00 0x10 0x04>;
			clocks = <0x12 0xa6>;
			clock-names = "bus";
			resets = <0x12 0x35>;
			dmas = <0x36 0x2a 0x36 0x2a>;
			dma-names = "tx\0rx";
			status = "disabled";
			clock-frequency = <0x61a80>;
			pinctrl-0 = <0x50>;
			pinctrl-1 = <0x51>;
			pinctrl-names = "default\0sleep";
			twi_drv_used = <0x01>;
			twi-supply = <0x09>;
			phandle = <0x19f>;
		};

		twi@2516000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-twi-v101";
			device_type = "twi6";
			reg = <0x00 0x2516000 0x00 0x400>;
			interrupts = <0x00 0x11 0x04>;
			clocks = <0x12 0xa7>;
			clock-names = "bus";
			resets = <0x12 0x36>;
			dmas = <0x36 0x2b 0x36 0x2b>;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = <0x1a0>;
		};

		twi@2517000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-twi-v101";
			device_type = "twi7";
			reg = <0x00 0x2517000 0x00 0x400>;
			interrupts = <0x00 0x12 0x04>;
			clocks = <0x12 0xa8>;
			clock-names = "bus";
			resets = <0x12 0x37>;
			dmas = <0x36 0x2c 0x36 0x2c>;
			dma-names = "tx\0rx";
			status = "disabled";
			clock-frequency = <0x61a80>;
			pinctrl-0 = <0x52>;
			pinctrl-1 = <0x53>;
			pinctrl-names = "default\0sleep";
			twi_drv_used = <0x01>;
			twi-supply = <0x09>;
			phandle = <0x1a1>;

			ac101b@3e {
				pa-pin-msleep-1 = <0x00>;
				phandle = <0x121>;
			};

			ac107@36 {
				status = "okay";
				phandle = <0x136>;
			};
		};

		twi@2518000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-twi-v101";
			device_type = "twi8";
			reg = <0x00 0x2518000 0x00 0x400>;
			interrupts = <0x00 0x13 0x04>;
			clocks = <0x12 0xa9>;
			clock-names = "bus";
			resets = <0x12 0x38>;
			dmas = <0x36 0x2d 0x36 0x2d>;
			dma-names = "tx\0rx";
			status = "okay";
			clock-frequency = <0x61a80>;
			pinctrl-0 = <0x54>;
			pinctrl-1 = <0x55>;
			pinctrl-names = "default\0sleep";
			no_suspend = <0x01>;
			twi_drv_used = <0x01>;
			phandle = <0x1a2>;

			es8388@10 {
				status = "okay";
				#sound-dai-cells = <0x00>;
				compatible = "everest,es8388\0everest,es8323";
				reg = <0x10>;
				assigned-clock-rates = <0xbb8000>;
				phandle = <0x12a>;
			};
		};

		twi@2519000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-twi-v101";
			device_type = "twi9";
			reg = <0x00 0x2519000 0x00 0x400>;
			interrupts = <0x00 0x14 0x04>;
			clocks = <0x12 0xaa>;
			clock-names = "bus";
			resets = <0x12 0x39>;
			dmas = <0x36 0x3a 0x36 0x3a>;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = <0x1a3>;
		};

		twi@251A000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-twi-v101";
			device_type = "twi10";
			reg = <0x00 0x251a000 0x00 0x400>;
			interrupts = <0x00 0x15 0x04>;
			clocks = <0x12 0xab>;
			clock-names = "bus";
			resets = <0x12 0x3a>;
			dmas = <0x36 0x3b 0x36 0x3b>;
			dma-names = "tx\0rx";
			status = "disabled";
			phandle = <0x1a4>;
		};

		twi@251B000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-twi-v101";
			device_type = "twi11";
			reg = <0x00 0x251b000 0x00 0x400>;
			interrupts = <0x00 0x16 0x04>;
			clocks = <0x12 0xac>;
			clock-names = "bus";
			resets = <0x12 0x3b>;
			dmas = <0x36 0x3c 0x36 0x3c>;
			dma-names = "tx\0rx";
			status = "disabled";
			clock-frequency = <0x61a80>;
			pinctrl-0 = <0x56>;
			pinctrl-1 = <0x57>;
			pinctrl-names = "default\0sleep";
			twi_drv_used = <0x01>;
			twi-supply = <0x47>;
			phandle = <0x1a5>;

			gt9xx_secondary {
				compatible = "goodix,gt9xx_secondary";
				reg = <0x5d>;
				status = "okay";
				irq-gpios = <0x33 0x08 0x02 0x01>;
				irq-flags = <0x02>;
				reset-gpios = <0x33 0x08 0x03 0x01>;
				vdd_ana-supply = <0x47>;
				touchscreen-max-id = <0x0b>;
				touchscreen-size-x = <0x500>;
				touchscreen-size-y = <0x320>;
				touchscreen-max-w = <0x200>;
				touchscreen-max-p = <0x200>;
				goodix,slide-wakeup = <0x00>;
				goodix,type-a-report = <0x01>;
				goodix,driver-send-cfg = <0x00>;
				goodix,send-cfg-id = <0x00>;
				goodix,resume-in-workqueue = <0x00>;
				goodix,int-sync = <0x01>;
				goodix,revert_x = <0x00>;
				goodix,revert_y = <0x00>;
				goodix,swap-x2y = <0x00>;
				goodix,tp_idle_support = <0x01>;
				goodix,esd-protect = <0x01>;
				goodix,auto-update-cfg = <0x00>;
				goodix,power-off-sleep = <0x01>;
				goodix,pen-suppress-finger = <0x00>;
				goodix,cfg-group0 = [b4 00 05 20 03 0a 3d 00 01 0a 28 0f 50 32 03 05 00 00 00 00 00 00 06 17 19 1f 14 8e 2e 99 2d 2f 35 11 00 00 00 1a 03 10 00 00 00 00 00 00 00 00 00 00 00 32 50 94 d5 02 07 00 00 04 8e 48 00 8a 4d 00 86 53 00 83 59 00 80 60 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 04 05 06 07 08 09 0c 0d 0e 0f 10 11 14 15 16 17 ff ff ff ff ff ff ff ff ff ff ff ff 28 27 26 25 24 23 22 21 20 1f 1e 1c 1b 19 13 12 11 10 0f 0d 0c 0a 08 07 06 04 02 00 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ab 01];
			};
		};

		twi@251C000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-twi-v101";
			device_type = "twi12";
			reg = <0x00 0x251c000 0x00 0x400>;
			interrupts = <0x00 0x17 0x04>;
			clocks = <0x12 0xad>;
			clock-names = "bus";
			resets = <0x12 0x3c>;
			dmas = <0x36 0x3d 0x36 0x3d>;
			dma-names = "tx\0rx";
			status = "okay";
			clock-frequency = <0x61a80>;
			pinctrl-0 = <0x58>;
			pinctrl-1 = <0x59>;
			pinctrl-names = "default\0sleep";
			no_suspend = <0x01>;
			twi_drv_used = <0x01>;
			phandle = <0x1a6>;

			husb311@4e {
				compatible = "hynetek,husb311";
				reg = <0x4e>;
				interrupt-parent = <0x33>;
				interrupts = <0x0a 0x15 0x08>;
				pinctrl-0 = <0x5a>;
				pinctrl-names = "default";
				vbus-supply = <0x5b>;
				wakeup-source;
				status = "okay";
				phandle = <0x1a7>;

				ports {
					#address-cells = <0x01>;
					#size-cells = <0x00>;

					port@0 {
						reg = <0x00>;

						endpoint@0 {
							remote-endpoint = <0x5c>;
							phandle = <0xa9>;
						};
					};
				};

				connector {
					compatible = "usb-c-connector";
					label = "USB-C";
					data-role = "dual";
					power-role = "dual";
					try-power-role = "sink";
					op-sink-microwatt = <0xf4240>;
					typec-power-opmode = "default";
					slow-charger-loop;
					sink-pdos = <0x22019032 0x864190c8>;
					source-pdos = <0x22019032 0x86419078>;
					sink-vdos = <0xd1002e99 0x00 0x3110000>;
					sink-vdos-v1 = <0xd1002e99 0x00 0x3110000>;
					phandle = <0x1a8>;

					altmodes {
						#address-cells = <0x01>;
						#size-cells = <0x00>;

						altmode@0 {
							reg = <0x00>;
							svid = <0xff01>;
							vdo = <0xffffffff>;
						};
					};

					ports {
						#address-cells = <0x01>;
						#size-cells = <0x00>;

						port@0 {
							reg = <0x00>;

							endpoint@0 {
								remote-endpoint = <0x5d>;
								phandle = <0x149>;
							};
						};

						port@1 {
							reg = <0x01>;

							endpoint@1 {
								remote-endpoint = <0x5e>;
								phandle = <0x14a>;
							};
						};
					};
				};
			};
		};

		twi@7083000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-twi-v101";
			device_type = "s_twi0";
			reg = <0x00 0x7083000 0x00 0x400>;
			interrupts = <0x00 0xcb 0x04>;
			clocks = <0x24 0x12>;
			clock-names = "bus";
			resets = <0x24 0x08>;
			dmas = <0x36 0x2f 0x36 0x2f>;
			dma-names = "tx\0rx";
			status = "okay";
			clock-frequency = <0x61a80>;
			pinctrl-0 = <0x5f>;
			pinctrl-1 = <0x60>;
			pinctrl-names = "default\0sleep";
			twi_drv_used = <0x01>;
			no_suspend = <0x01>;
			phandle = <0x1a9>;

			pmu@34 {
				compatible = "x-powers,axp515";
				reg = <0x34>;
				status = "disabled";
				interrupts = <0x00 0x08>;
				interrupt-parent = <0x61>;
				x-powers,drive-vbus-en;
				pmu_irq_wakeup = <0x01>;
				pmu_hot_shutdown = <0x01>;
				pmu_thermal_threshold = <0x78>;
				wakeup-source;
				phandle = <0x1aa>;

				powerkey@0 {
					status = "disabled";
					compatible = "x-powers,axp515-pek";
					phandle = <0x1ab>;
				};

				usb_power_supply {
					compatible = "x-powers,axp515-usb-power-supply";
					status = "disabled";
					pmu_usbpc_vol = <0x11f8>;
					pmu_usbpc_cur = <0x1f4>;
					pmu_usbad_vol = <0x1194>;
					pmu_usbad_cur = <0x9c4>;
					pmu_usb_typec_used = <0x01>;
					wakeup_usb_in;
					wakeup_usb_out;
					wakeup_typec_in;
					wakeup_typec_out;
					det_battery_supply = <0x62>;
					phandle = <0x1ac>;
				};

				bat-power-supply {
					compatible = "x-powers,axp515-bat-power-supply";
					status = "disabled";
					pmu_chg_ic_temp = <0x00>;
					pmu_battery_rdc = <0x58>;
					pmu_battery_cap = <0x1bad>;
					pmu_runtime_chgcur = <0x3e8>;
					pmu_suspend_chgcur = <0x5dc>;
					pmu_shutdown_chgcur = <0x5dc>;
					pmu_init_chgvol = <0x10fe>;
					pmu_battery_warning_level1 = <0x0f>;
					pmu_battery_warning_level2 = <0x00>;
					pmu_chgled_func = <0x00>;
					pmu_chgled_type = <0x00>;
					pmu_bat_para1 = <0x00>;
					pmu_bat_para2 = <0x00>;
					pmu_bat_para3 = <0x00>;
					pmu_bat_para4 = <0x00>;
					pmu_bat_para5 = <0x01>;
					pmu_bat_para6 = <0x02>;
					pmu_bat_para7 = <0x02>;
					pmu_bat_para8 = <0x02>;
					pmu_bat_para9 = <0x03>;
					pmu_bat_para10 = <0x07>;
					pmu_bat_para11 = <0x0c>;
					pmu_bat_para12 = <0x0f>;
					pmu_bat_para13 = <0x14>;
					pmu_bat_para14 = <0x19>;
					pmu_bat_para15 = <0x20>;
					pmu_bat_para16 = <0x25>;
					pmu_bat_para17 = <0x2b>;
					pmu_bat_para18 = <0x33>;
					pmu_bat_para19 = <0x39>;
					pmu_bat_para20 = <0x3d>;
					pmu_bat_para21 = <0x41>;
					pmu_bat_para22 = <0x46>;
					pmu_bat_para23 = <0x49>;
					pmu_bat_para24 = <0x4e>;
					pmu_bat_para25 = <0x51>;
					pmu_bat_para26 = <0x55>;
					pmu_bat_para27 = <0x58>;
					pmu_bat_para28 = <0x5c>;
					pmu_bat_para29 = <0x5d>;
					pmu_bat_para30 = <0x61>;
					pmu_bat_para31 = <0x64>;
					pmu_bat_para32 = <0x64>;
					pmu_bat_temp_enable = <0x01>;
					pmu_jetia_en = <0x00>;
					pmu_bat_charge_ltf = <0x81f>;
					pmu_bat_charge_htf = <0xb4>;
					pmu_bat_shutdown_ltf = <0xa38>;
					pmu_bat_shutdown_htf = <0x9d>;
					pmu_jetia_cool = <0x680>;
					pmu_jetia_warm = <0xf8>;
					pmu_jcool_ifall = <0x01>;
					pmu_jwarm_ifall = <0x01>;
					pmu_bat_temp_para1 = <0x154a>;
					pmu_bat_temp_para2 = <0xcf3>;
					pmu_bat_temp_para3 = <0xa38>;
					pmu_bat_temp_para4 = <0x81f>;
					pmu_bat_temp_para5 = <0x680>;
					pmu_bat_temp_para6 = <0x53c>;
					pmu_bat_temp_para7 = <0x43e>;
					pmu_bat_temp_para8 = <0x2d7>;
					pmu_bat_temp_para9 = <0x1f2>;
					pmu_bat_temp_para10 = <0x15c>;
					pmu_bat_temp_para11 = <0x125>;
					pmu_bat_temp_para12 = <0xf8>;
					pmu_bat_temp_para13 = <0xd3>;
					pmu_bat_temp_para14 = <0xb4>;
					pmu_bat_temp_para15 = <0x85>;
					pmu_bat_temp_para16 = <0x64>;
					wakeup_bat_out;
					wakeup_new_soc;
					wakeup_bat_untemp_chg;
					wakeup_bat_ovtemp_chg;
					phandle = <0x62>;
				};

				regulators@1 {
					compatible = "x-powers,axp515-regulator";
					status = "disabled";
					phandle = <0x1ad>;

					drivevbus {
						regulator-name = "axp515-drivevbus";
						regulator-enable-ramp-delay = <0x3e8>;
						phandle = <0x63>;
					};
				};

				virtual-drivevbus {
					compatible = "xpower-vregulator,drivevbus";
					drivevbus-supply = <0x63>;
				};
			};

			pmu@36 {
				compatible = "x-powers,axp8191";
				reg = <0x36>;
				status = "okay";
				interrupts = <0x00 0x08>;
				interrupt-parent = <0x61>;
				pmu_irq_wakeup = <0x01>;
				pmu_hot_shutdown = <0x01>;
				phandle = <0x1ae>;

				powerkey@1 {
					compatible = "x-powers,axp2101-pek";
					status = "okay";
					pmu_powkey_off_en = <0x01>;
					pmu_powkey_off_func = <0x01>;
					pmu_powkey_off_time = <0x1770>;
					pmu_powkey_long_time = <0x5dc>;
					pmu_powkey_on_time = <0x3e8>;
					wakeup_rising;
					wakeup_falling;
					phandle = <0x1af>;
				};

				regulators@0 {
					phandle = <0x1b0>;

					dcdc1 {
						regulator-name = "axp8191-dcdc1";
						regulator-min-microvolt = <0xf4240>;
						regulator-max-microvolt = <0x39fbc0>;
						regulator-enable-ramp-delay = <0x3e8>;
						regulator-ramp-delay = <0xfa>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x64>;
					};

					dcdc2 {
						regulator-name = "axp8191-dcdc2";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x177fa0>;
						regulator-ramp-delay = <0xfa>;
						regulator-enable-ramp-delay = <0x3e8>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x65>;
					};

					dcdc3 {
						regulator-name = "axp8191-dcdc3";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x177fa0>;
						regulator-ramp-delay = <0xfa>;
						regulator-enable-ramp-delay = <0x3e8>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x07>;
					};

					dcdc4 {
						regulator-name = "axp8191-dcdc4";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x177fa0>;
						regulator-ramp-delay = <0xfa>;
						regulator-enable-ramp-delay = <0x3e8>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x09>;
					};

					dcdc5 {
						regulator-name = "axp8191-dcdc5";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x177fa0>;
						regulator-ramp-delay = <0xfa>;
						regulator-enable-ramp-delay = <0x3e8>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x2a>;
					};

					dcdc6 {
						regulator-name = "axp8191-dcdc6";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x2a1d40>;
						regulator-ramp-delay = <0xfa>;
						regulator-enable-ramp-delay = <0x3e8>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x66>;
					};

					dcdc7 {
						regulator-name = "axp8191-dcdc7";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x1c1380>;
						regulator-ramp-delay = <0xfa>;
						regulator-enable-ramp-delay = <0x3e8>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x67>;
					};

					dcdc8 {
						regulator-name = "axp8191-dcdc8";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-ramp-delay = <0xfa>;
						regulator-enable-ramp-delay = <0x3e8>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x68>;
					};

					dcdc9 {
						regulator-name = "axp8191-dcdc9";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-ramp-delay = <0xfa>;
						regulator-enable-ramp-delay = <0x3e8>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x69>;
					};

					rtcldo {
						regulator-name = "axp8191-rtcldo";
						regulator-min-microvolt = <0x1b7740>;
						regulator-max-microvolt = <0x1b7740>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x6a>;
					};

					aldo1 {
						regulator-name = "axp8191-aldo1";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-enable-ramp-delay = <0x3e8>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x6b>;
					};

					aldo2 {
						regulator-name = "axp8191-aldo2";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-enable-ramp-delay = <0x3e8>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x6c>;
					};

					aldo3 {
						regulator-name = "axp8191-aldo3";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-enable-ramp-delay = <0x3e8>;
						phandle = <0x6d>;
					};

					aldo4 {
						regulator-name = "axp8191-aldo4";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-enable-ramp-delay = <0x3e8>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x6e>;
					};

					aldo5 {
						regulator-name = "axp8191-aldo5";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-enable-ramp-delay = <0x3e8>;
						phandle = <0x6f>;
					};

					aldo6 {
						regulator-name = "axp8191-aldo6";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-enable-ramp-delay = <0x3e8>;
						phandle = <0x70>;
					};

					dldo1 {
						regulator-name = "axp8191-dldo1";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-enable-ramp-delay = <0x3e8>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x71>;
					};

					dldo2 {
						regulator-name = "axp8191-dldo2";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-enable-ramp-delay = <0x3e8>;
						phandle = <0x4a>;
					};

					dldo3 {
						regulator-name = "axp8191-dldo3";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-enable-ramp-delay = <0x3e8>;
						phandle = <0x72>;
					};

					dldo4 {
						regulator-name = "axp8191-dldo4";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-enable-ramp-delay = <0x3e8>;
						phandle = <0x73>;
					};

					dldo5 {
						regulator-name = "axp8191-dldo5";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-enable-ramp-delay = <0x3e8>;
						phandle = <0x74>;
					};

					dldo6 {
						regulator-name = "axp8191-dldo6";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-enable-ramp-delay = <0x3e8>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x2f>;
					};

					eldo1 {
						regulator-name = "axp8191-eldo1";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-enable-ramp-delay = <0x3e8>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x75>;
					};

					eldo2 {
						regulator-name = "axp8191-eldo2";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-enable-ramp-delay = <0x3e8>;
						regulator-boot-on;
						regulator-always-on;
						phandle = <0x76>;
					};

					eldo3 {
						regulator-name = "axp8191-eldo3";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-enable-ramp-delay = <0x3e8>;
						phandle = <0x77>;
					};

					eldo4 {
						regulator-name = "axp8191-eldo4";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-enable-ramp-delay = <0x3e8>;
						phandle = <0x78>;
					};

					eldo5 {
						regulator-name = "axp8191-eldo5";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-enable-ramp-delay = <0x3e8>;
						phandle = <0x79>;
					};

					eldo6 {
						regulator-name = "axp8191-eldo6";
						regulator-min-microvolt = <0x7a120>;
						regulator-max-microvolt = <0x33e140>;
						regulator-enable-ramp-delay = <0x3e8>;
						regulator-always-on;
						regulator-boot-on;
						phandle = <0x7a>;
					};

					dc1sw1 {
						regulator-name = "axp8191-dc1sw1";
						swin-supply = <0x64>;
						phandle = <0x47>;
					};

					dc1sw2 {
						regulator-name = "axp8191-dc1sw2";
						swin-supply = <0x64>;
						phandle = <0x7b>;
					};
				};

				virtual-dcdc1 {
					compatible = "xpower-vregulator,dcdc1";
					dcdc1-supply = <0x64>;
				};

				virtual-dcdc2 {
					compatible = "xpower-vregulator,dcdc2";
					dcdc2-supply = <0x65>;
				};

				virtual-dcdc3 {
					compatible = "xpower-vregulator,dcdc3";
					dcdc3-supply = <0x07>;
				};

				virtual-dcdc4 {
					compatible = "xpower-vregulator,dcdc4";
					dcdc4-supply = <0x09>;
				};

				virtual-dcdc5 {
					compatible = "xpower-vregulator,dcdc5";
					dcdc5-supply = <0x2a>;
				};

				virtual-dcdc6 {
					compatible = "xpower-vregulator,dcdc6";
					dcdc6-supply = <0x66>;
				};

				virtual-dcdc7 {
					compatible = "xpower-vregulator,dcdc7";
					dcdc7-supply = <0x67>;
				};

				virtual-dcdc8 {
					compatible = "xpower-vregulator,dcdc8";
					dcdc8-supply = <0x68>;
				};

				virtual-dcdc9 {
					compatible = "xpower-vregulator,dcdc9";
					dcdc9-supply = <0x69>;
				};

				virtual-rtcldo {
					compatible = "xpower-vregulator,rtcldo";
					rtcldo-supply = <0x6a>;
				};

				virtual-aldo1 {
					compatible = "xpower-vregulator,aldo1";
					aldo1-supply = <0x6b>;
				};

				virtual-aldo2 {
					compatible = "xpower-vregulator,aldo2";
					aldo2-supply = <0x6c>;
				};

				virtual-aldo3 {
					compatible = "xpower-vregulator,aldo3";
					aldo3-supply = <0x6d>;
				};

				virtual-aldo4 {
					compatible = "xpower-vregulator,aldo4";
					aldo4-supply = <0x6e>;
				};

				virtual-aldo5 {
					compatible = "xpower-vregulator,aldo5";
					aldo5-supply = <0x6f>;
				};

				virtual-aldo6 {
					compatible = "xpower-vregulator,aldo6";
					aldo6-supply = <0x70>;
				};

				virtual-dldo1 {
					compatible = "xpower-vregulator,dldo1";
					dldo1-supply = <0x71>;
				};

				virtual-dldo2 {
					compatible = "xpower-vregulator,dldo2";
					dldo2-supply = <0x4a>;
				};

				virtual-dldo3 {
					compatible = "xpower-vregulator,dldo3";
					dldo3-supply = <0x72>;
				};

				virtual-dldo4 {
					compatible = "xpower-vregulator,dldo4";
					dldo4-supply = <0x73>;
				};

				virtual-dldo5 {
					compatible = "xpower-vregulator,dldo5";
					dldo5-supply = <0x74>;
				};

				virtual-dldo6 {
					compatible = "xpower-vregulator,dldo6";
					dldo6-supply = <0x2f>;
				};

				virtual-eldo1 {
					compatible = "xpower-vregulator,eldo1";
					eldo1-supply = <0x75>;
				};

				virtual-eldo2 {
					compatible = "xpower-vregulator,eldo2";
					eldo2-supply = <0x76>;
				};

				virtual-eldo3 {
					compatible = "xpower-vregulator,eldo3";
					eldo3-supply = <0x77>;
				};

				virtual-eldo4 {
					compatible = "xpower-vregulator,eldo4";
					eldo4-supply = <0x78>;
				};

				virtual-eldo5 {
					compatible = "xpower-vregulator,eldo5";
					eldo5-supply = <0x79>;
				};

				virtual-eldo6 {
					compatible = "xpower-vregulator,eldo6";
					eldo6-supply = <0x7a>;
				};

				virtual-dc1sw1 {
					compatible = "xpower-vregulator,dc1sw1";
					dc1sw-supply = <0x47>;
				};

				virtual-dc1sw2 {
					compatible = "xpower-vregulator,dc1sw2";
					dc1sw-supply = <0x7b>;
				};
			};
		};

		twi@7084000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-twi-v101";
			device_type = "s_twi1";
			reg = <0x00 0x7084000 0x00 0x400>;
			interrupts = <0x00 0xcc 0x04>;
			clocks = <0x24 0x11>;
			clock-names = "bus";
			resets = <0x24 0x07>;
			dmas = <0x36 0x30 0x36 0x30>;
			dma-names = "tx\0rx";
			status = "disabled";
			clock-frequency = <0x61a80>;
			pinctrl-0 = <0x7c>;
			pinctrl-1 = <0x7d>;
			pinctrl-names = "default\0sleep";
			twi_drv_used = <0x01>;
			phandle = <0x1b1>;
		};

		twi@7085000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-twi-v101";
			device_type = "s_twi2";
			reg = <0x00 0x7085000 0x00 0x400>;
			interrupts = <0x00 0xcd 0x04>;
			clocks = <0x24 0x10>;
			clock-names = "bus";
			resets = <0x24 0x06>;
			dmas = <0x36 0x31 0x36 0x31>;
			dma-names = "tx\0rx";
			status = "disabled";
			clock-frequency = <0x61a80>;
			pinctrl-0 = <0x7e>;
			pinctrl-1 = <0x7f>;
			pinctrl-names = "default\0sleep";
			twi_drv_used = <0x01>;
			phandle = <0x1b2>;
		};

		pwm@2527000 {
			#pwm-cells = <0x03>;
			compatible = "allwinner,sunxi-pwm-v203";
			reg = <0x00 0x2527000 0x00 0x400>;
			clocks = <0x12 0x66>;
			interrupts = <0x00 0x23 0x04>;
			resets = <0x12 0x0f>;
			pwm-number = <0x0a>;
			pwm-base = <0x00>;
			sunxi-pwms = <0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89>;
			status = "okay";
			phandle = <0x13e>;
		};

		pwm0@2527010 {
			compatible = "allwinner,sunxi-pwm0";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2527010 0x00 0x04>;
			reg_base = <0x2527000>;
			status = "disabled";
			phandle = <0x80>;
		};

		pwm0@2527011 {
			compatible = "allwinner,sunxi-pwm1";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2527011 0x00 0x04>;
			reg_base = <0x2527000>;
			status = "disabled";
			phandle = <0x81>;
		};

		pwm0@2527012 {
			compatible = "allwinner,sunxi-pwm2";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2527012 0x00 0x04>;
			reg_base = <0x2527000>;
			status = "disabled";
			phandle = <0x82>;
		};

		pwm0@2527013 {
			compatible = "allwinner,sunxi-pwm3";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2527013 0x00 0x04>;
			reg_base = <0x2527000>;
			status = "disabled";
			phandle = <0x83>;
		};

		pwm0@2527014 {
			compatible = "allwinner,sunxi-pwm4";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2527014 0x00 0x04>;
			reg_base = <0x2527000>;
			status = "disabled";
			phandle = <0x84>;
		};

		pwm0@2527015 {
			compatible = "allwinner,sunxi-pwm5";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2527015 0x00 0x04>;
			reg_base = <0x2527000>;
			status = "disabled";
			phandle = <0x85>;
		};

		pwm0@2527016 {
			compatible = "allwinner,sunxi-pwm6";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2527016 0x00 0x04>;
			reg_base = <0x2527000>;
			status = "disabled";
			phandle = <0x86>;
		};

		pwm0@2527017 {
			compatible = "allwinner,sunxi-pwm7";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2527017 0x00 0x04>;
			reg_base = <0x2527000>;
			status = "disabled";
			phandle = <0x87>;
		};

		pwm0@2527018 {
			compatible = "allwinner,sunxi-pwm8";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2527018 0x00 0x04>;
			reg_base = <0x2527000>;
			status = "disabled";
			phandle = <0x88>;
		};

		pwm0@2527019 {
			compatible = "allwinner,sunxi-pwm9";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2527019 0x00 0x04>;
			reg_base = <0x2527000>;
			status = "disabled";
			pinctrl-0 = <0x8a>;
			pinctrl-1 = <0x8b>;
			phandle = <0x89>;
		};

		pwm@2528000 {
			#pwm-cells = <0x03>;
			compatible = "allwinner,sunxi-pwm-v203";
			reg = <0x00 0x2528000 0x00 0x400>;
			clocks = <0x12 0x67>;
			interrupts = <0x00 0x24 0x04>;
			resets = <0x12 0x10>;
			pwm-number = <0x0a>;
			pwm-base = <0x0a>;
			sunxi-pwms = <0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95>;
			status = "okay";
			phandle = <0x13f>;
		};

		pwm1@2528010 {
			compatible = "allwinner,sunxi-pwm10";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2528010 0x00 0x04>;
			reg_base = <0x2528000>;
			status = "disabled";
			phandle = <0x8c>;
		};

		pwm1@2528011 {
			compatible = "allwinner,sunxi-pwm11";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2528011 0x00 0x04>;
			reg_base = <0x2528000>;
			status = "disabled";
			phandle = <0x8d>;
		};

		pwm1@2528012 {
			compatible = "allwinner,sunxi-pwm12";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2528012 0x00 0x04>;
			reg_base = <0x2528000>;
			status = "disabled";
			phandle = <0x8e>;
		};

		pwm1@2528013 {
			compatible = "allwinner,sunxi-pwm13";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2528013 0x00 0x04>;
			reg_base = <0x2528000>;
			status = "disabled";
			phandle = <0x8f>;
		};

		pwm1@2528014 {
			compatible = "allwinner,sunxi-pwm14";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2528014 0x00 0x04>;
			reg_base = <0x2528000>;
			status = "disabled";
			phandle = <0x90>;
		};

		pwm1@2528015 {
			compatible = "allwinner,sunxi-pwm15";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2528015 0x00 0x04>;
			reg_base = <0x2528000>;
			status = "disabled";
			phandle = <0x91>;
		};

		pwm1@2528016 {
			compatible = "allwinner,sunxi-pwm16";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2528016 0x00 0x04>;
			reg_base = <0x2528000>;
			status = "okay";
			pinctrl-0 = <0x96>;
			pinctrl-1 = <0x97>;
			phandle = <0x92>;
		};

		pwm1@2528017 {
			compatible = "allwinner,sunxi-pwm17";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2528017 0x00 0x04>;
			reg_base = <0x2528000>;
			status = "disabled";
			phandle = <0x93>;
		};

		pwm1@2528018 {
			compatible = "allwinner,sunxi-pwm18";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2528018 0x00 0x04>;
			reg_base = <0x2528000>;
			status = "disabled";
			phandle = <0x94>;
		};

		pwm1@2528019 {
			compatible = "allwinner,sunxi-pwm19";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x2528019 0x00 0x04>;
			reg_base = <0x2528000>;
			status = "okay";
			pinctrl-0 = <0x98>;
			pinctrl-1 = <0x99>;
			phandle = <0x95>;
		};

		pwm@7023000 {
			#pwm-cells = <0x03>;
			compatible = "allwinner,sunxi-pwm-v204";
			reg = <0x00 0x7023000 0x00 0x400>;
			clocks = <0x24 0x0a 0x24 0x09>;
			interrupts = <0x00 0xcf 0x04>;
			clock-names = "clk_pwm\0clk_bus_pwm";
			resets = <0x24 0x01>;
			pwm-number = <0x0a>;
			pwm-base = <0x14>;
			sunxi-pwms = <0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3>;
			status = "okay";
			phandle = <0x1b3>;
		};

		s_pwm0@7023010 {
			compatible = "allwinner,sunxi-pwm20";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x7023010 0x00 0x04>;
			reg_base = <0x7023000>;
			status = "disabled";
			phandle = <0x9a>;
		};

		s_pwm0@7023011 {
			compatible = "allwinner,sunxi-pwm21";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x7023011 0x00 0x04>;
			reg_base = <0x7023000>;
			status = "disabled";
			phandle = <0x9b>;
		};

		s_pwm0@7023012 {
			compatible = "allwinner,sunxi-pwm22";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x7023012 0x00 0x04>;
			reg_base = <0x7023000>;
			status = "disabled";
			phandle = <0x9c>;
		};

		s_pwm0@7023013 {
			compatible = "allwinner,sunxi-pwm23";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x7023013 0x00 0x04>;
			reg_base = <0x7023000>;
			status = "disabled";
			phandle = <0x9d>;
		};

		s_pwm0@7023014 {
			compatible = "allwinner,sunxi-pwm24";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x7023014 0x00 0x04>;
			reg_base = <0x7023000>;
			status = "disabled";
			phandle = <0x9e>;
		};

		s_pwm0@7023015 {
			compatible = "allwinner,sunxi-pwm25";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x7023015 0x00 0x04>;
			reg_base = <0x7023000>;
			status = "disabled";
			phandle = <0x9f>;
		};

		s_pwm0@7023016 {
			compatible = "allwinner,sunxi-pwm26";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x7023016 0x00 0x04>;
			reg_base = <0x7023000>;
			status = "disabled";
			phandle = <0xa0>;
		};

		s_pwm0@7023017 {
			compatible = "allwinner,sunxi-pwm27";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x7023017 0x00 0x04>;
			reg_base = <0x7023000>;
			status = "disabled";
			phandle = <0xa1>;
		};

		s_pwm0@7023018 {
			compatible = "allwinner,sunxi-pwm28";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x7023018 0x00 0x04>;
			reg_base = <0x7023000>;
			status = "disabled";
			phandle = <0xa2>;
		};

		s_pwm0@7023019 {
			compatible = "allwinner,sunxi-pwm29";
			pinctrl-names = "active\0sleep";
			reg = <0x00 0x7023019 0x00 0x04>;
			reg_base = <0x7023000>;
			status = "disabled";
			phandle = <0xa3>;
		};

		lradc@2524000 {
			compatible = "allwinner,keyboard_1350mv";
			reg = <0x00 0x2524000 0x00 0x100>;
			interrupts = <0x00 0x25 0x04>;
			clocks = <0x12 0xc1>;
			resets = <0x12 0x47>;
			status = "okay";
			key_cnt = <0x05>;
			key0 = <0xd2 0x73>;
			key1 = <0x19a 0x72>;
			key2 = <0x24e 0x8b>;
			key3 = <0x2ee 0x1c>;
			key4 = <0x370 0xac>;
			phandle = <0x1b4>;
		};

		gpadc@2521000 {
			compatible = "allwinner,sunxi-gpadc-v101";
			reg = <0x00 0x2521000 0x00 0x400>;
			interrupts = <0x00 0x26 0x04>;
			clocks = <0x12 0xbb 0x12 0xba>;
			clock-names = "bus\0hosc";
			resets = <0x12 0x43>;
			status = "disabled";
			channel_num = <0x08>;
			channel_select = <0xf0>;
			channel_data_select = <0x00>;
			channel_compare_select = <0x00>;
			channel_cld_select = <0x00>;
			channel_chd_select = <0x00>;
			channel0_compare_lowdata = <0x19f0a0>;
			channel0_compare_higdata = <0x124f80>;
			channel1_compare_lowdata = <0x704e0>;
			channel1_compare_higdata = <0x124f80>;
			phandle = <0x1b5>;
		};

		irrx@2526000 {
			compatible = "allwinner,irrx";
			reg = <0x00 0x2526000 0x00 0x400>;
			interrupts = <0x00 0x20 0x04>;
			clocks = <0x12 0xbe 0x2e 0x12 0xbd>;
			clock-names = "bus\0pclk\0mclk";
			resets = <0x12 0x45>;
			status = "disabled";
			phandle = <0x1b6>;
		};

		irrx@7040000 {
			compatible = "allwinner,irrx";
			reg = <0x00 0x7040000 0x00 0x400>;
			interrupts = <0x00 0xce 0x04>;
			clocks = <0x24 0x17 0x12 0x00 0x24 0x16>;
			clock-names = "bus\0pclk\0mclk";
			resets = <0x24 0x09>;
			status = "okay";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0xa4>;
			pinctrl-1 = <0xa5>;
			phandle = <0x1b7>;
		};

		irtx@2525000 {
			compatible = "allwinner,irtx";
			reg = <0x00 0x2525000 0x00 0x400>;
			interrupts = <0x00 0x1f 0x04>;
			clocks = <0x12 0xc0 0x2e 0x12 0xbf>;
			clock-names = "bus\0pclk\0mclk";
			resets = <0x12 0x46>;
			status = "disabled";
			phandle = <0x1b8>;
		};

		ledc@2520000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-leds";
			reg = <0x00 0x2520000 0x00 0x400>;
			interrupts = <0x00 0x21 0x04>;
			clocks = <0x12 0x102 0x12 0x103>;
			clock-names = "clk_ledc\0clk_cpuapb";
			resets = <0x12 0x71>;
			reset-names = "ledc_reset";
			dmas = <0x36 0x2e>;
			dma-names = "tx";
			status = "disabled";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0xa6>;
			pinctrl-1 = <0xa7>;
			led_count = <0x22>;
			output_mode = "GRB";
			reset_ns = <0x54>;
			t1h_ns = <0x320>;
			t1l_ns = <0x140>;
			t0h_ns = <0x12c>;
			t0l_ns = <0x320>;
			wait_time0_ns = <0x54>;
			wait_time1_ns = <0x54>;
			wait_data_time_ns = <0x927c0>;
			phandle = <0x1b9>;
		};

		npu@3600000 {
			compatible = "allwinner,npu";
			reg = <0x00 0x3600000 0x00 0x1000>;
			device_type = "npu";
			dev_name = "npu";
			interrupts = <0x00 0x41 0x04>;
			interrupt-names = "npu";
			clocks = <0x12 0x86 0x12 0x27 0x12 0x87 0x12 0x51 0x12 0x45>;
			clock-names = "clk_npu\0clk_parent\0clk_bus\0clk_mbus_gate\0clk_ahb_gate";
			operating-points-v2 = <0xa8>;
			resets = <0x12 0x1f 0x12 0x1e 0x12 0x1d>;
			reset-names = "npu_rst\0npu_axi_rst\0npu_ahb_rst";
			power-domains = <0x13 0x04>;
			npu-vf = <0x3f0>;
			status = "okay";
			npu-setvol = <0x01>;
			npu-supply = <0x67>;
			phandle = <0x1ba>;
		};

		hwspinlock@3005000 {
			compatible = "allwinner,sunxi-hwspinlock";
			reg = <0x00 0x3005000 0x00 0x1000>;
			#hwlock-cells = <0x01>;
			clocks = <0x12 0x64>;
			clock-names = "clk_hwspinlock_bus";
			resets = <0x12 0x0d>;
			reset-names = "rst";
			num-locks = <0x20>;
			status = "okay";
			phandle = <0x1bb>;
		};

		msgbox@3004000 {
			compatible = "allwinner,sun60iw2-msgbox";
			#mbox-cells = <0x01>;
			reg = <0x00 0x3004000 0x00 0x1000 0x00 0x7094000 0x00 0x1000>;
			interrupts = <0x00 0x00 0x04 0x00 0xd3 0x04>;
			clocks = <0x12 0x65>;
			clock-names = "msgbox";
			resets = <0x12 0x0e>;
			reset-names = "rst";
			local_id = <0x00>;
			status = "okay";
			phandle = <0x1bc>;
		};

		a55_rproc@0 {
			compatible = "allwinner,arm64-rproc";
			status = "disabled";
			phandle = <0x1bd>;
		};

		ce@4603000 {
			compatible = "allwinner,sunxi-ce";
			device_name = "ce";
			reg = <0x00 0x4603000 0x00 0xa0 0x00 0x4603800 0x00 0xa0>;
			interrupts = <0x00 0xa8 0x01 0x00 0xa9 0x01>;
			clock-frequency = <0x17d78400>;
			clocks = <0x12 0x85 0x12 0x83 0x12 0x5f 0x12 0x07 0x12 0x84>;
			clock-names = "bus_ce\0ce_clk\0mbus_ce\0clk_src\0ce_sys_clk";
			resets = <0x12 0x1c>;
			status = "okay";
			phandle = <0x1be>;
		};

		usbc0@10 {
			device_type = "usbc0";
			compatible = "allwinner,sunxi-otg-manager";
			reg = <0x00 0x10 0x00 0x1000>;
			usb_port_type = <0x02>;
			usb_detect_type = <0x03>;
			usb_detect_mode = <0x00>;
			usb_id_gpio = <0x32 0x00 0x0b 0x00>;
			usb_det_vbus_gpio = <0x32 0x01 0x05 0x00>;
			usb_regulator_io = "nocare";
			usb_wakeup_suspend = <0x00>;
			usb_luns = <0x03>;
			usb_serial_unique = <0x00>;
			usb_serial_number = "20080411";
			rndis_wceis = <0x01>;
			status = "okay";
			usb-role-switch;
			enable-active-high;
			detvbus_io-supply = <0x74>;
			phandle = <0x1bf>;

			port {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				endpoint@0 {
					reg = <0x00>;
					remote-endpoint = <0xa9>;
					phandle = <0x5c>;
				};
			};
		};

		udc-controller@4100000 {
			compatible = "allwinner,sunxi-udc";
			reg = <0x00 0x4100000 0x00 0x1000 0x00 0x00 0x00 0x100>;
			interrupts = <0x00 0x9c 0x04>;
			clocks = <0x12 0xdd 0x12 0xd7 0x12 0x10b 0x12 0x42 0x12 0x3b>;
			clock-names = "hosc\0bus_otg\0res_dcap\0usb_sys_ahb\0msi_lite";
			resets = <0x12 0x52 0x12 0x51>;
			reset-names = "otg\0phy";
			aw,dma_addr_extend;
			aw,dma_wordaddr_bypass = <0x01>;
			status = "okay";
			phy_range = <0x188>;
			phandle = <0x1c0>;
		};

		ehci0-controller@4101000 {
			compatible = "allwinner,sunxi-ehci0";
			reg = <0x00 0x4101000 0x00 0xfff 0x00 0x00 0x00 0x100 0x00 0x4100000 0x00 0x1000>;
			interrupts = <0x00 0x9d 0x04>;
			clocks = <0x12 0xdd 0x12 0xd8 0x12 0x10b 0x12 0x42 0x12 0x3b>;
			clock-names = "hosc\0bus_hci\0res_dcap\0usb_sys_ahb\0msi_lite";
			resets = <0x12 0x53 0x12 0x51>;
			reset-names = "hci\0phy";
			hci_ctrl_no = <0x00>;
			status = "okay";
			phy_range = <0x188>;
			drvvbus-supply = <0x5b>;
			phandle = <0x1c1>;
		};

		ohci0-controller@4101400 {
			compatible = "allwinner,sunxi-ohci0";
			reg = <0x00 0x4101400 0x00 0xfff 0x00 0x00 0x00 0x100 0x00 0x4100000 0x00 0x1000>;
			interrupts = <0x00 0x9e 0x04>;
			clocks = <0x12 0xdd 0x12 0xd9 0x12 0xd6 0x12 0x10b 0x12 0x42 0x12 0x3b>;
			clock-names = "hosc\0bus_hci\0ohci\0res_dcap\0usb_sys_ahb\0msi_lite";
			resets = <0x12 0x54 0x12 0x51>;
			reset-names = "hci\0phy";
			hci_ctrl_no = <0x00>;
			status = "okay";
			phy_range = <0x188>;
			drvvbus-supply = <0x5b>;
			phandle = <0x1c2>;
		};

		usbc1@11 {
			device_type = "usbc1";
			reg = <0x00 0x11 0x00 0x1000>;
			usb_regulator_io = "nocare";
			usb_wakeup_suspend = <0x00>;
			status = "okay";
			phandle = <0x1c3>;
		};

		ehci1-controller@4200000 {
			compatible = "allwinner,sunxi-ehci1";
			reg = <0x00 0x4200000 0x00 0xfff 0x00 0x00 0x00 0x100 0x00 0x4100000 0x00 0x1000>;
			interrupts = <0x00 0x9f 0x04>;
			clocks = <0x12 0xdd 0x12 0xdb 0x12 0x10b 0x12 0x42 0x12 0x3b>;
			clock-names = "hosc\0bus_hci\0res_dcap\0usb_sys_ahb\0msi_lite";
			resets = <0x12 0x56 0x12 0x55>;
			reset-names = "hci\0phy";
			hci_ctrl_no = <0x01>;
			status = "okay";
			drvvbus-supply = <0xaa>;
			phy_range = <0x188>;
			phandle = <0x1c4>;
		};

		ohci1-controller@4200400 {
			compatible = "allwinner,sunxi-ohci1";
			reg = <0x00 0x4200400 0x00 0xfff 0x00 0x00 0x00 0x100 0x00 0x4100000 0x00 0x1000>;
			interrupts = <0x00 0xa0 0x04>;
			clocks = <0x12 0xdd 0x12 0xdc 0x12 0xda 0x12 0x10b 0x12 0x42 0x12 0x3b>;
			clock-names = "hosc\0bus_hci\0ohci\0res_dcap\0usb_sys_ahb\0msi_lite";
			resets = <0x12 0x57 0x12 0x55>;
			reset-names = "hci\0phy";
			hci_ctrl_no = <0x01>;
			status = "okay";
			drvvbus-supply = <0xaa>;
			phy_range = <0x188>;
			phandle = <0x1c5>;
		};

		usbc2@12 {
			device_type = "usbc2";
			compatible = "allwinner,sunxi-plat-dwc3";
			reg = <0x00 0x12 0x00 0x1000>;
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges;
			aw,inv-sync-hdr-quirk;
			status = "okay";
			drvvbus-supply = <0xaa>;
			phandle = <0x1c6>;

			xhci2-controller@6a00000 {
				compatible = "snps,dwc3";
				reg = <0x00 0x6a00000 0x00 0x100000>;
				interrupts = <0x00 0x9b 0x04>;
				dr_mode = "host";
				clocks = <0x12 0xe0 0x12 0xde 0x12 0xdf>;
				clock-names = "bus_clk\0ref_clk\0suspend";
				assigned-clocks = <0x12 0xdf>;
				assigned-clock-rates = <0x16e3600>;
				resets = <0x12 0x58>;
				reset-names = "hci";
				power-domains = <0x13 0x08>;
				maximum-speed = "super-speed-plus";
				phy_type = "utmi";
				snps,dis_enblslpm_quirk;
				snps,dis-u1-entry-quirk;
				snps,dis-u2-entry-quirk;
				snps,dis_u3_susphy_quirk;
				snps,dis_u2_susphy_quirk;
				phys = <0xab 0xac>;
				phy-names = "usb2-phy\0usb3-phy";
				status = "okay";
				phandle = <0x1c7>;
			};
		};

		phy@6b00000 {
			compatible = "allwinner,sunxi-plat-phy";
			reg = <0x00 0x6b00000 0x00 0x800 0x00 0x3000000 0x00 0x300>;
			reg-names = "u2_base\0res_base";
			clocks = <0x12 0x10b>;
			clock-names = "res_dcap";
			aw,rext_mode = <0x02>;
			aw,phy_tune_param = <0x143338d6>;
			#phy-cells = <0x00>;
			status = "okay";
			phandle = <0xab>;
		};

		vind@5800800 {
			compatible = "allwinner,sunxi-vin-media\0simple-bus";
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges;
			device_id = <0x00>;
			csi_top = <0x134fd900>;
			csi_isp = <0x134fd900>;
			reg = <0x00 0x5800800 0x00 0x200 0x00 0x5800000 0x00 0x800 0x00 0x5810000 0x00 0x100>;
			interrupts = <0x00 0x87 0x04>;
			clocks = <0x12 0x108 0x12 0x19 0x12 0x105 0x2e 0x12 0x1a 0x12 0x106 0x2e 0x12 0x1a 0x12 0x107 0x2e 0x12 0x1a 0x12 0x10a 0x12 0x19 0x12 0x109 0x12 0x5c 0x12 0x5b>;
			clock-names = "csi_top\0csi_top_src\0csi_mclk0\0csi_mclk0_24m\0csi_mclk0_pll\0csi_mclk1\0csi_mclk1_24m\0csi_mclk1_pll\0csi_mclk2\0csi_mclk2_24m\0csi_mclk2_pll\0csi_isp\0csi_isp_src\0csi_bus\0csi_mbus\0csi_isp_mbus";
			resets = <0x12 0x73>;
			reset-names = "csi_ret\0isp_ret";
			pinctrl-names = "mclk0-default\0mclk0-sleep\0mclk1-default\0mclk1-sleep\0mclk2-default\0mclk2-sleep";
			pinctrl-0 = <0xad>;
			pinctrl-1 = <0xae>;
			pinctrl-2 = <0xaf>;
			pinctrl-3 = <0xb0>;
			pinctrl-4 = <0xb1>;
			pinctrl-5 = <0xb2>;
			power-domains = <0x13 0x00>;
			status = "okay";
			vind_mclkpin-supply = <0x4a>;
			vind_mclkpin_vol = <0x1b7740>;
			vind_mcsipin-supply = <0x4a>;
			vind_mcsipin_vol = <0x1b7740>;
			vind_mipipin-supply = <0x6d>;
			vind_mipipin_vol = <0x1b7740>;
			phandle = <0x1c8>;

			csi@5820000 {
				compatible = "allwinner,sunxi-csi";
				reg = <0x00 0x5820000 0x00 0x1000>;
				interrupts = <0x00 0x7d 0x04>;
				device_id = <0x00>;
				status = "okay";
				phandle = <0x1c9>;
			};

			csi@5821000 {
				compatible = "allwinner,sunxi-csi";
				reg = <0x00 0x5821000 0x00 0x1000>;
				interrupts = <0x00 0x7e 0x04>;
				pinctrl-names = "default\0sleep";
				pinctrl-0;
				pinctrl-1;
				device_id = <0x01>;
				status = "okay";
				phandle = <0x1ca>;
			};

			csi@5822000 {
				compatible = "allwinner,sunxi-csi";
				reg = <0x00 0x5822000 0x00 0x1000>;
				interrupts = <0x00 0x7f 0x04>;
				pinctrl-names = "default\0sleep";
				pinctrl-0;
				pinctrl-1;
				device_id = <0x02>;
				status = "disabled";
				phandle = <0x1cb>;
			};

			mipi@5810100 {
				compatible = "allwinner,sunxi-mipi";
				reg = <0x00 0x5810100 0x00 0x100 0x00 0x5811000 0x00 0x400>;
				interrupts = <0x00 0x85 0x04>;
				pinctrl-names = "mipi0-default\0mipi0-sleep";
				pinctrl-0 = <0xb3>;
				pinctrl-1 = <0xb4>;
				device_id = <0x00>;
				status = "okay";
				phandle = <0x1cc>;
			};

			mipi@5810200 {
				compatible = "allwinner,sunxi-mipi";
				reg = <0x00 0x5810200 0x00 0x100 0x00 0x5811400 0x00 0x400>;
				pinctrl-names = "mipi1-default\0mipi1-sleep";
				pinctrl-0 = <0xb5>;
				pinctrl-1 = <0xb6>;
				device_id = <0x01>;
				status = "okay";
				phandle = <0x1cd>;
			};

			mipi@5810300 {
				compatible = "allwinner,sunxi-mipi";
				reg = <0x00 0x5810300 0x00 0x100 0x00 0x5811800 0x00 0x400>;
				pinctrl-names = "mipi2-default\0mipi2-sleep";
				pinctrl-0 = <0xb7>;
				pinctrl-1 = <0xb8>;
				device_id = <0x02>;
				status = "okay";
				phandle = <0x1ce>;
			};

			tdm@5908000 {
				compatible = "allwinner,sunxi-tdm";
				reg = <0x00 0x5908000 0x00 0x400>;
				interrupts = <0x00 0x86 0x04>;
				work_mode = <0x00>;
				device_id = <0x00>;
				iommus = <0x29 0x02 0x00>;
				status = "okay";
				phandle = <0x1cf>;
			};

			isp@5900000 {
				compatible = "allwinner,sunxi-isp";
				reg = <0x00 0x5900000 0x00 0x1300>;
				interrupts = <0x00 0x81 0x04>;
				work_mode = <0x00>;
				device_id = <0x00>;
				iommus = <0x29 0x02 0x00>;
				status = "okay";
				phandle = <0x1d0>;
			};

			isp@58ffffc {
				compatible = "allwinner,sunxi-isp";
				reg = <0x00 0x58ffffc 0x00 0x1304>;
				interrupts = <0x00 0x82 0x04>;
				work_mode = <0xff>;
				device_id = <0x01>;
				iommus = <0x29 0x02 0x00>;
				status = "disabled";
				phandle = <0x1d1>;
			};

			isp@58ffff8 {
				compatible = "allwinner,sunxi-isp";
				reg = <0x00 0x58ffff8 0x00 0x1308>;
				interrupts = <0x00 0x83 0x04>;
				work_mode = <0xff>;
				device_id = <0x02>;
				iommus = <0x29 0x02 0x00>;
				status = "disabled";
				phandle = <0x1d2>;
			};

			isp@58ffff4 {
				compatible = "allwinner,sunxi-isp";
				reg = <0x00 0x58ffff4 0x00 0x130c>;
				interrupts = <0x00 0x84 0x04>;
				work_mode = <0xff>;
				device_id = <0x03>;
				iommus = <0x29 0x02 0x00>;
				status = "disabled";
				phandle = <0x1d3>;
			};

			isp@4 {
				compatible = "allwinner,sunxi-isp";
				device_id = <0x04>;
				iommus = <0x29 0x02 0x00>;
				status = "disabled";
				phandle = <0x1d4>;
			};

			isp@5 {
				compatible = "allwinner,sunxi-isp";
				device_id = <0x05>;
				iommus = <0x29 0x02 0x00>;
				status = "disabled";
				phandle = <0x1d5>;
			};

			isp@6 {
				compatible = "allwinner,sunxi-isp";
				device_id = <0x06>;
				iommus = <0x29 0x02 0x00>;
				status = "disabled";
				phandle = <0x1d6>;
			};

			scaler@5910000 {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00 0x5910000 0x00 0x400>;
				interrupts = <0x00 0x79 0x04>;
				work_mode = <0x00>;
				device_id = <0x00>;
				iommus = <0x29 0x01 0x00>;
				status = "okay";
				phandle = <0x1d7>;
			};

			scaler@590fffc {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00 0x590fffc 0x00 0x404>;
				work_mode = <0xff>;
				device_id = <0x01>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1d8>;
			};

			scaler@590fff8 {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00 0x590fff8 0x00 0x408>;
				work_mode = <0xff>;
				device_id = <0x02>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1d9>;
			};

			scaler@590fff4 {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00 0x590fff4 0x00 0x40c>;
				work_mode = <0xff>;
				device_id = <0x03>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1da>;
			};

			scaler@5910400 {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00 0x5910400 0x00 0x400>;
				interrupts = <0x00 0x7a 0x04>;
				work_mode = <0x00>;
				device_id = <0x04>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1db>;
			};

			scaler@59103fc {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00 0x59103fc 0x00 0x404>;
				work_mode = <0xff>;
				device_id = <0x05>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1dc>;
			};

			scaler@59103f8 {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00 0x59103f8 0x00 0x408>;
				work_mode = <0xff>;
				device_id = <0x06>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1dd>;
			};

			scaler@59103f4 {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00 0x59103f4 0x00 0x40c>;
				work_mode = <0xff>;
				device_id = <0x07>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1de>;
			};

			scaler@5910800 {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00 0x5910800 0x00 0x400>;
				interrupts = <0x00 0x7b 0x04>;
				work_mode = <0x00>;
				device_id = <0x08>;
				iommus = <0x29 0x01 0x00>;
				status = "okay";
				phandle = <0x1df>;
			};

			scaler@59107fc {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00 0x59107fc 0x00 0x404>;
				work_mode = <0xff>;
				device_id = <0x09>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1e0>;
			};

			scaler@59107f8 {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00 0x59107f8 0x00 0x408>;
				work_mode = <0xff>;
				device_id = <0x0a>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1e1>;
			};

			scaler@59107f4 {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00 0x59107f4 0x00 0x40c>;
				work_mode = <0xff>;
				device_id = <0x0b>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1e2>;
			};

			scaler@5910c00 {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00 0x5910c00 0x00 0x400>;
				interrupts = <0x00 0x7c 0x04>;
				work_mode = <0x00>;
				device_id = <0x0c>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1e3>;
			};

			scaler@5910bfc {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00 0x5910bfc 0x00 0x404>;
				work_mode = <0xff>;
				device_id = <0x0d>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1e4>;
			};

			scaler@5910bf8 {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00 0x5910bf8 0x00 0x408>;
				work_mode = <0xff>;
				device_id = <0x0e>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1e5>;
			};

			scaler@5910bf4 {
				compatible = "allwinner,sunxi-scaler";
				reg = <0x00 0x5910bf4 0x00 0x40c>;
				work_mode = <0xff>;
				device_id = <0x0f>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1e6>;
			};

			scaler@16 {
				compatible = "allwinner,sunxi-scaler";
				device_id = <0x10>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1e7>;
			};

			scaler@17 {
				compatible = "allwinner,sunxi-scaler";
				device_id = <0x11>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1e8>;
			};

			actuator@2108180 {
				compatible = "allwinner,sunxi-actuator";
				device_type = "actuator0";
				reg = <0x00 0x2108180 0x00 0x10>;
				actuator0_name = "cn3927_act";
				actuator0_slave = <0x18>;
				actuator0_af_pwdn;
				actuator0_afvdd = "afvcc-csi";
				actuator0_afvdd_vol = <0x2ab980>;
				status = "disabled";
				phandle = <0xba>;
			};

			flash@2108190 {
				device_type = "flash0";
				compatible = "allwinner,sunxi-flash";
				reg = <0x00 0x2108190 0x00 0x10>;
				flash0_type = <0x01>;
				flash0_en = <0x32 0x00 0x07 0x01>;
				flash0_mode = <0x33 0x07 0x0e 0x01>;
				flash0_flvdd = [00];
				flash0_flvdd_vol;
				device_id = <0x00>;
				status = "disabled";
				phandle = <0xb9>;
			};

			sensor@5812000 {
				reg = <0x00 0x5812000 0x00 0x10>;
				device_type = "sensor0";
				compatible = "allwinner,sunxi-sensor";
				sensor0_mname = "imx219";
				sensor0_twi_cci_id = <0x02>;
				sensor0_twi_addr = <0x20>;
				sensor0_mclk_id = <0x00>;
				sensor0_pos = "rear";
				sensor0_isp_used = <0x01>;
				sensor0_fmt = <0x01>;
				sensor0_stby_mode = <0x00>;
				sensor0_vflip = <0x00>;
				sensor0_hflip = <0x00>;
				sensor0_iovdd-supply;
				sensor0_iovdd_vol;
				sensor0_avdd-supply;
				sensor0_avdd_vol;
				sensor0_dvdd-supply;
				sensor0_dvdd_vol;
				sensor0_power_en;
				sensor0_reset;
				sensor0_pwdn = <0x33 0x04 0x09 0x00>;
				sensor0_sm_vs;
				flash_handle = <0xb9>;
				act_handle = <0xba>;
				device_id = <0x00>;
				status = "okay";
				sensor0_cameravdd-supply;
				sensor0_cameravdd_vol;
				phandle = <0x1e9>;
			};

			sensor@5812010 {
				reg = <0x00 0x5812010 0x00 0x10>;
				device_type = "sensor1";
				compatible = "allwinner,sunxi-sensor";
				sensor1_mname = "imx219_2";
				sensor1_twi_cci_id = <0x03>;
				sensor1_twi_addr = <0x20>;
				sensor1_mclk_id = <0x01>;
				sensor1_pos = "rear";
				sensor1_isp_used = <0x01>;
				sensor1_fmt = <0x01>;
				sensor1_stby_mode = <0x00>;
				sensor1_vflip = <0x00>;
				sensor1_hflip = <0x00>;
				sensor1_iovdd-supply;
				sensor1_iovdd_vol;
				sensor1_avdd-supply;
				sensor1_avdd_vol;
				sensor1_dvdd-supply;
				sensor1_dvdd_vol;
				sensor1_power_en;
				sensor1_reset;
				sensor1_pwdn = <0x33 0x04 0x07 0x00>;
				sensor1_sm_vs;
				flash_handle;
				act_handle;
				device_id = <0x01>;
				status = "okay";
				phandle = <0x1ea>;
			};

			sensor@5812020 {
				reg = <0x00 0x5812020 0x00 0x10>;
				device_type = "sensor2";
				compatible = "allwinner,sunxi-sensor";
				sensor2_mname = "imx386_mipi";
				sensor2_twi_cci_id = <0x03>;
				sensor2_twi_addr = <0x6c>;
				sensor2_mclk_id = <0x01>;
				sensor2_pos = "rear";
				sensor2_isp_used = <0x00>;
				sensor2_fmt = <0x00>;
				sensor2_stby_mode = <0x00>;
				sensor2_vflip = <0x00>;
				sensor2_hflip = <0x00>;
				sensor2_iovdd-supply;
				sensor2_iovdd_vol;
				sensor2_avdd-supply;
				sensor2_avdd_vol;
				sensor2_dvdd-supply;
				sensor2_dvdd_vol;
				sensor2_power_en;
				sensor2_reset;
				sensor2_pwdn;
				sensor2_sm_vs;
				flash_handle;
				act_handle;
				device_id = <0x02>;
				status = "disabled";
				phandle = <0x1eb>;
			};

			sensor_list@5812040 {
				reg = <0x00 0x5812040 0x00 0x10>;
				device_type = "sensor_list0";
				compatible = "allwinner,sunxi-sensor-list";
				csi_sel = <0x00>;
				sensor00_mname = "ov5675_mipi_b";
				sensor00_twi_addr = <0x60>;
				sensor00_type = <0x01>;
				sensor00_hflip = <0x01>;
				sensor00_vflip = <0x00>;
				sensor00_act_used = <0x01>;
				sensor00_act_name = "dw9714_act";
				sensor00_act_twi_addr = <0x18>;
				sensor01_mname = "gc05a2_mipi_b";
				sensor01_twi_addr = <0x62>;
				sensor01_type = <0x01>;
				sensor01_hflip = <0x00>;
				sensor01_vflip = <0x00>;
				sensor01_act_used = <0x01>;
				sensor01_act_name = "dw9714_act";
				sensor01_act_twi_addr = <0x18>;
				sensor02_mname = "gc5035_mipi_b";
				sensor02_twi_addr = <0x64>;
				sensor02_type = <0x01>;
				sensor02_hflip = <0x00>;
				sensor02_vflip = <0x00>;
				sensor02_act_used = <0x01>;
				sensor02_act_name = "dw9714_act";
				sensor02_act_twi_addr = <0x18>;
				device_id = <0x00>;
				status = "disabled";
				phandle = <0x1ec>;
			};

			sensor_list@5812050 {
				reg = <0x00 0x5812050 0x00 0x10>;
				device_type = "sensor_list1";
				compatible = "allwinner,sunxi-sensor-list";
				csi_sel = <0x00>;
				sensor10_mname = "ov02a10_mipi_f";
				sensor10_twi_addr = <0x70>;
				sensor10_type = <0x01>;
				sensor10_hflip = <0x01>;
				sensor10_vflip = <0x00>;
				sensor10_act_used = <0x00>;
				sensor10_act_name = [00];
				sensor10_act_twi_addr;
				sensor11_mname = "gc02m1_mipi_f";
				sensor11_twi_addr = <0x72>;
				sensor11_type = <0x01>;
				sensor11_hflip = <0x01>;
				sensor11_vflip = <0x00>;
				sensor11_act_used = <0x00>;
				sensor11_act_name = [00];
				sensor11_act_twi_addr;
				sensor12_mname = "gc02m2_mipi_f";
				sensor12_twi_addr = <0x74>;
				sensor12_type = <0x01>;
				sensor12_hflip = <0x00>;
				sensor12_vflip = <0x00>;
				sensor12_act_used = <0x00>;
				sensor12_act_name = [00];
				sensor12_act_twi_addr;
				device_id = <0x01>;
				status = "disabled";
				phandle = <0x1ed>;
			};

			vinc@5830000 {
				device_type = "vinc0";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00 0x5830000 0x00 0x1000>;
				interrupts = <0x00 0x75 0x04>;
				vinc0_csi_sel = <0x01>;
				vinc0_mipi_sel = <0x01>;
				vinc0_isp_sel = <0x00>;
				vinc0_isp_tx_ch = <0x00>;
				vinc0_tdm_rx_sel = <0x00>;
				vinc0_rear_sensor_sel = <0x00>;
				vinc0_front_sensor_sel = <0x00>;
				vinc0_sensor_list = <0x00>;
				device_id = <0x00>;
				work_mode = <0x00>;
				iommus = <0x29 0x01 0x00>;
				status = "okay";
				phandle = <0x1ee>;
			};

			vinc@582fffc {
				device_type = "vinc1";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00 0x582fffc 0x00 0x1004>;
				vinc1_csi_sel = <0x01>;
				vinc1_mipi_sel = <0x01>;
				vinc1_isp_sel = <0x01>;
				vinc1_isp_tx_ch = <0x00>;
				vinc1_tdm_rx_sel = <0x01>;
				vinc1_rear_sensor_sel = <0x00>;
				vinc1_front_sensor_sel = <0x00>;
				vinc1_sensor_list = <0x00>;
				device_id = <0x01>;
				work_mode = <0xff>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1ef>;
			};

			vinc@582fff8 {
				device_type = "vinc2";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00 0x582fff8 0x00 0x1008>;
				vinc2_csi_sel = <0x02>;
				vinc2_mipi_sel = <0x02>;
				vinc2_isp_sel = <0x02>;
				vinc2_isp_tx_ch = <0x00>;
				vinc2_tdm_rx_sel = <0x02>;
				vinc2_rear_sensor_sel = <0x01>;
				vinc2_front_sensor_sel = <0x01>;
				vinc2_sensor_list = <0x00>;
				device_id = <0x02>;
				work_mode = <0xff>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1f0>;
			};

			vinc@582fff4 {
				device_type = "vinc3";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00 0x582fff4 0x00 0x100c>;
				vinc3_csi_sel = <0x00>;
				vinc3_mipi_sel = <0xff>;
				vinc3_isp_sel = <0x00>;
				vinc3_isp_tx_ch = <0x00>;
				vinc3_tdm_rx_sel = <0x00>;
				vinc3_rear_sensor_sel = <0x01>;
				vinc3_front_sensor_sel = <0x01>;
				vinc3_sensor_list = <0x00>;
				device_id = <0x03>;
				work_mode = <0xff>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1f1>;
			};

			vinc@5831000 {
				device_type = "vinc4";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00 0x5831000 0x00 0x1000>;
				interrupts = <0x00 0x76 0x04>;
				vinc4_csi_sel = <0x00>;
				vinc4_mipi_sel = <0x00>;
				vinc4_isp_sel = <0x00>;
				vinc4_isp_tx_ch = <0x00>;
				vinc4_tdm_rx_sel = <0x00>;
				vinc4_rear_sensor_sel = <0x00>;
				vinc4_front_sensor_sel = <0x00>;
				vinc4_sensor_list = <0x00>;
				device_id = <0x04>;
				work_mode = <0x00>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1f2>;
			};

			vinc@5830ffc {
				device_type = "vinc5";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00 0x5830ffc 0x00 0x1004>;
				vinc5_csi_sel = <0x01>;
				vinc5_mipi_sel = <0x01>;
				vinc5_isp_sel = <0x01>;
				vinc5_isp_tx_ch = <0x00>;
				vinc5_tdm_rx_sel = <0x01>;
				vinc5_rear_sensor_sel = <0x00>;
				vinc5_front_sensor_sel = <0x00>;
				vinc5_sensor_list = <0x00>;
				device_id = <0x05>;
				work_mode = <0xff>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1f3>;
			};

			vinc@5830ff8 {
				device_type = "vinc6";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00 0x5830ff8 0x00 0x1008>;
				vinc6_csi_sel = <0x02>;
				vinc6_mipi_sel = <0x02>;
				vinc6_isp_sel = <0x02>;
				vinc6_isp_tx_ch = <0x00>;
				vinc6_tdm_rx_sel = <0x02>;
				vinc6_rear_sensor_sel = <0x01>;
				vinc6_front_sensor_sel = <0x01>;
				vinc6_sensor_list = <0x00>;
				device_id = <0x06>;
				work_mode = <0xff>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1f4>;
			};

			vinc@5830ff4 {
				device_type = "vinc7";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00 0x5830ff4 0x00 0x100c>;
				vinc7_csi_sel = <0x02>;
				vinc7_mipi_sel = <0xff>;
				vinc7_isp_sel = <0x00>;
				vinc7_isp_tx_ch = <0x00>;
				vinc7_tdm_rx_sel = <0x00>;
				vinc7_rear_sensor_sel = <0x00>;
				vinc7_front_sensor_sel = <0x00>;
				vinc7_sensor_list = <0x00>;
				device_id = <0x07>;
				work_mode = <0xff>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1f5>;
			};

			vinc@5832000 {
				device_type = "vinc8";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00 0x5832000 0x00 0x1000>;
				interrupts = <0x00 0x77 0x04>;
				vinc8_csi_sel = <0x00>;
				vinc8_mipi_sel = <0x00>;
				vinc8_isp_sel = <0x00>;
				vinc8_isp_tx_ch = <0x00>;
				vinc8_tdm_rx_sel = <0x00>;
				vinc8_rear_sensor_sel = <0x01>;
				vinc8_front_sensor_sel = <0x01>;
				vinc8_sensor_list = <0x00>;
				device_id = <0x08>;
				work_mode = <0x00>;
				iommus = <0x29 0x01 0x00>;
				status = "okay";
				phandle = <0x1f6>;
			};

			vinc@5831ffc {
				device_type = "vinc9";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00 0x5831ffc 0x00 0x1004>;
				vinc9_csi_sel = <0x02>;
				vinc9_mipi_sel = <0xff>;
				vinc9_isp_sel = <0x00>;
				vinc9_isp_tx_ch = <0x00>;
				vinc9_tdm_rx_sel = <0x00>;
				vinc9_rear_sensor_sel = <0x00>;
				vinc9_front_sensor_sel = <0x00>;
				vinc9_sensor_list = <0x00>;
				device_id = <0x09>;
				work_mode = <0xff>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1f7>;
			};

			vinc@5831ff8 {
				device_type = "vinc10";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00 0x5831ff8 0x00 0x1008>;
				vinc10_csi_sel = <0x02>;
				vinc10_mipi_sel = <0xff>;
				vinc10_isp_sel = <0x00>;
				vinc10_isp_tx_ch = <0x00>;
				vinc10_tdm_rx_sel = <0x00>;
				vinc10_rear_sensor_sel = <0x00>;
				vinc10_front_sensor_sel = <0x00>;
				vinc10_sensor_list = <0x00>;
				device_id = <0x0a>;
				work_mode = <0xff>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1f8>;
			};

			vinc@5831ff4 {
				device_type = "vinc11";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00 0x5831ff4 0x00 0x100c>;
				vinc11_csi_sel = <0x02>;
				vinc11_mipi_sel = <0xff>;
				vinc11_isp_sel = <0x00>;
				vinc11_isp_tx_ch = <0x00>;
				vinc11_tdm_rx_sel = <0x00>;
				vinc11_rear_sensor_sel = <0x00>;
				vinc11_front_sensor_sel = <0x00>;
				vinc11_sensor_list = <0x00>;
				device_id = <0x0b>;
				work_mode = <0xff>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1f9>;
			};

			vinc@5833000 {
				device_type = "vinc12";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00 0x5833000 0x00 0x1000>;
				interrupts = <0x00 0x78 0x04>;
				vinc12_csi_sel = <0x02>;
				vinc12_mipi_sel = <0x02>;
				vinc12_isp_sel = <0x00>;
				vinc12_isp_tx_ch = <0x00>;
				vinc12_tdm_rx_sel = <0x00>;
				vinc12_rear_sensor_sel = <0x01>;
				vinc12_front_sensor_sel = <0x01>;
				vinc12_sensor_list = <0x00>;
				device_id = <0x0c>;
				work_mode = <0x00>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1fa>;
			};

			vinc@5832ffc {
				device_type = "vinc13";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00 0x5832ffc 0x00 0x1004>;
				vinc13_csi_sel = <0x02>;
				vinc13_mipi_sel = <0xff>;
				vinc13_isp_sel = <0x00>;
				vinc13_isp_tx_ch = <0x00>;
				vinc13_tdm_rx_sel = <0x00>;
				vinc13_rear_sensor_sel = <0x00>;
				vinc13_front_sensor_sel = <0x00>;
				vinc13_sensor_list = <0x00>;
				device_id = <0x0d>;
				work_mode = <0xff>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1fb>;
			};

			vinc@5832ff8 {
				device_type = "vinc14";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00 0x5832ff8 0x00 0x1008>;
				vinc14_csi_sel = <0x02>;
				vinc14_mipi_sel = <0xff>;
				vinc14_isp_sel = <0x00>;
				vinc14_isp_tx_ch = <0x00>;
				vinc14_tdm_rx_sel = <0x00>;
				vinc14_rear_sensor_sel = <0x00>;
				vinc14_front_sensor_sel = <0x00>;
				vinc14_sensor_list = <0x00>;
				device_id = <0x0e>;
				work_mode = <0xff>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1fc>;
			};

			vinc@5832ff4 {
				device_type = "vinc15";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00 0x5832ff4 0x00 0x100c>;
				vinc15_csi_sel = <0x02>;
				vinc15_mipi_sel = <0xff>;
				vinc15_isp_sel = <0x00>;
				vinc15_isp_tx_ch = <0x00>;
				vinc15_tdm_rx_sel = <0x00>;
				vinc15_rear_sensor_sel = <0x00>;
				vinc15_front_sensor_sel = <0x00>;
				vinc15_sensor_list = <0x00>;
				device_id = <0x0f>;
				work_mode = <0xff>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1fd>;
			};

			vinc@5834000 {
				device_type = "vinc16";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00 0x5834000 0x00 0x1000>;
				interrupts = <0x00 0x6b 0x04>;
				vinc16_csi_sel = <0x02>;
				vinc16_mipi_sel = <0x02>;
				vinc16_isp_sel = <0x00>;
				vinc16_isp_tx_ch = <0x00>;
				vinc16_tdm_rx_sel = <0x00>;
				vinc16_rear_sensor_sel = <0x01>;
				vinc16_front_sensor_sel = <0x01>;
				vinc16_sensor_list = <0x00>;
				device_id = <0x10>;
				work_mode = <0x00>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1fe>;
			};

			vinc@5835000 {
				device_type = "vinc17";
				compatible = "allwinner,sunxi-vin-core";
				reg = <0x00 0x5835000 0x00 0x1000>;
				interrupts = <0x00 0x6c 0x04>;
				vinc17_csi_sel = <0x02>;
				vinc17_mipi_sel = <0x02>;
				vinc17_isp_sel = <0x00>;
				vinc17_isp_tx_ch = <0x00>;
				vinc17_tdm_rx_sel = <0x00>;
				vinc17_rear_sensor_sel = <0x01>;
				vinc17_front_sensor_sel = <0x01>;
				vinc17_sensor_list = <0x00>;
				device_id = <0x11>;
				work_mode = <0x00>;
				iommus = <0x29 0x01 0x00>;
				status = "disabled";
				phandle = <0x1ff>;
			};
		};

		deinterlace@5400000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-deinterlace";
			reg = <0x00 0x5400000 0x00 0x40000>;
			interrupts = <0x00 0x34 0x04>;
			iommus = <0x29 0x09 0x01>;
			power-domains = <0x13 0x01>;
			status = "okay";
			clocks = <0x12 0x78 0x12 0x79>;
			clock-names = "clk_di\0clk_bus_di";
			clock-frequency = <0x11e1a300>;
			resets = <0x12 0x15 0x12 0x18>;
			reset-names = "rst_bus_di\0rst_bus_desys";
			phandle = <0x200>;
		};

		g2d@5440000 {
			compatible = "allwinner,sunxi-g2d";
			reg = <0x00 0x5440000 0x00 0x30000>;
			interrupts = <0x00 0x33 0x04>;
			clocks = <0x12 0x7b 0x12 0x7a 0x12 0x55 0x12 0x46>;
			clock-names = "bus\0g2d\0mbus_desys\0ahb_de";
			resets = <0x12 0x16 0x12 0x18>;
			reset-names = "rst_bus_g2d\0rst_bus_desys";
			iommus = <0x29 0x0a 0x01>;
			power-domains = <0x13 0x01>;
			power-domain-names = "pd_de_sys";
			assigned-clocks = <0x12 0x7a>;
			assigned-clock-rates = <0x11e1a300>;
			phandle = <0x201>;
		};

		pd_vi_test@0 {
			compatible = "allwinner,sunxi-power-domain-test";
			power-domains = <0x13 0x00>;
			status = "okay";
			phandle = <0x202>;
		};

		pd_ve_enc_test@0 {
			compatible = "allwinner,sunxi-power-domain-test";
			power-domains = <0x13 0x03>;
			status = "okay";
			phandle = <0x203>;
		};

		pd_npu_test@0 {
			compatible = "allwinner,sunxi-power-domain-test";
			power-domains = <0x13 0x04>;
			status = "okay";
			phandle = <0x204>;
		};

		pd_gpu_top_test@0 {
			compatible = "allwinner,sunxi-power-domain-test";
			power-domains = <0x13 0x05>;
			status = "okay";
			phandle = <0x205>;
		};

		pd_gpu_core_test@0 {
			compatible = "allwinner,sunxi-power-domain-test";
			power-domains = <0x13 0x06>;
			status = "okay";
			phandle = <0x206>;
		};

		pd_pcie_test@0 {
			compatible = "allwinner,sunxi-power-domain-test";
			power-domains = <0x13 0x07>;
			status = "okay";
			phandle = <0x207>;
		};

		pd_usb2_test@0 {
			compatible = "allwinner,sunxi-power-domain-test";
			power-domains = <0x13 0x08>;
			status = "okay";
			phandle = <0x208>;
		};

		pd_de_sys_test@0 {
			compatible = "allwinner,sunxi-power-domain-test";
			power-domains = <0x13 0x01>;
			status = "okay";
			phandle = <0x209>;
		};

		pd_vo_test@0 {
			compatible = "allwinner,sunxi-power-domain-test";
			power-domains = <0x13 0x09>;
			status = "okay";
			phandle = <0x20a>;
		};

		pd_vo1_test@0 {
			compatible = "allwinner,sunxi-power-domain-test";
			power-domains = <0x13 0x0a>;
			status = "okay";
			phandle = <0x20b>;
		};

		stmmac-axi-config {
			snps,lpi_en;
			snps,wr_osr_lmt = <0x0f>;
			snps,rd_osr_lmt = <0x0f>;
			snps,blen = <0x100 0x80 0x40 0x20 0x10 0x08 0x04>;
			phandle = <0xbc>;
		};

		rx-queues-config {
			snps,rx-queues-to-use = <0x01>;
			phandle = <0xbd>;

			queue0 {
			};
		};

		tx_queues-config {
			snps,tx-queues-to-use = <0x01>;
			phandle = <0xbe>;

			queue0 {
			};
		};

		ethernet@4500000 {
			compatible = "allwinner,sunxi-gmac-210\0snps,dwmac-5.20";
			reg = <0x00 0x4500000 0x00 0x8000 0x00 0x4508000 0x00 0x1000>;
			interrupts = <0x00 0xac 0x04 0x00 0xb2 0x04 0x00 0xad 0x04 0x00 0xae 0x04>;
			interrupt-names = "macirq\0eth_lpi\0tx0_irq\0rx0_irq";
			clocks = <0x12 0xe8 0x12 0x5a 0x12 0xe7 0x12 0xe6>;
			clock-names = "stmmaceth\0pclk\0phy\0ptp_ref";
			assigned-clocks = <0x12 0xe7>;
			assigned-clock-rates = <0x17d7840>;
			resets = <0x12 0x5c 0x12 0x5d>;
			reset-names = "stmmaceth\0ahb";
			phy-mode = "rgmii";
			phy-handle = <0xbb>;
			status = "disabled";
			aw,rgmii-clk-ext;
			snps,fixed-burst;
			snps,en-tx-lpi-clockgating;
			snps,axi-config = <0xbc>;
			snps,mtl-rx-config = <0xbd>;
			snps,mtl-tx-config = <0xbe>;
			pinctrl-0 = <0xbf>;
			pinctrl-1 = <0xc0>;
			pinctrl-names = "default\0sleep";
			aw,soc-phy-clk-en;
			tx-delay = <0x0d>;
			rx-delay = <0x0a>;
			dwmac3v3-supply = <0x47>;
			phy3v3-supply = <0x47>;
			phandle = <0x20c>;

			mdio0@0 {
				compatible = "snps,dwmac-mdio";
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				phandle = <0x20d>;

				ethernet-phy@1 {
					compatible = "ethernet-phy-id001c.c916";
					reg = <0x01>;
					max-speed = <0x3e8>;
					reset-gpios = <0x33 0x07 0x10 0x01>;
					reset-assert-us = <0x2710>;
					reset-deassert-us = <0x249f0>;
					status = "disabled";
					phandle = <0xbb>;
				};
			};
		};

		ethernet@4510000 {
			compatible = "allwinner,sunxi-gmac-210\0snps,dwmac-5.20";
			reg = <0x00 0x4510000 0x00 0x8000 0x00 0x4518000 0x00 0x1000>;
			interrupts = <0x00 0xaf 0x04 0x00 0xb3 0x04 0x00 0xb0 0x04 0x00 0xb1 0x04>;
			interrupt-names = "macirq\0eth_lpi\0tx0_irq\0rx0_irq";
			clocks = <0x12 0xea 0x12 0x59 0x12 0xe9 0x12 0xe6>;
			clock-names = "stmmaceth\0pclk\0phy25m\0ptp_ref";
			assigned-clocks = <0x12 0xe9>;
			assigned-clock-rates = <0x17d7840>;
			resets = <0x12 0x5e 0x12 0x5f>;
			reset-names = "stmmaceth\0ahb";
			phy-mode = "rgmii";
			phy-handle = <0xc1>;
			status = "okay";
			aw,rgmii-clk-ext;
			snps,fixed-burst;
			snps,en-tx-lpi-clockgating;
			snps,axi-config = <0xbc>;
			snps,mtl-rx-config = <0xbd>;
			snps,mtl-tx-config = <0xbe>;
			pinctrl-0 = <0xc2>;
			pinctrl-1 = <0xc3>;
			pinctrl-names = "default\0sleep";
			aw,soc-phy-clk-en;
			tx-delay = <0x0e>;
			rx-delay = <0x07>;
			dwmac3v3-supply = <0x47>;
			phy3v3-supply = <0x47>;
			phandle = <0x20e>;

			mdio1@0 {
				compatible = "snps,dwmac-mdio";
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				phandle = <0x20f>;

				ethernet-phy@1 {
					compatible = "ethernet-phy-ieee802.3-c22";
					reg = <0x00>;
					max-speed = <0x3e8>;
					reset-gpios = <0x33 0x09 0x10 0x01>;
					reset-assert-us = <0x2710>;
					reset-deassert-us = <0x249f0>;
					phandle = <0xc1>;
				};
			};
		};

		rfkill {
			compatible = "allwinner,sunxi-rfkill";
			status = "okay";
			chip_en;
			power_en;
			pinctrl-0;
			pinctrl-names;
			phandle = <0x210>;

			wlan {
				compatible = "allwinner,sunxi-wlan";
				clocks;
				clock-names;
				wlan_power = "axp8191-dc1sw2\0axp8191-dldo5";
				wlan_power_vol = <0x325aa0 0x1b7740>;
				wlan_busnum = <0x01>;
				wlan_regon = <0x33 0x06 0x01 0x00>;
				wlan_hostwake = <0x33 0x06 0x02 0x00>;
				regulator-boot-on;
				regulator-always-on;
				wakeup-source;
			};

			bt {
				compatible = "allwinner,sunxi-bt";
				clocks;
				clock-names;
				bt_power = "axp8191-dc1sw2\0axp8191-dldo5";
				bt_power_vol = <0x325aa0 0x1b7740>;
				bt_rst_n = <0x33 0x06 0x03 0x01>;
			};
		};

		addr_mgt {
			compatible = "allwinner,sunxi-addr_mgt";
			status = "okay";
			type_addr_wifi = <0x00>;
			type_addr_bt = <0x00>;
			type_addr_eth = <0x00>;
			phandle = <0x211>;
		};

		btlpm {
			compatible = "allwinner,sunxi-btlpm";
			uart_index = <0x01>;
			bt_wake = <0x33 0x06 0x00 0x00>;
			bt_hostwake = <0x33 0x06 0x04 0x00>;
			status = "okay";
			phandle = <0x212>;
		};

		spi@2540000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-spi-v1.3";
			device_type = "spi0";
			reg = <0x00 0x2540000 0x00 0x1000>;
			interrupts = <0x00 0x18 0x04>;
			clocks = <0x12 0x08 0x12 0xae 0x12 0xaf>;
			clock-names = "pll\0mod\0bus";
			clock-frequency = <0x5f5e100>;
			resets = <0x12 0x3d>;
			dmas = <0x36 0x17 0x36 0x17>;
			dma-names = "tx\0rx";
			sunxi,spi-num-cs = <0x02>;
			status = "disabled";
			phandle = <0x213>;
		};

		spi@2541000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-spi-v1.4";
			device_type = "spi1";
			reg = <0x00 0x2541000 0x00 0x1000>;
			interrupts = <0x00 0x19 0x04>;
			clocks = <0x12 0x08 0x12 0xb0 0x12 0xb1>;
			clock-names = "pll\0mod\0bus";
			clock-frequency = <0x5f5e100>;
			resets = <0x12 0x3e>;
			dmas = <0x36 0x18 0x36 0x18>;
			dma-names = "tx\0rx";
			sunxi,spi-num-cs = <0x02>;
			status = "okay";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0xc4>;
			pinctrl-1 = <0xc5>;
			sunxi,spi-bus-mode = <0x01>;
			sunxi,spi-cs-mode = <0x00>;
			phandle = <0x214>;

			spidev@1 {
				reg = <0x01>;
				compatible = "rohm,dh2228fv";
				spi-max-frequency = <0x7a120>;
				spi-rx-bus-width = <0x01>;
				spi-tx-bus-width = <0x01>;
			};
		};

		spi@2542000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-spi-v1.3";
			device_type = "spi2";
			reg = <0x00 0x2542000 0x00 0x1000>;
			interrupts = <0x00 0x1a 0x04>;
			clocks = <0x12 0x08 0x12 0xb2 0x12 0xb3>;
			clock-names = "pll\0mod\0bus";
			clock-frequency = <0x5f5e100>;
			resets = <0x12 0x3f>;
			dmas = <0x36 0x19 0x36 0x19>;
			dma-names = "tx\0rx";
			sunxi,spi-num-cs = <0x01>;
			status = "disabled";
			pinctrl-0 = <0xc6 0xc7>;
			pinctrl-1 = <0xc8>;
			pinctrl-names = "default\0sleep";
			sunxi,spi-bus-mode = <0x01>;
			sunxi,spi-cs-mode = <0x00>;
			phandle = <0x215>;

			spidev@0 {
				compatible = "rohm,dh2228fv";
				reg = <0x00>;
				spi-max-frequency = <0x5f5e100>;
				spi-rx-bus-width = <0x01>;
				spi-tx-bus-width = <0x01>;
				status = "disabled";
			};
		};

		spi@2543000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-spi-v1.3";
			device_type = "spi3";
			reg = <0x00 0x2543000 0x00 0x1000>;
			interrupts = <0x00 0x1b 0x04>;
			clocks = <0x12 0x08 0x12 0xb6 0x12 0xb7>;
			clock-names = "pll\0mod\0bus";
			clock-frequency = <0x5f5e100>;
			resets = <0x12 0x41>;
			dmas = <0x36 0x1a 0x36 0x1a>;
			dma-names = "tx\0rx";
			sunxi,spi-num-cs = <0x01>;
			status = "disabled";
			phandle = <0x216>;
		};

		spi@2544000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-spi-v1.3";
			device_type = "spi4";
			reg = <0x00 0x2544000 0x00 0x1000>;
			interrupts = <0x00 0x1c 0x04>;
			clocks = <0x12 0x08 0x12 0xb8 0x12 0xb9>;
			clock-names = "pll\0mod\0bus";
			clock-frequency = <0x5f5e100>;
			resets = <0x12 0x42>;
			dmas = <0x36 0x36 0x36 0x36>;
			dma-names = "tx\0rx";
			sunxi,spi-num-cs = <0x02>;
			status = "disabled";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0xc9>;
			pinctrl-1 = <0xca>;
			sunxi,spi-bus-mode = <0x01>;
			sunxi,spi-cs-mode = <0x00>;
			phandle = <0x217>;

			spidev@0 {
				reg = <0x00>;
				compatible = "rohm,dh2228fv";
				spi-max-frequency = <0x7a120>;
				spi-rx-bus-width = <0x01>;
				spi-tx-bus-width = <0x01>;
			};

			spidev@1 {
				reg = <0x01>;
				compatible = "rohm,dh2228fv";
				spi-max-frequency = <0x7a120>;
				spi-rx-bus-width = <0x01>;
				spi-tx-bus-width = <0x01>;
			};
		};

		spi@7092000 {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			compatible = "allwinner,sunxi-spi-v1.3";
			device_type = "r_spi";
			reg = <0x00 0x7092000 0x00 0x1000>;
			interrupts = <0x00 0xd2 0x04>;
			clocks = <0x12 0x08 0x24 0x0b 0x24 0x0c>;
			clock-names = "pll\0mod\0bus";
			clock-frequency = <0x5f5e100>;
			resets = <0x24 0x02>;
			dmas = <0x36 0x35 0x36 0x35>;
			dma-names = "tx\0rx";
			sunxi,spi-num-cs = <0x01>;
			status = "disabled";
			phandle = <0x218>;
		};

		serdes@6c00000 {
			compatible = "allwinner,cadence-combophy";
			reg = <0x00 0x6c00000 0x00 0x400 0x00 0x6c06000 0x00 0x2000 0x00 0x709016c 0x00 0x04>;
			clocks = <0x12 0xe5 0x2b 0x0a 0x2b 0x09>;
			clock-names = "serdes-clk\0dcxo-serdes0-clk\0dcxo-serdes1-clk";
			resets = <0x12 0x5b>;
			reset-names = "serdes-reset";
			#address-cells = <0x02>;
			#size-cells = <0x02>;
			ranges;
			status = "okay";
			serdes1v8-supply = <0x4a>;
			phandle = <0x101>;

			combo-phy0@6c01000 {
				reg = <0x00 0x6c01000 0x00 0xa00 0x00 0x6c80000 0x00 0x20000>;
				lane_invert = <0x00 0x00 0x00 0x00>;
				lane_remap = <0x00 0x01 0x02 0x03>;
				phandle = <0x219>;

				combo0-dp-phy {
					#phy-cells = <0x00>;
					status = "okay";
					phandle = <0xff>;
				};

				combo0-usb-phy {
					#phy-cells = <0x00>;
					status = "okay";
					phandle = <0xac>;
				};
			};

			combo-phy1@6c02000 {
				reg = <0x00 0x6c02000 0x00 0xa00 0x00 0x6ca0000 0x00 0x20000>;
				status = "okay";
				phandle = <0x21a>;

				combo1-usb-phy {
					#phy-cells = <0x00>;
					status = "okay";
					phandle = <0x21b>;
				};

				combo1-pcie-phy {
					#phy-cells = <0x00>;
					status = "okay";
					phandle = <0x13d>;
				};
			};

			aux-hpd@6c01e00 {
				reg = <0x00 0x6c01e00 0x00 0x200>;
				phandle = <0x21c>;

				aux-hpd-phy {
					#phy-cells = <0x00>;
					status = "okay";
					phandle = <0x100>;
				};
			};
		};

		sunxi-drm {
			compatible = "allwinner,sunxi-drm";
			fb_base = <0x00>;
			status = "okay";
			phandle = <0x21d>;
		};

		de@5000000 {
			compatible = "allwinner,display-engine-v352";
			iommus = <0x29 0x08 0x01>;
			nsi = <0xcb 0x02>;
			power-domains = <0x13 0x01>;
			reg = <0x00 0x5000000 0x00 0x400000>;
			interrupts = <0x00 0x32 0x04 0x00 0x22 0x04>;
			clocks = <0x12 0x76 0x12 0x77 0x12 0x46 0x12 0x55>;
			clock-names = "clk_de\0clk_bus_de\0ahb_vid_out\0mbus_vo_sys";
			resets = <0x12 0x14 0x12 0x18>;
			reset-names = "rst_bus_de\0rst_bus_de_sys";
			assigned-clocks = <0x12 0x76>;
			assigned-clock-parents = <0x12 0x2a>;
			assigned-clock-rates = <0x23c34600>;
			status = "okay";
			chn_cfg_mode = <0x02>;
			phandle = <0x21e>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					reg = <0x00>;
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					phandle = <0x21f>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xcc>;
						phandle = <0xd7>;
					};

					endpoint@1 {
						reg = <0x01>;
						remote-endpoint = <0xcd>;
						phandle = <0xdd>;
					};

					endpoint@2 {
						reg = <0x02>;
						remote-endpoint = <0xce>;
						phandle = <0xe0>;
					};

					endpoint@3 {
						reg = <0x04>;
						remote-endpoint = <0xcf>;
						phandle = <0xf9>;
					};

					endpoint@4 {
						reg = <0x05>;
						remote-endpoint = <0xd0>;
						phandle = <0xfc>;
					};
				};

				port@1 {
					reg = <0x01>;
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					phandle = <0x220>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xd1>;
						phandle = <0xd8>;
					};

					endpoint@1 {
						reg = <0x01>;
						remote-endpoint = <0xd2>;
						phandle = <0xde>;
					};

					endpoint@2 {
						reg = <0x02>;
						remote-endpoint = <0xd3>;
						phandle = <0xe1>;
					};

					endpoint@3 {
						reg = <0x04>;
						remote-endpoint = <0xd4>;
						phandle = <0xfa>;
					};

					endpoint@4 {
						reg = <0x05>;
						remote-endpoint = <0xd5>;
						phandle = <0xfd>;
					};
				};
			};
		};

		vo0@5500000 {
			compatible = "allwinner,tcon-top0";
			reg = <0x00 0x5500000 0x00 0x1000>;
			clocks = <0x12 0x100 0x12 0x48>;
			clock-names = "clk_bus_dpss_top\0clk_ahb_gate";
			resets = <0x12 0x6d 0x12 0x6f>;
			reset-names = "rst_bus_dpss_top\0rst_bus_reg";
			power-domains = <0x13 0x09>;
			status = "okay";
			phandle = <0xd6>;
		};

		vo1@5510000 {
			compatible = "allwinner,tcon-top1";
			reg = <0x00 0x5510000 0x00 0x1000>;
			clocks = <0x12 0x101 0x12 0x47>;
			clock-names = "clk_bus_dpss_top\0clk_ahb_gate";
			resets = <0x12 0x6e 0x12 0x70>;
			reset-names = "rst_bus_dpss_top\0rst_bus_reg";
			power-domains = <0x13 0x0a>;
			status = "okay";
			phandle = <0xf8>;
		};

		tcon0@5501000 {
			compatible = "allwinner,tcon-lcd";
			reg = <0x00 0x5501000 0x00 0x1000>;
			interrupts = <0x00 0x36 0x04>;
			clocks = <0x12 0xec>;
			clock-names = "clk_bus_tcon";
			resets = <0x12 0x60>;
			reset-names = "rst_bus_tcon";
			top = <0xd6>;
			status = "disabled";
			phandle = <0x221>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x00>;
					phandle = <0x222>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xd7>;
						phandle = <0xcc>;
					};

					endpoint@1 {
						reg = <0x01>;
						remote-endpoint = <0xd8>;
						phandle = <0xd1>;
					};
				};

				port@1 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x01>;
					phandle = <0x223>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xd9>;
						phandle = <0xe5>;
					};

					endpoint@1 {
						reg = <0x01>;
						remote-endpoint = <0xda>;
						phandle = <0xea>;
					};

					endpoint@2 {
						reg = <0x02>;
						remote-endpoint = <0xdb>;
						phandle = <0xf1>;
					};

					endpoint@3 {
						reg = <0x03>;
						remote-endpoint = <0xdc>;
						phandle = <0xee>;
					};
				};
			};
		};

		tcon1@5502000 {
			compatible = "allwinner,tcon-lcd";
			reg = <0x00 0x5502000 0x00 0x1000>;
			interrupts = <0x00 0x37 0x04>;
			clocks = <0x12 0xee>;
			clock-names = "clk_bus_tcon";
			resets = <0x12 0x61>;
			reset-names = "rst_bus_tcon";
			top = <0xd6>;
			status = "okay";
			phandle = <0x224>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					reg = <0x00>;
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					phandle = <0x225>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xdd>;
						phandle = <0xcd>;
					};

					endpoint@1 {
						reg = <0x01>;
						remote-endpoint = <0xde>;
						phandle = <0xd2>;
					};
				};

				port@1 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x01>;
					phandle = <0x226>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xdf>;
						phandle = <0xe9>;
					};
				};
			};
		};

		tcon2@5503000 {
			compatible = "allwinner,tcon-lcd";
			reg = <0x00 0x5503000 0x00 0x1000>;
			interrupts = <0x00 0x38 0x04>;
			clocks = <0x12 0xef 0x12 0xf0>;
			clock-names = "clk_tcon\0clk_bus_tcon";
			resets = <0x12 0x62>;
			reset-names = "rst_bus_tcon";
			assigned-clocks = <0x12 0xef>;
			assigned-clock-parents = <0x12 0x1f>;
			top = <0xd6>;
			status = "disabled";
			phandle = <0x227>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x00>;
					phandle = <0x228>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xe0>;
						phandle = <0xce>;
					};

					endpoint@1 {
						reg = <0x01>;
						remote-endpoint = <0xe1>;
						phandle = <0xd3>;
					};
				};

				port@1 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x01>;
					phandle = <0x229>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xe2>;
						phandle = <0xf6>;
					};

					endpoint@1 {
						reg = <0x01>;
						remote-endpoint = <0xe3>;
						phandle = <0xf3>;
					};
				};
			};
		};

		phy@5507000 {
			compatible = "allwinner,sunxi-dsi-combo-phy0,sun60iw2";
			reg = <0x00 0x5507000 0x00 0x1ff>;
			clocks = <0x12 0xf2>;
			clock-names = "phy_gating_clk";
			resets = <0x12 0x65>;
			reset-names = "phy_rst_clk";
			#clock-cells = <0x01>;
			#phy-cells = <0x00>;
			status = "disabled";
			phandle = <0xe4>;
		};

		dsi0@5506000 {
			compatible = "allwinner,dsi0";
			reg = <0x00 0x5506000 0x00 0xfff>;
			interrupts = <0x00 0x3b 0x04>;
			clocks = <0x12 0xf1 0x12 0xf2 0xe4 0x02 0xe4 0x01>;
			clock-names = "dsi_clk\0dsi_gating_clk\0displl_hs\0displl_ls";
			resets = <0x12 0x65>;
			reset-names = "dsi_rst_clk";
			assigned-clocks = <0x12 0xf1>;
			assigned-clock-parents = <0x12 0x0b>;
			phys = <0xe4>;
			phy-names = "combophy";
			status = "disabled";
			phandle = <0x22a>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x00>;
					phandle = <0x22b>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xe5>;
						phandle = <0xd9>;
					};
				};
			};
		};

		phy@5509000 {
			compatible = "allwinner,sunxi-dsi-combo-phy1,sun60iw2";
			reg = <0x00 0x5509000 0x00 0x1ff>;
			clocks = <0x12 0xf4>;
			clock-names = "phy_gating_clk";
			resets = <0x12 0x66>;
			reset-names = "phy_rst_clk";
			#clock-cells = <0x01>;
			#phy-cells = <0x00>;
			status = "okay";
			phandle = <0xe6>;
		};

		dsi1@5508000 {
			compatible = "allwinner,dsi1";
			reg = <0x00 0x5508000 0x00 0xfff>;
			interrupts = <0x00 0x3c 0x04>;
			clocks = <0x12 0xf3 0x12 0xf4 0xe6 0x02 0xe6 0x01>;
			clock-names = "dsi_clk\0dsi_gating_clk\0displl_hs\0displl_ls";
			resets = <0x12 0x66>;
			reset-names = "dsi_rst_clk";
			assigned-clocks = <0x12 0xf3>;
			assigned-clock-parents = <0x12 0x0b>;
			phys = <0xe6>;
			phy-names = "combophy";
			status = "disabled";
			pinctrl-0 = <0xe7>;
			pinctrl-1 = <0xe8>;
			pinctrl-names = "active\0sleep";
			phandle = <0x22c>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					reg = <0x00>;
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					phandle = <0x22d>;

					endpoint@1 {
						reg = <0x00>;
						remote-endpoint = <0xe9>;
						phandle = <0xdf>;
					};

					endpoint@0 {
						reg = <0x01>;
						remote-endpoint = <0xea>;
						phandle = <0xda>;
					};
				};

				port@1 {
					phandle = <0x22e>;

					endpoint {
						remote-endpoint = <0xeb>;
						phandle = <0xec>;
					};
				};
			};

			panel@0 {
				compatible = "allwinner,virtual-panel";
				status = "okay";
				reg = <0x00>;
				phandle = <0x22f>;

				ports {

					port@0 {
						reg = <0x00>;
						phandle = <0x230>;

						endpoint@0 {
							reg = <0x00>;
							remote-endpoint = <0xec>;
							phandle = <0xeb>;
						};
					};

					port@1 {
						reg = <0x01>;
						phandle = <0x231>;

						endpoint@0 {
							reg = <0x00>;
							remote-endpoint = <0xed>;
							phandle = <0x148>;
						};
					};
				};
			};
		};

		rgb0@0001000 {
			compatible = "allwinner,rgb0";
			status = "disabled";
			phandle = <0x232>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x00>;
					phandle = <0x233>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xee>;
						phandle = <0xdc>;
					};
				};
			};
		};

		lvds0@0001000 {
			compatible = "allwinner,lvds0";
			clocks = <0xe4 0x03>;
			clock-names = "lvds_pclk";
			resets = <0x12 0x63>;
			reset-names = "rst_bus_lvds";
			phys = <0xe4 0xe6>;
			phy-names = "combophy0\0combophy1";
			status = "disabled";
			dual-channel = <0x00>;
			pinctrl-0 = <0xef>;
			pinctrl-1 = <0xf0>;
			pinctrl-names = "active\0sleep";
			phandle = <0x234>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x00>;
					phandle = <0x235>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xf1>;
						phandle = <0xdb>;
					};
				};

				port@1 {
					reg = <0x01>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xf2>;
						phandle = <0x144>;
					};
				};
			};
		};

		rgb1@0001000 {
			compatible = "allwinner,rgb1";
			reg = <0x00>;
			status = "disabled";
			phandle = <0x236>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x00>;
					phandle = <0x237>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xf3>;
						phandle = <0xe3>;
					};
				};
			};
		};

		lvds1@0001000 {
			compatible = "allwinner,lvds1";
			resets = <0x12 0x64>;
			reset-names = "rst_bus_lvds";
			status = "disabled";
			dual-channel = <0x00>;
			pinctrl-0 = <0xf4>;
			pinctrl-1 = <0xf5>;
			pinctrl-names = "active\0sleep";
			phandle = <0x238>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x00>;
					phandle = <0x239>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xf6>;
						phandle = <0xe2>;
					};
				};

				port@1 {
					reg = <0x01>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xf7>;
						phandle = <0x146>;
					};
				};
			};
		};

		tcon3@5730000 {
			compatible = "allwinner,tcon-tv";
			reg = <0x00 0x5730000 0x00 0x1000>;
			interrupts = <0x00 0x39 0x04>;
			clocks = <0x12 0xf7>;
			clock-names = "clk_bus_tcon";
			resets = <0x12 0x67>;
			reset-names = "rst_bus_tcon";
			top = <0xf8>;
			status = "okay";
			phandle = <0x23a>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x00>;
					phandle = <0x23b>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xf9>;
						phandle = <0xcf>;
					};

					endpoint@1 {
						reg = <0x01>;
						remote-endpoint = <0xfa>;
						phandle = <0xd4>;
					};
				};

				port@1 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x01>;
					phandle = <0x23c>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xfb>;
						phandle = <0x104>;
					};
				};
			};
		};

		tcon4@5731000 {
			compatible = "allwinner,tcon-tv";
			reg = <0x00 0x5731000 0x00 0x1000>;
			interrupts = <0x00 0x3a 0x04>;
			clocks = <0x12 0xf9 0x12 0xf8>;
			clock-names = "clk_tcon\0clk_bus_tcon";
			resets = <0x12 0x68>;
			reset-names = "rst_bus_tcon";
			top = <0xf8>;
			status = "okay";
			phandle = <0x23d>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					reg = <0x00>;
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					phandle = <0x23e>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xfc>;
						phandle = <0xd0>;
					};

					endpoint@1 {
						reg = <0x01>;
						remote-endpoint = <0xfd>;
						phandle = <0xd5>;
					};
				};

				port@1 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x01>;
					phandle = <0x23f>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0xfe>;
						phandle = <0x102>;
					};
				};
			};
		};

		edp0@5720000 {
			#sound-dai-cells = <0x00>;
			compatible = "allwinner,drm-dp";
			reg = <0x00 0x5740000 0x00 0x1000 0x00 0x5760000 0x00 0x20>;
			interrupts = <0x00 0x3e 0x04>;
			power-domains = <0x13 0x0a>;
			clocks = <0x12 0xf9 0x12 0xfa>;
			clock-names = "clk_edp\0clk_bus_edp";
			resets = <0x12 0x69>;
			reset-names = "rst_bus_edp";
			assigned-clocks = <0x12 0xf9>;
			assigned-clock-parents = <0x12 0x1c>;
			phys = <0xff 0x100>;
			phy-names = "dp-phy\0aux-phy";
			sys = <0xf8>;
			pclk_limit = <0x30d40>;
			status = "okay";
			edp_colordepth = <0x08>;
			edp_color_fmt = <0x00>;
			fps_limit_60 = <0x01>;
			vcc-edp-supply = <0x4a>;
			vdd-edp-supply = <0x65>;
			extcon = <0x101>;
			blacklist_modes = "4096x2160@60\04096x2160@59\04096x2160@50\04096x2160@49\04096x2160@30\04096x2160@29\03840x2160@60\03840x2160@59\03840x2160@50\03840x2160@49";
			phandle = <0x240>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x00>;
					phandle = <0x241>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0x102>;
						phandle = <0xfe>;
					};
				};

				port@1 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x01>;
					phandle = <0x242>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0x103>;
						phandle = <0x141>;
					};
				};
			};
		};

		hdmi0@5520000 {
			compatible = "allwinner,sunxi-hdmi";
			reg = <0x00 0x5520000 0x00 0x100000>;
			interrupts = <0x00 0x3d 0x04>;
			clocks = <0x12 0xfb 0x12 0xfd 0x12 0xfe 0x12 0xff 0x2b 0x0c>;
			clock-names = "clk_cec\0clk_hdmi\0clk_hdmi_24M\0clk_hdcp\0clk_dcxo";
			resets = <0x12 0x6b 0x12 0x6c 0x12 0x6a>;
			reset-names = "rst_bus_sub\0rst_bus_main\0rst_bus_hdcp";
			assigned-clocks = <0x12 0xfd>;
			assigned-clock-rates = <0x00 0x00>;
			power-domains = <0x13 0x0a>;
			status = "okay";
			dcdc2-supply = <0x65>;
			dldo2-supply = <0x4a>;
			hdmi_power0 = "dcdc2";
			hdmi_power1 = "dldo2";
			hdmi_power_cnt = <0x02>;
			hdmi_hdcp1x_enable = <0x01>;
			hdmi_hdcp2x_enable = <0x01>;
			hdmi_cec_enable = <0x00>;
			hdmi_clock_source = <0x00>;
			hdmi_resistor_select = <0x01>;
			hdmi_ddc_index = <0x14>;
			snps_phy = <0x61a8 0x2d519 0x07 0x8160 0x8188 0x2d519 0x2d519 0x07 0x8160 0x8198 0x2d519 0x53020 0x04 0x8040 0x8e85 0x53020 0x927c0 0x00 0x80c0 0x82f6>;
			phandle = <0x118>;

			ports {
				#address-cells = <0x01>;
				#size-cells = <0x00>;

				port@0 {
					#address-cells = <0x01>;
					#size-cells = <0x00>;
					reg = <0x00>;
					phandle = <0x243>;

					endpoint@0 {
						reg = <0x00>;
						remote-endpoint = <0x104>;
						phandle = <0xfb>;
					};
				};
			};
		};

		ufs@04520000 {
			compatible = "allwinner,sunxi-ufs-v0";
			device_type = "ufs";
			reg = <0x00 0x4520000 0x00 0x1000>;
			interrupts = <0x00 0xa5 0x01>;
			clocks = <0x2e 0x12 0x09 0x12 0x08 0x12 0x97 0x12 0x99 0x12 0x98 0x12 0x40 0x12 0x4d 0x12 0x3a 0x2b 0x08>;
			clock-names = "osc24m\0pll_periph\0pll_periph_2\0axi_clk_gate\0ahb_gate\0cfg_clk_gate\0store_ahb\0store_mbus\0msi_lite\0dcxo_wakeup";
			resets = <0x12 0x78 0x12 0x77 0x12 0x27 0x12 0x28>;
			reset-names = "controller_rst\0phy_rst\0axi_rst\0ahb_rst";
			status = "disabled";
			phandle = <0x244>;
		};

		sdmmc@4022000 {
			compatible = "allwinner,sunxi-mmc-v4p6x";
			device_type = "sdc2";
			reg = <0x00 0x4022000 0x00 0x1000>;
			interrupts = <0x00 0xa3 0x04>;
			clocks = <0x2e 0x12 0x0e 0x12 0x10 0x12 0x93 0x12 0x94 0x12 0x40 0x12 0x4d 0x12 0x3a>;
			clock-names = "osc24m\0pll_periph\0pll_periph_2\0mmc\0ahb\0mmc_store\0mmc_mbus\0mmc_msi_lite";
			resets = <0x12 0x25>;
			reset-names = "rst";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0x105 0x106 0x107>;
			pinctrl-1 = <0x108>;
			bus-width = <0x08>;
			req-page-count = <0x02>;
			cap-mmc-highspeed;
			cap-cmd23;
			mmc-cache-ctrl;
			non-removable;
			max-frequency = <0xbebc200>;
			cap-erase;
			mmc-high-capacity-erase-size;
			no-sdio;
			no-sd;
			ctl-spec-caps = <0x328>;
			sdc_tm4_sm0_freq0 = <0x00>;
			sdc_tm4_sm0_freq1 = <0x00>;
			sdc_tm4_sm1_freq0 = <0x00>;
			sdc_tm4_sm1_freq1 = <0x00>;
			sdc_tm4_sm2_freq0 = <0x00>;
			sdc_tm4_sm2_freq1 = <0x00>;
			sdc_tm4_sm3_freq0 = <0x5000000>;
			sdc_tm4_sm3_freq1 = <0x05>;
			sdc_tm4_sm4_freq0 = <0x50000>;
			sdc_tm4_sm4_freq1 = <0x04>;
			sdc_tm4_sm4_freq0_cmd = <0x00>;
			sdc_tm4_sm4_freq1_cmd = <0x00>;
			status = "disabled";
			mmc-ddr-1_8v;
			mmc-hs200-1_8v;
			mmc-hs400-1_8v;
			sunxi-dis-signal-vol-sw;
			mmc-bootpart-noacc;
			cqe-on;
			ctl-cmdq-md = <0x02>;
			vmmc-supply = <0x64>;
			vqmmc-supply = <0x6d>;
			phandle = <0x245>;
		};

		sdmmc@4023000 {
			compatible = "allwinner,sunxi-mmc-v5p6x";
			device_type = "sdc3";
			reg = <0x00 0x4023000 0x00 0x1000>;
			interrupts = <0x00 0xa4 0x04>;
			clocks = <0x2e 0x12 0x0e 0x12 0x10 0x12 0x95 0x12 0x96 0x12 0x4d 0x12 0x3a>;
			clock-names = "osc24m\0pll_periph\0pll_periph_2\0mmc\0ahb\0mmc_mbus\0mmc_msi_lite";
			resets = <0x12 0x26>;
			reset-names = "rst";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0x109 0x10a 0x10b>;
			pinctrl-1 = <0x10c>;
			bus-width = <0x08>;
			req-page-count = <0x02>;
			cap-mmc-highspeed;
			cap-cmd23;
			mmc-cache-ctrl;
			non-removable;
			max-frequency = <0xbebc200>;
			cap-erase;
			mmc-high-capacity-erase-size;
			no-sdio;
			no-sd;
			ctl-spec-caps = <0x328>;
			sdc_tm4_sm0_freq0 = <0x00>;
			sdc_tm4_sm0_freq1 = <0x00>;
			sdc_tm4_sm1_freq0 = <0x00>;
			sdc_tm4_sm1_freq1 = <0x00>;
			sdc_tm4_sm2_freq0 = <0x00>;
			sdc_tm4_sm2_freq1 = <0x00>;
			sdc_tm4_sm3_freq0 = <0x5000000>;
			sdc_tm4_sm3_freq1 = <0x05>;
			sdc_tm4_sm4_freq0 = <0x50000>;
			sdc_tm4_sm4_freq1 = <0x04>;
			sdc_tm4_sm4_freq0_cmd = <0x00>;
			sdc_tm4_sm4_freq1_cmd = <0x00>;
			status = "disabled";
			mmc-ddr-1_8v;
			mmc-hs200-1_8v;
			mmc-hs400-1_8v;
			sunxi-dis-signal-vol-sw;
			mmc-bootpart-noacc;
			cqe-on;
			ctl-cmdq-md = <0x02>;
			vmmc-supply = <0x64>;
			vqmmc-supply = <0x6d>;
			phandle = <0x246>;
		};

		sdmmc@4020000 {
			compatible = "allwinner,sunxi-mmc-v5p3x";
			device_type = "sdc0";
			reg = <0x00 0x4020000 0x00 0x1000>;
			interrupts = <0x00 0xa1 0x04>;
			clocks = <0x2e 0x12 0x11 0x12 0x12 0x12 0x8f 0x12 0x90 0x12 0x40 0x12 0x4d 0x12 0x3a>;
			clock-names = "osc24m\0pll_periph\0pll_periph_2\0mmc\0ahb\0mmc_store\0mmc_mbus\0mmc_msi_lite";
			resets = <0x12 0x23>;
			reset-names = "rst";
			pinctrl-names = "default\0mmc_1v8\0sleep\0uart_jtag";
			pinctrl-0 = <0x10d 0x10e>;
			pinctrl-1 = <0x10f 0x110>;
			pinctrl-2 = <0x111>;
			pinctrl-3 = <0x112 0x113>;
			max-frequency = <0x8f0d180>;
			bus-width = <0x04>;
			req-page-count = <0x02>;
			cap-sd-highspeed;
			cap-wait-while-busy;
			ctl-spec-caps = <0x428>;
			status = "okay";
			cd-gpios = <0x33 0x05 0x06 0x11>;
			cd-used-24M;
			cd-set-debounce = <0x01>;
			sd-uhs-sdr50;
			sd-uhs-ddr50;
			sd-uhs-sdr104;
			no-sdio;
			no-mmc;
			sunxi-power-save-mode;
			vmmc-supply = <0x64>;
			vqmmc33sw-supply = <0x64>;
			vdmmc33sw-supply = <0x64>;
			vqmmc18sw-supply = <0x6d>;
			vdmmc18sw-supply = <0x6d>;
			phandle = <0x247>;
		};

		sdmmc@4021000 {
			compatible = "allwinner,sunxi-mmc-v5p3x";
			device_type = "sdc1";
			reg = <0x00 0x4021000 0x00 0x1000>;
			interrupts = <0x00 0xa2 0x04>;
			clocks = <0x2e 0x12 0x11 0x12 0x12 0x12 0x91 0x12 0x92 0x12 0x40 0x12 0x4d 0x12 0x3a>;
			clock-names = "osc24m\0pll_periph\0pll_periph_2\0mmc\0ahb\0mmc_store\0mmc_mbus\0mmc_msi_lite";
			resets = <0x12 0x24>;
			reset-names = "rst";
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0x114 0x115>;
			pinctrl-1 = <0x116>;
			max-frequency = <0xc65d400>;
			bus-width = <0x04>;
			cap-sd-highspeed;
			cap-sdio-irq;
			ignore-pm-notify;
			keep-power-in-suspend;
			sunxi-dly-208M = <0x00 0x00 0x00 0x00 0x00 0x00>;
			execute_tuning_in_kernel;
			ctl-spec-caps = <0x428>;
			status = "disabled";
			no-mmc;
			no-sd;
			sd-uhs-sdr25;
			sd-uhs-sdr50;
			sd-uhs-ddr50;
			sd-uhs-sdr104;
			sunxi-dis-signal-vol-sw;
			phandle = <0x248>;
		};

		gpu@1800000 {
			device_type = "gpu";
			compatible = "img,gpu";
			reg = <0x00 0x1800000 0x00 0x8ffff>;
			interrupts = <0x00 0x3f 0x04 0x00 0x40 0x04>;
			interrupt-names = "IRQGPU\0IRQGPUDVFS";
			clocks = <0x12 0x17 0x12 0x88 0x12 0x89 0x12 0x04 0x12 0x06 0x12 0x07 0x12 0x08 0x12 0x09>;
			clock-names = "clk_parent\0clk\0clk_bus\0clk_800\0clk_600\0clk_400\0clk_300\0clk_200";
			resets = <0x12 0x20>;
			reset-names = "reset_bus";
			operating-points-v2 = <0x117>;
			#cooling-cells = <0x02>;
			gpu-supply = <0x2a>;
			phandle = <0x21>;
		};

		gpu-opp-table {
			compatible = "allwinner, img-operating-points";
			phandle = <0x117>;

			opp@400000000 {
				opp-hz = <0x00 0x17d78400>;
				opp-microvolt = "\0\f5";
				opp-microvolt-vfdefault = "\0\f5";
				opp-microvolt-vf0000 = "\0\f5";
				opp-microvolt-vf0100 = "\0\f5";
				opp-microvolt-vf0101 = "\0\f5";
				opp-microvolt-vf0200 = "\0\f5";
				opp-microvolt-vf0201 = "\0\f5";
				opp-microvolt-vf0202 = "\0\f5";
				opp-microvolt-vf0302 = "\0\f5";
				opp-microvolt-vf0402 = "\0\f5";
				opp-microvolt-vf0502 = "\0\f5";
				opp-microvolt-vf0602 = "\0\f5";
				opp-microvolt-vf0300 = "\0\f5";
			};

			opp@600000000 {
				opp-hz = <0x00 0x23c34600>;
				opp-microvolt = "\0\f5";
				opp-microvolt-vfdefault = "\0\f5";
				opp-microvolt-vf0000 = "\0\f5";
				opp-microvolt-vf0100 = "\0\f5";
				opp-microvolt-vf0101 = "\0\f5";
				opp-microvolt-vf0200 = "\0\f5";
				opp-microvolt-vf0201 = "\0\f5";
				opp-microvolt-vf0202 = "\0\f5";
				opp-microvolt-vf0302 = "\0\f5";
				opp-microvolt-vf0402 = "\0\f5";
				opp-microvolt-vf0502 = "\0\f5";
				opp-microvolt-vf0602 = "\0\f5";
				opp-microvolt-vf0300 = "\0\f5";
			};

			opp@800000000 {
				opp-hz = <0x00 0x2faf0800>;
				opp-microvolt = <0xcd140>;
				opp-microvolt-vfdefault = <0xcd140>;
				opp-microvolt-vf0000 = <0xcd140>;
				opp-microvolt-vf0100 = <0xc8320>;
				opp-microvolt-vf0101 = "\0\f5";
				opp-microvolt-vf0200 = "\0\f5";
				opp-microvolt-vf0201 = "\0\f5";
				opp-microvolt-vf0202 = "\0\f5";
				opp-microvolt-vf0302 = "\0\f5";
				opp-microvolt-vf0402 = "\0\f5";
				opp-microvolt-vf0502 = "\0\f5";
				opp-microvolt-vf0602 = "\0\f5";
				opp-microvolt-vf0300 = "\0\f5";
			};

			opp@1008000000 {
				opp-hz = <0x00 0x3c14dc00>;
				opp-microvolt = <0xea600>;
				opp-microvolt-vfdefault = <0xea600>;
				opp-microvolt-vf0000 = <0xea600>;
				opp-microvolt-vf0100 = <0xe57e0>;
				opp-microvolt-vf0101 = <0xe09c0>;
				opp-microvolt-vf0200 = <0xdbba0>;
				opp-microvolt-vf0201 = <0xd6d80>;
				opp-microvolt-vf0202 = <0xe09c0>;
				opp-microvolt-vf0302 = <0xe09c0>;
				opp-microvolt-vf0402 = <0xdbba0>;
				opp-microvolt-vf0502 = <0xd6d80>;
				opp-microvolt-vf0602 = <0xd1f60>;
				opp-microvolt-vf0300 = <0xd1f60>;
			};
		};

		hdmi_codec {
			#sound-dai-cells = <0x00>;
			compatible = "allwinner,sunxi-snd-codec-hdmi";
			status = "okay";
			extcon = <0x118>;
			phandle = <0x12e>;
		};

		i2s0_plat@2532000 {
			#sound-dai-cells = <0x00>;
			compatible = "allwinner,sunxi-snd-plat-i2s";
			reg = <0x00 0x2532000 0x00 0xa0>;
			resets = <0x12 0x4a>;
			clocks = <0x12 0x23 0x12 0x25 0x12 0x26 0x12 0x09 0x12 0xc7 0x12 0xc6>;
			clock-names = "clk_pll_audio0_4x\0clk_pll_audio1_div2\0clk_pll_audio1_div5\0clk_i2s_asrc\0clk_bus_i2s\0clk_i2s";
			dmas = <0x36 0x03 0x36 0x03>;
			dma-names = "tx\0rx";
			playback-cma = <0x80>;
			capture-cma = <0x80>;
			tx-fifo-size = <0x80>;
			rx-fifo-size = <0x80>;
			status = "disabled";
			tdm-num = <0x00>;
			tx-pin = <0x00>;
			rx-pin = <0x00>;
			pinctrl-used;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0x119 0x11a 0x11b 0x11c 0x11d>;
			pinctrl-1 = <0x11e>;
			tx-hub-en;
			rx-sync-en;
			phandle = <0x120>;
		};

		i2s0_mach {
			compatible = "allwinner,sunxi-snd-mach";
			soundcard-mach,name = "sndi2s0";
			soundcard-mach,format = "i2s";
			soundcard-mach,slot-num = <0x02>;
			soundcard-mach,slot-width = <0x20>;
			status = "disabled";
			soundcard-mach,frame-master = <0x11f>;
			soundcard-mach,bitclock-master = <0x11f>;
			soundcard-mach,jack-support = <0x04>;
			phandle = <0x249>;

			soundcard-mach,cpu {
				sound-dai = <0x120>;
				soundcard-mach,pll-fs = <0x01>;
				soundcard-mach,mclk-fs = <0x02>;
				soundcard-mach,mclk-fp = <0xac4400 0xbb8000>;
				phandle = <0x11f>;
			};

			soundcard-mach,codec {
				sound-dai = <0x121>;
				soundcard-mach,pll-fs = <0x01>;
				phandle = <0x24a>;
			};
		};

		i2s1_plat@2533000 {
			#sound-dai-cells = <0x00>;
			compatible = "allwinner,sunxi-snd-plat-i2s";
			reg = <0x00 0x2533000 0x00 0xa0>;
			resets = <0x12 0x4b>;
			clocks = <0x12 0x23 0x12 0x25 0x12 0x26 0x12 0x09 0x12 0xc9 0x12 0xc8>;
			clock-names = "clk_pll_audio0_4x\0clk_pll_audio1_div2\0clk_pll_audio1_div5\0clk_i2s_asrc\0clk_bus_i2s\0clk_i2s";
			dmas = <0x36 0x04 0x36 0x04>;
			dma-names = "tx\0rx";
			playback-cma = <0x80>;
			capture-cma = <0x80>;
			tx-fifo-size = <0x80>;
			rx-fifo-size = <0x80>;
			status = "okay";
			tdm-num = <0x00>;
			tx-pin = <0x00>;
			rx-pin = <0x00>;
			pinctrl-used;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0x122 0x123 0x124 0x125 0x126>;
			pinctrl-1 = <0x127>;
			tx-hub-en;
			rx-sync-en;
			phandle = <0x129>;
		};

		i2s1_mach {
			compatible = "allwinner,sunxi-snd-mach";
			soundcard-mach,name = "sndi2s1";
			soundcard-mach,format = "i2s";
			soundcard-mach,slot-num = <0x02>;
			soundcard-mach,slot-width = <0x20>;
			status = "okay";
			soundcard-mach,frame-master = <0x128>;
			soundcard-mach,bitclock-master = <0x128>;
			phandle = <0x24b>;

			soundcard-mach,cpu {
				sound-dai = <0x129>;
				soundcard-mach,pll-fs = <0x01>;
				soundcard-mach,mclk-fs = <0x01>;
				soundcard-mach,mclk-fp = <0xac4400 0xbb8000>;
				phandle = <0x128>;
			};

			soundcard-mach,codec {
				soundcard-mach,pll-fs = <0x01>;
				sound-dai = <0x12a>;
				phandle = <0x24c>;
			};
		};

		i2s2_plat@2534000 {
			#sound-dai-cells = <0x00>;
			compatible = "allwinner,sunxi-snd-plat-i2s";
			reg = <0x00 0x2534000 0x00 0xa0>;
			resets = <0x12 0x4c>;
			clocks = <0x12 0x23 0x12 0x25 0x12 0x26 0x12 0x09 0x12 0xcc 0x12 0xca>;
			clock-names = "clk_pll_audio0_4x\0clk_pll_audio1_div2\0clk_pll_audio1_div5\0clk_i2s_asrc\0clk_bus_i2s\0clk_i2s";
			dmas = <0x36 0x05 0x36 0x05>;
			dma-names = "tx\0rx";
			playback-cma = <0x80>;
			capture-cma = <0x80>;
			tx-fifo-size = <0x80>;
			rx-fifo-size = <0x80>;
			status = "disabled";
			phandle = <0x12b>;
		};

		i2s2_mach {
			compatible = "allwinner,sunxi-snd-mach";
			soundcard-mach,name = "sndi2s2";
			soundcard-mach,format = "i2s";
			soundcard-mach,slot-num = <0x02>;
			soundcard-mach,slot-width = <0x20>;
			status = "disabled";
			phandle = <0x24d>;

			soundcard-mach,cpu {
				sound-dai = <0x12b>;
			};

			soundcard-mach,codec {
			};
		};

		i2s3_plat@2535000 {
			#sound-dai-cells = <0x00>;
			compatible = "allwinner,sunxi-snd-plat-i2s";
			reg = <0x00 0x2535000 0x00 0xa0>;
			resets = <0x12 0x4d>;
			clocks = <0x12 0x23 0x12 0x25 0x12 0x26 0x12 0x09 0x12 0xce 0x12 0xcd>;
			clock-names = "clk_pll_audio0_4x\0clk_pll_audio1_div2\0clk_pll_audio1_div5\0clk_i2s_asrc\0clk_bus_i2s\0clk_i2s";
			dmas = <0x36 0x06 0x36 0x06>;
			dma-names = "tx\0rx";
			playback-cma = <0x80>;
			capture-cma = <0x80>;
			tx-fifo-size = <0x80>;
			rx-fifo-size = <0x80>;
			status = "okay";
			tdm-num = <0x03>;
			tx-pin = <0x00 0x01 0x02 0x03>;
			tx-pin0-map0 = <0x76543210>;
			tx-pin0-map1 = <0xfedcba98>;
			tx-pin1-map0 = <0x76543210>;
			tx-pin1-map1 = <0xfedcba98>;
			tx-pin2-map0 = <0x76543210>;
			tx-pin2-map1 = <0xfedcba98>;
			tx-pin3-map0 = <0x76543210>;
			tx-pin3-map1 = <0xfedcba98>;
			rx-pin = <0x00>;
			tx-hub-en;
			rx-sync-en;
			dai-type = "hdmi";
			phandle = <0x12d>;
		};

		i2s3_mach {
			compatible = "allwinner,sunxi-snd-mach";
			soundcard-mach,name = "sndhdmi";
			soundcard-mach,format = "i2s";
			soundcard-mach,slot-num = <0x02>;
			soundcard-mach,slot-width = <0x20>;
			status = "okay";
			soundcard-mach,frame-master = <0x12c>;
			soundcard-mach,bitclock-master = <0x12c>;
			phandle = <0x24e>;

			soundcard-mach,cpu {
				sound-dai = <0x12d>;
				soundcard-mach,pll-fs = <0x01>;
				soundcard-mach,mclk-fs = <0x00>;
				phandle = <0x12c>;
			};

			soundcard-mach,codec {
				sound-dai = <0x12e>;
				phandle = <0x24f>;
			};
		};

		i2s4_plat@2536000 {
			#sound-dai-cells = <0x00>;
			compatible = "allwinner,sunxi-snd-plat-i2s";
			reg = <0x00 0x2536000 0x00 0xa0>;
			resets = <0x12 0x4e>;
			clocks = <0x12 0x23 0x12 0x25 0x12 0x26 0x12 0x09 0x12 0xd0 0x12 0xcf>;
			clock-names = "clk_pll_audio0_4x\0clk_pll_audio1_div2\0clk_pll_audio1_div5\0clk_i2s_asrc\0clk_bus_i2s\0clk_i2s";
			dmas = <0x36 0x07 0x36 0x07>;
			dma-names = "tx\0rx";
			playback-cma = <0x80>;
			capture-cma = <0x80>;
			tx-fifo-size = <0x80>;
			rx-fifo-size = <0x80>;
			status = "disabled";
			tdm-num = <0x04>;
			tx-pin = <0x00>;
			rx-pin = <0x00>;
			tx-hub-en;
			rx-sync-en;
			pinctrl-used;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0x12f 0x130 0x131 0x132>;
			pinctrl-1 = <0x133>;
			phandle = <0x135>;
		};

		i2s4_mach {
			compatible = "allwinner,sunxi-snd-mach";
			soundcard-mach,name = "sndi2s4";
			soundcard-mach,format = "i2s";
			soundcard-mach,slot-num = <0x02>;
			soundcard-mach,slot-width = <0x20>;
			status = "okay";
			soundcard-mach,frame-master = <0x134>;
			soundcard-mach,bitclock-master = <0x134>;
			soundcard-mach,capture-only;
			phandle = <0x250>;

			soundcard-mach,cpu {
				sound-dai = <0x135>;
				soundcard-mach,pll-fs = <0x01>;
				soundcard-mach,mclk-fp;
				soundcard-mach,mclk-fs = <0x01>;
				phandle = <0x134>;
			};

			soundcard-mach,codec {
				sound-dai = <0x136>;
				soundcard-mach,pll-fs = <0x01>;
				phandle = <0x251>;
			};
		};

		owa_plat@2537000 {
			#sound-dai-cells = <0x00>;
			compatible = "allwinner,sunxi-snd-plat-owa";
			reg = <0x00 0x2537000 0x00 0x58>;
			interrupts = <0x00 0x2e 0x04>;
			resets = <0x12 0x4f>;
			clocks = <0x12 0x23 0x12 0x25 0x12 0x26 0x12 0xd3 0x12 0xd1 0x12 0xd2>;
			clock-names = "clk_pll_audio0_4x\0clk_pll_audio1_div2\0clk_pll_audio1_div5\0clk_bus_owa\0clk_owa_tx\0clk_owa_rx";
			dmas = <0x36 0x02 0x36 0x02>;
			dma-names = "tx\0rx";
			playback-cma = <0x80>;
			capture-cma = <0x80>;
			tx-fifo-size = <0x80>;
			rx-fifo-size = <0x80>;
			status = "okay";
			pinctrl-used;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0x137>;
			pinctrl-1 = <0x138>;
			tx-hub-en;
			phandle = <0x139>;
		};

		owa_mach {
			compatible = "allwinner,sunxi-snd-mach";
			soundcard-mach,name = "sndowa";
			status = "okay";
			phandle = <0x252>;

			soundcard-mach,cpu {
				sound-dai = <0x139>;
			};

			soundcard-mach,codec {
			};
		};

		dmic_plat@2531000 {
			#sound-dai-cells = <0x00>;
			compatible = "allwinner,sunxi-snd-plat-dmic";
			reg = <0x00 0x2531000 0x00 0x50>;
			resets = <0x12 0x50>;
			clocks = <0x12 0x23 0x12 0x25 0x12 0x26 0x12 0xd5 0x12 0xd4>;
			clock-names = "clk_pll_audio0_4x\0clk_pll_audio1_div2\0clk_pll_audio1_div5\0clk_bus_dmic\0clk_dmic";
			dmas = <0x36 0x09>;
			dma-names = "rx";
			capture-cma = <0x80>;
			rx-fifo-size = <0x80>;
			status = "disabled";
			rx-chmap = <0x76543210>;
			data-vol = <0xb0>;
			rxdelaytime = <0x00>;
			pinctrl-used;
			pinctrl-names = "default\0sleep";
			pinctrl-0 = <0x13a>;
			pinctrl-1 = <0x13b>;
			rx-sync-en;
			phandle = <0x13c>;
		};

		dmic_mach {
			compatible = "allwinner,sunxi-snd-mach";
			soundcard-mach,name = "snddmic";
			soundcard-mach,capture-only;
			status = "disabled";
			phandle = <0x253>;

			soundcard-mach,cpu {
				sound-dai = <0x13c>;
			};

			soundcard-mach,codec {
			};
		};

		pcie@6000000 {
			#address-cells = <0x03>;
			#size-cells = <0x02>;
			compatible = "allwinner,sunxi-pcie-v300-rc";
			bus-range = <0x00 0xff>;
			reg = <0x00 0x6000000 0x00 0x480000>;
			reg-names = "dbi";
			device_type = "pci";
			ranges = <0x800 0x00 0x20000000 0x00 0x20000000 0x00 0x1000000 0x81000000 0x00 0x21000000 0x00 0x21000000 0x00 0x1000000 0x82000000 0x00 0x22000000 0x00 0x22000000 0x00 0x6000000>;
			num-lanes = <0x01>;
			phys = <0x13d>;
			phy-names = "pcie-phy";
			interrupts = <0x00 0x98 0x04 0x00 0x99 0x04 0x00 0x88 0x04 0x00 0x89 0x04 0x00 0x8a 0x04 0x00 0x8b 0x04 0x00 0x8c 0x04 0x00 0x8d 0x04 0x00 0x8e 0x04 0x00 0x8f 0x04>;
			interrupt-names = "sii\0msi\0edma-w0\0edma-w1\0edma-w2\0edma-w3\0edma-r0\0edma-r1\0edma-r2\0edma-r3";
			#interrupt-cells = <0x01>;
			num-edma = <0x04>;
			max-link-speed = <0x03>;
			num-ib-windows = <0x10>;
			num-ob-windows = <0x10>;
			linux,pci-domain = <0x00>;
			power-domains = <0x13 0x07>;
			clocks = <0x12 0xe3 0x12 0xe4 0x12 0x32>;
			clock-names = "pclk_aux\0pclk_slv\0its";
			resets = <0x12 0x59 0x12 0x5a 0x12 0x00>;
			reset-names = "pclk_rst\0pwrup_rst\0its";
			busno = <0x00>;
			status = "okay";
			reset-gpios = <0x33 0x03 0x04 0x00>;
			wake-gpios = <0x33 0x03 0x03 0x00>;
			pcie1v8-supply = <0x4a>;
			pcie3v3-supply = <0x09>;
			phandle = <0x254>;
		};

		auto_print@54321 {
			reg = <0x00 0x54321 0x00 0x00>;
			device_type = "auto_print";
			status = "okay";
		};

		gpio_leds {
			compatible = "allwinner,sunxi-gpio-leds";
			supply-num = <0x01>;
			gpio1-supply = <0x47>;
			gpio-pins = <0x33 0x08 0x06 0x00 0x33 0x08 0x07 0x00 0x33 0x08 0x08 0x00 0x33 0x08 0x09 0x00>;
			pin-names = "led_green\0normal_led\0led_yellow\0standby_led";
			init-status = <0x00 0x00 0x00 0x01>;
			status = "disabled";
		};

		leds {
			compatible = "pwm-leds";
			status = "disabled";

			yellow-pwm-led {
				label = "yellow_pwm_led";
				pwms = <0x13e 0x09 0xf4240 0x00>;
				max-brightness = <0xff>;
				phandle = <0x255>;
			};
		};
	};

	vcc3v3-pcie-regulator {
		compatible = "regulator-fixed";
		regulator-name = "vcc3v3_pcie";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		regulator-enable-ramp-delay = <0x3e8>;
		gpio = <0x33 0x07 0x0b 0x00>;
		enable-active-high;
		regulator-always-on;
		regulator-boot-on;
		phandle = <0x256>;
	};

	usb0-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb0-vbus";
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		regulator-enable-ramp-delay = <0x3e8>;
		gpio = <0x33 0x02 0x04 0x00>;
		enable-active-high;
		phandle = <0x5b>;
	};

	usb1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb1-vbus";
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		regulator-enable-ramp-delay = <0x3e8>;
		regulator-always-on;
		regulator-boot-on;
		phandle = <0xaa>;
	};

	arisc_config {
		phandle = <0x257>;

		s_uart_config {
			pins = "PL2\0PL3";
			function = <0x03 0x03>;
			status = "disabled";
		};
	};

	backlight1 {
		compatible = "pwm-backlight";
		status = "okay";
		brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3 0xa4 0xa5 0xa6 0xa7 0xa8 0xa9 0xaa 0xab 0xac 0xad 0xae 0xaf 0xb0 0xb1 0xb2 0xb3 0xb4 0xb5 0xb6 0xb7 0xb8 0xb9 0xba 0xbb 0xbc 0xbd 0xbe 0xbf 0xc0 0xc1 0xc2 0xc3 0xc4 0xc5 0xc6 0xc7 0xc8 0xc9 0xca 0xcb 0xcc 0xcd 0xce 0xcf 0xd0 0xd1 0xd2 0xd3 0xd4 0xd5 0xd6 0xd7 0xd8 0xd9 0xda 0xdb 0xdc 0xdd 0xde 0xdf 0xe0 0xe1 0xe2 0xe3 0xe4 0xe5 0xe6 0xe7 0xe8 0xe9 0xea 0xeb 0xec 0xed 0xee 0xef 0xf0 0xf1 0xf2 0xf3 0xf4 0xf5 0xf6 0xf7 0xf8 0xf9 0xfa 0xfb 0xfc 0xfd 0xfe 0xff>;
		default-brightness-level = <0xc8>;
		pwms = <0x13f 0x06 0x61a8 0x00>;
		phandle = <0x140>;
	};

	edp_panel {
		compatible = "edp-general-panel";
		status = "okay";
		power0-supply = <0x47>;
		power-delay-ms = <0x32>;
		backlight = <0x140>;
		phandle = <0x258>;

		ports {
			#address-cells = <0x01>;
			#size-cells = <0x00>;

			port@0 {
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				reg = <0x00>;
				phandle = <0x259>;

				endpoint@0 {
					reg = <0x00>;
					remote-endpoint = <0x141>;
					phandle = <0x103>;
				};
			};
		};
	};

	backlight0 {
		compatible = "pwm-backlight";
		status = "okay";
		brightness-levels = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x91 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3 0xa4 0xa5 0xa6 0xa7 0xa8 0xa9 0xaa 0xab 0xac 0xad 0xae 0xaf 0xb0 0xb1 0xb2 0xb3 0xb4 0xb5 0xb6 0xb7 0xb8 0xb9 0xba 0xbb 0xbc 0xbd 0xbe 0xbf 0xc0 0xc1 0xc2 0xc3 0xc4 0xc5 0xc6 0xc7 0xc8 0xc9 0xca 0xcb 0xcc 0xcd 0xce 0xcf 0xd0 0xd1 0xd2 0xd3 0xd4 0xd5 0xd6 0xd7 0xd8 0xd9 0xda 0xdb 0xdc 0xdd 0xde 0xdf 0xe0 0xe1 0xe2 0xe3 0xe4 0xe5 0xe6 0xe7 0xe8 0xe9 0xea 0xeb 0xec 0xed 0xee 0xef 0xf0 0xf1 0xf2 0xf3 0xf4 0xf5 0xf6 0xf7 0xf8 0xf9 0xfa 0xfb 0xfc 0xfd 0xfe 0xff>;
		default-brightness-level = <0x49>;
		pwms = <0x13f 0x09 0x61a8 0x00>;
		phandle = <0x142>;
	};

	lvds_panel@0 {
		compatible = "sunxi-lvds";
		status = "disabled";
		power-delay-ms = <0x0a>;
		power0-supply = <0x47>;
		power1-supply = <0x6d>;
		backlight = <0x142>;
		bus-format = <0x1011>;
		enable0-gpios = <0x33 0x04 0x0e 0x00>;
		phandle = <0x25a>;

		display-timings {
			native-mode = <0x143>;

			timing0 {
				clock-frequency = <0x4767330>;
				hback-porch = <0x46>;
				hactive = <0x500>;
				hfront-porch = <0x53>;
				hsync-len = <0x12>;
				vback-porch = <0x0d>;
				vactive = <0x320>;
				vfront-porch = <0x25>;
				vsync-len = <0x0a>;
				phandle = <0x143>;
			};

			timing1 {
				clock-frequency = <0x8f05d40>;
				hback-porch = <0x40>;
				hactive = <0x780>;
				hfront-porch = <0x40>;
				hsync-len = <0x10>;
				vback-porch = <0x04>;
				vactive = <0x4b0>;
				vfront-porch = <0x04>;
				vsync-len = <0x03>;
				phandle = <0x25b>;
			};
		};

		port {

			endpoint {
				remote-endpoint = <0x144>;
				phandle = <0xf2>;
			};
		};
	};

	lvds_panel1@0 {
		compatible = "sunxi-lvds";
		status = "disabled";
		power-delay-ms = <0x0a>;
		power0-supply = <0x47>;
		power1-supply = <0x6d>;
		backlight = <0x140>;
		bus-format = <0x1011>;
		enable0-gpios = <0x33 0x08 0x10 0x00>;
		enable1-gpios = <0x33 0x08 0x0f 0x00>;
		phandle = <0x25c>;

		display-timings {
			native-mode = <0x145>;

			timing0 {
				clock-frequency = <0x4767330>;
				hback-porch = <0x46>;
				hactive = <0x500>;
				hfront-porch = <0x53>;
				hsync-len = <0x12>;
				vback-porch = <0x0d>;
				vactive = <0x320>;
				vfront-porch = <0x25>;
				vsync-len = <0x0a>;
				phandle = <0x145>;
			};

			timing1 {
				clock-frequency = <0x8f05d40>;
				hback-porch = <0x40>;
				hactive = <0x780>;
				hfront-porch = <0x40>;
				hsync-len = <0x10>;
				vback-porch = <0x04>;
				vactive = <0x4b0>;
				vfront-porch = <0x04>;
				vsync-len = <0x03>;
				phandle = <0x25d>;
			};
		};

		port {

			endpoint {
				remote-endpoint = <0x146>;
				phandle = <0xf7>;
			};
		};
	};

	dsi_panel@1 {
		compatible = "allwinner,panel-dsi";
		status = "disabled";
		power-delay-ms = <0x0a>;
		power0-supply = <0x47>;
		power1-supply = <0x6d>;
		enable0-gpios = <0x33 0x04 0x0d 0x00>;
		reset-gpios = <0x33 0x04 0x0c 0x00>;
		backlight = <0x142>;
		dsi,flags = <0x01>;
		dsi,lanes = <0x04>;
		dsi,format = <0x00>;
		panel-init-sequence = [39 10 04 ff 98 81 03 39 10 02 01 00 39 10 02 02 00 39 10 02 03 53 39 10 02 04 d3 39 10 02 05 00 39 10 02 06 0d 39 10 02 07 08 39 10 02 08 00 39 10 02 09 00 39 10 02 0a 00 39 10 02 0b 00 39 10 02 0c 00 39 10 02 0d 00 39 10 02 0e 00 39 10 02 0f 28 39 10 02 10 28 39 10 02 11 00 39 10 02 12 00 39 10 02 13 00 39 10 02 14 00 39 10 02 15 00 39 10 02 16 00 39 10 02 17 00 39 10 02 18 00 39 10 02 19 00 39 10 02 1a 00 39 10 02 1b 00 39 10 02 1c 00 39 10 02 1d 00 39 10 02 1e 40 39 10 02 1f 80 39 10 02 20 06 39 10 02 21 01 39 10 02 22 00 39 10 02 23 00 39 10 02 24 00 39 10 02 25 00 39 10 02 26 00 39 10 02 27 00 39 10 02 28 33 39 10 02 29 33 39 10 02 2a 00 39 10 02 2b 00 39 10 02 2c 00 39 10 02 2d 00 39 10 02 2e 00 39 10 02 2f 00 39 10 02 30 00 39 10 02 31 00 39 10 02 32 00 39 10 02 33 00 39 10 02 34 03 39 10 02 35 00 39 10 02 36 00 39 10 02 37 00 39 10 02 38 96 39 10 02 39 00 39 10 02 3a 00 39 10 02 3b 00 39 10 02 3c 00 39 10 02 3d 00 39 10 02 3e 00 39 10 02 3f 00 39 10 02 40 00 39 10 02 41 00 39 10 02 42 00 39 10 02 43 00 39 10 02 44 00 39 10 02 50 00 39 10 02 51 23 39 10 02 52 45 39 10 02 53 67 39 10 02 54 89 39 10 02 55 ab 39 10 02 56 01 39 10 02 57 23 39 10 02 58 45 39 10 02 59 67 39 10 02 5a 89 39 10 02 5b ab 39 10 02 5c cd 39 10 02 5d ef 39 10 02 5e 00 39 10 02 5f 08 39 10 02 60 08 39 10 02 61 06 39 10 02 62 06 39 10 02 63 01 39 10 02 64 01 39 10 02 65 00 39 10 02 66 00 39 10 02 67 02 39 10 02 68 15 39 10 02 69 15 39 10 02 6a 14 39 10 02 6b 14 39 10 02 6c 0d 39 10 02 6d 0d 39 10 02 6e 0c 39 10 02 6f 0c 39 10 02 70 0f 39 10 02 71 0f 39 10 02 72 0e 39 10 02 73 0e 39 10 02 74 02 39 10 02 75 08 39 10 02 76 08 39 10 02 77 06 39 10 02 78 06 39 10 02 79 01 39 10 02 7a 01 39 10 02 7b 00 39 10 02 7c 00 39 10 02 7d 02 39 10 02 7e 15 39 10 02 7f 15 39 10 02 80 14 39 10 02 81 14 39 10 02 82 0d 39 10 02 83 0d 39 10 02 84 0c 39 10 02 85 0c 39 10 02 86 0f 39 10 02 87 0f 39 10 02 88 0e 39 10 02 89 0e 39 10 02 8a 02 39 10 04 ff 98 81 04 39 10 02 6e 2b 39 10 02 6f 37 39 10 02 3a a4 39 10 02 8d 1a 39 10 02 87 ba 39 10 02 b2 d1 39 10 02 88 0b 39 10 02 38 01 39 10 02 39 00 39 10 02 b5 07 39 10 02 31 75 39 10 02 3b 98 39 10 04 ff 98 81 01 39 10 02 43 33 39 10 02 22 0a 39 10 02 31 00 39 10 02 53 48 39 10 02 55 48 39 10 02 50 99 39 10 02 51 94 39 10 02 60 10 39 10 02 62 20 39 10 02 a0 00 39 10 02 a1 00 39 10 02 a2 15 39 10 02 a3 14 39 10 02 a4 1b 39 10 02 a5 2f 39 10 02 a6 25 39 10 02 a7 24 39 10 02 a8 80 39 10 02 a9 1f 39 10 02 aa 2c 39 10 02 ab 6c 39 10 02 ac 16 39 10 02 ad 14 39 10 02 ae 4d 39 10 02 af 20 39 10 02 b0 29 39 10 02 b1 4f 39 10 02 b2 5f 39 10 02 b3 23 39 10 02 c0 00 39 10 02 c1 2e 39 10 02 c2 3b 39 10 02 c3 15 39 10 02 c4 16 39 10 02 c5 28 39 10 02 c6 1a 39 10 02 c7 1c 39 10 02 c8 a7 39 10 02 c9 1b 39 10 02 ca 28 39 10 02 cb 92 39 10 02 cc 1f 39 10 02 cd 1c 39 10 02 ce 4b 39 10 02 cf 1f 39 10 02 d0 28 39 10 02 d1 4e 39 10 02 d2 5c 39 10 02 d3 23 39 10 04 ff 98 81 00 39 10 02 11 00 39 78 02 29 00 39 10 02 35 00];
		panel-exit-sequence = <0x5000128 0x5780110>;
		phandle = <0x25e>;

		display-timings {
			native-mode = <0x147>;

			timing0 {
				clock-frequency = <0x410e1a0>;
				hback-porch = <0x14>;
				hactive = <0x320>;
				hfront-porch = <0x14>;
				hsync-len = <0x14>;
				vback-porch = <0x08>;
				vactive = <0x500>;
				vfront-porch = <0x1e>;
				vsync-len = <0x04>;
				phandle = <0x147>;
			};
		};

		port {

			endpoint@0 {
				reg = <0x00>;
				remote-endpoint = <0x148>;
				phandle = <0xed>;
			};
		};
	};

	phy_switcher@10 {
		compatible = "allwinner,sunxi-phy-switcher";
		reg = <0x00 0x10 0x00 0x00>;
		phys = <0xff 0xac>;
		phy-names = "dp-phy\0usb-phy";
		dp_configure_delay = <0x32>;
		status = "okay";
		mode-switch;
		orientation-switch;
		svid = <0xff01>;
		phandle = <0x25f>;

		port {
			#address-cells = <0x01>;
			#size-cells = <0x00>;

			endpoint@0 {
				reg = <0x00>;
				remote-endpoint = <0x149>;
				phandle = <0x5d>;
			};

			endpoint@1 {
				reg = <0x01>;
				remote-endpoint = <0x14a>;
				phandle = <0x5e>;
			};
		};
	};

	leds {
		compatible = "gpio-leds";

		led1 {
			label = "status-led";
			gpios = <0x33 0x07 0x0a 0x00>;
			linux,default-trigger = "heartbeat";
			default-state = "on";
			status = "okay";
		};
	};

	__symbols__ {
		vf_mapping_table = "/vf_mapping_table";
		cluster0_opp_table = "/cluster0-opp-table";
		cluster1_opp_table = "/cluster1-opp-table";
		dsu_opp_table = "/dsu-opp-table";
		npu_opp_table = "/npu-opp-table";
		npu_opp_table_492 = "/npu-opp-table/opp-492";
		npu_opp_table_852 = "/npu-opp-table/opp-852";
		npu_opp_table_1008 = "/npu-opp-table/opp-1008";
		npu_opp_table_1120 = "/npu-opp-table/opp-1120";
		ve_opp_table = "/ve-opp-table";
		reg_vdd_sys = "/vdd-sys";
		cpu0 = "/cpus/cpu@0";
		cpu1 = "/cpus/cpu@100";
		cpu2 = "/cpus/cpu@200";
		cpu2_idle = "/cpus/cpu@200/thermal-idle";
		cpu3 = "/cpus/cpu@300";
		cpu3_idle = "/cpus/cpu@300/thermal-idle";
		cpu4 = "/cpus/cpu@400";
		cpu4_idle = "/cpus/cpu@400/thermal-idle";
		cpu5 = "/cpus/cpu@500";
		cpu5_idle = "/cpus/cpu@500/thermal-idle";
		cpu6 = "/cpus/cpu@600";
		cpu6_idle = "/cpus/cpu@600/thermal-idle";
		cpu7 = "/cpus/cpu@700";
		cpu7_idle = "/cpus/cpu@700/thermal-idle";
		CPU_SLEEP_0 = "/cpus/idle-states/cpu-sleep-0";
		CLUSTER_SLEEP_0 = "/cpus/idle-states/cluster-sleep-0";
		dcxo19_2M = "/dcxo19_2M_clk";
		dcxo24M = "/dcxo24M_clk";
		dcxo26M = "/dcxo26M_clk";
		sys24M = "/sys24M_clk";
		rc_16m = "/rc16m_clk";
		ext_32k = "/ext32k_clk";
		gic = "/interrupt-controller@3400000";
		wakeupgen = "/interrupt-controller@0";
		nmi_intc = "/intc-nmi@7010320";
		mmu_aw = "/iommu@3900000";
		dsufreq = "/dsufreq@0";
		thermal_zones = "/thermal-zones";
		cpul_thermal_zone = "/thermal-zones/cpul_thermal_zone";
		cpul_trips = "/thermal-zones/cpul_thermal_zone/trips";
		cpul_threshold = "/thermal-zones/cpul_thermal_zone/trips/trip-point@0";
		cpul_target = "/thermal-zones/cpul_thermal_zone/trips/trip-point@1";
		cpul_crit = "/thermal-zones/cpul_thermal_zone/trips/cpu_crit@0";
		cpub_thermal_zone = "/thermal-zones/cpub_thermal_zone";
		cpub_trips = "/thermal-zones/cpub_thermal_zone/trips";
		cpub_threshold = "/thermal-zones/cpub_thermal_zone/trips/trip-point@0";
		cpub_target = "/thermal-zones/cpub_thermal_zone/trips/trip-point@1";
		cpub_crit = "/thermal-zones/cpub_thermal_zone/trips/cpu_crit@0";
		cpul_idle_zone = "/thermal-zones/cpul_idle_zone";
		cpul_idle_trips = "/thermal-zones/cpul_idle_zone/trips";
		cpul_thres = "/thermal-zones/cpul_idle_zone/trips/trip-point@0";
		cpul_overshot = "/thermal-zones/cpul_idle_zone/trips/trip-point@1";
		cpub_idle_zone = "/thermal-zones/cpub_idle_zone";
		cpub_idle_trips = "/thermal-zones/cpub_idle_zone/trips";
		cpub_thres = "/thermal-zones/cpub_idle_zone/trips/trip-point@0";
		cpub_overshot = "/thermal-zones/cpub_idle_zone/trips/trip-point@1";
		gpu_thermal_zone = "/thermal-zones/gpu_thermal_zone";
		gpu_trips = "/thermal-zones/gpu_thermal_zone/trips";
		gpu_threshold = "/thermal-zones/gpu_thermal_zone/trips/trip-point@0";
		gpu_target = "/thermal-zones/gpu_thermal_zone/trips/trip-point@1";
		gpu_crit = "/thermal-zones/gpu_thermal_zone/trips/gpu_crit@0";
		npu_thermal_zone = "/thermal-zones/npu_thermal_zone";
		npu_trips = "/thermal-zones/npu_thermal_zone/trips";
		npu_crit = "/thermal-zones/npu_thermal_zone/trips/npu_crit@0";
		ddr_thermal_zone = "/thermal-zones/ddr_thermal_zone";
		ddr_trips = "/thermal-zones/ddr_thermal_zone/trips";
		ddr_crit = "/thermal-zones/ddr_thermal_zone/trips/ddr_crit@0";
		skin_trips = "/thermal-zones/skin_zone/trips";
		skin_crit = "/thermal-zones/skin_zone/trips/skin_crit@0";
		pck = "/pck-600@7060000";
		pd = "/pck-600@7060000/power-controller";
		dram = "/dram";
		ddr_clk = "/clk_ddr";
		dram_opp_table = "/opp_table";
		sunxi_dmcfreq = "/dmcfreq@3120000";
		soc = "/soc@3000000";
		ve = "/soc@3000000/ve@1c0e000";
		ve1 = "/soc@3000000/ve1@1c0e000";
		ve2 = "/soc@3000000/ve2@1c10000";
		rtc_ccu = "/soc@3000000/rtc_ccu@7090000";
		cpupll_ccu = "/soc@3000000/cpupll_ccu@8870000";
		ccu = "/soc@3000000/ccu@2002000";
		r_ccu = "/soc@3000000/r_ccu@7010000";
		dump_reg = "/soc@3000000/dump_reg@44000";
		soc_timer0 = "/soc@3000000/timer@3009000";
		rtc = "/soc@3000000/rtc@7090000";
		pio = "/soc@3000000/pinctrl@2000000";
		sdc0_pins_f = "/soc@3000000/pinctrl@2000000/sdc0@5";
		sdc0_pins_g = "/soc@3000000/pinctrl@2000000/sdc0@6";
		sdc0_pins_a = "/soc@3000000/pinctrl@2000000/sdc0@0";
		sdc0_pins_b = "/soc@3000000/pinctrl@2000000/sdc0@1";
		sdc0_pins_c = "/soc@3000000/pinctrl@2000000/sdc0@2";
		sdc0_pins_d = "/soc@3000000/pinctrl@2000000/sdc0@3";
		sdc0_pins_e = "/soc@3000000/pinctrl@2000000/sdc0@4";
		sdc1_pins_a = "/soc@3000000/pinctrl@2000000/sdc1@0";
		sdc1_pins_b = "/soc@3000000/pinctrl@2000000/sdc1@1";
		sdc1_pins_c = "/soc@3000000/pinctrl@2000000/sdc1@2";
		sdc2_pins_a = "/soc@3000000/pinctrl@2000000/sdc2@0";
		sdc2_pins_b = "/soc@3000000/pinctrl@2000000/sdc2@1";
		sdc2_pins_c = "/soc@3000000/pinctrl@2000000/sdc2@2";
		sdc2_pins_d = "/soc@3000000/pinctrl@2000000/sdc2@3";
		sdc3_pins_a = "/soc@3000000/pinctrl@2000000/sdc3@0";
		sdc3_pins_b = "/soc@3000000/pinctrl@2000000/sdc3@1";
		sdc3_pins_c = "/soc@3000000/pinctrl@2000000/sdc3@2";
		sdc3_pins_d = "/soc@3000000/pinctrl@2000000/sdc3@3";
		csi_mclk0_pins_a = "/soc@3000000/pinctrl@2000000/csi_mclk0@0";
		csi_mclk0_pins_b = "/soc@3000000/pinctrl@2000000/csi_mclk0@1";
		csi_mclk1_pins_a = "/soc@3000000/pinctrl@2000000/csi_mclk1@0";
		csi_mclk1_pins_b = "/soc@3000000/pinctrl@2000000/csi_mclk1@1";
		csi_mclk2_pins_a = "/soc@3000000/pinctrl@2000000/csi_mclk2@0";
		csi_mclk2_pins_b = "/soc@3000000/pinctrl@2000000/csi_mclk2@1";
		ncsi0_8bit_pins_a = "/soc@3000000/pinctrl@2000000/ncsi0_8bit@0";
		ncsi0_8bit_pins_b = "/soc@3000000/pinctrl@2000000/ncsi0_8bit@1";
		ncsi1_8bit_pins_a = "/soc@3000000/pinctrl@2000000/ncsi1_8bit@0";
		ncsi1_8bit_pins_b = "/soc@3000000/pinctrl@2000000/ncsi1_8bit@1";
		ncsi1_16bit_pins_a = "/soc@3000000/pinctrl@2000000/ncsi1_16bit@0";
		ncsi1_16bit_pins_b = "/soc@3000000/pinctrl@2000000/ncsi1_16bit@1";
		mipia_pins_a = "/soc@3000000/pinctrl@2000000/mipia@0";
		mipia_pins_b = "/soc@3000000/pinctrl@2000000/mipia@1";
		mipib_pins_a = "/soc@3000000/pinctrl@2000000/mipib@0";
		mipib_pins_b = "/soc@3000000/pinctrl@2000000/mipib@1";
		mipic_pins_a = "/soc@3000000/pinctrl@2000000/mipic@0";
		mipic_pins_b = "/soc@3000000/pinctrl@2000000/mipic@1";
		dsi0_4lane_pins_a = "/soc@3000000/pinctrl@2000000/dsi0_4lane@0";
		dsi0_4lane_pins_b = "/soc@3000000/pinctrl@2000000/dsi0_4lane@1";
		dsi1_4lane_pins_a = "/soc@3000000/pinctrl@2000000/dsi1_4lane@0";
		dsi1_4lane_pins_b = "/soc@3000000/pinctrl@2000000/dsi1_4lane@1";
		lvds0_pins_a = "/soc@3000000/pinctrl@2000000/lvds0@0";
		lvds0_pins_b = "/soc@3000000/pinctrl@2000000/lvds0@1";
		lvds1_pins_a = "/soc@3000000/pinctrl@2000000/lvds1@0";
		lvds1_pins_b = "/soc@3000000/pinctrl@2000000/lvds1@1";
		lvds2_pins_a = "/soc@3000000/pinctrl@2000000/lvds2@0";
		lvds2_pins_b = "/soc@3000000/pinctrl@2000000/lvds2@1";
		lvds3_pins_a = "/soc@3000000/pinctrl@2000000/lvds3@0";
		lvds3_pins_b = "/soc@3000000/pinctrl@2000000/lvds3@1";
		rgb0_24pins_a = "/soc@3000000/pinctrl@2000000/rgb0@0";
		rgb0_24pins_b = "/soc@3000000/pinctrl@2000000/rgb0@1";
		rgb1_24pins_a = "/soc@3000000/pinctrl@2000000/rgb1@0";
		rgb1_24pins_b = "/soc@3000000/pinctrl@2000000/rgb1@1";
		test_pins_a = "/soc@3000000/pinctrl@2000000/test_pins@0";
		test_pins_b = "/soc@3000000/pinctrl@2000000/test_pins@1";
		uart0_pins_active = "/soc@3000000/pinctrl@2000000/uart0_pins@0";
		uart0_pins_sleep = "/soc@3000000/pinctrl@2000000/uart0_pins@1";
		uart1_pins_active = "/soc@3000000/pinctrl@2000000/uart1_pins@0";
		uart1_pins_sleep = "/soc@3000000/pinctrl@2000000/uart1_pins@1";
		uart2_pins_active = "/soc@3000000/pinctrl@2000000/uart2_pins@0";
		uart2_pins_sleep = "/soc@3000000/pinctrl@2000000/uart2_pins@1";
		uart3_pins_active = "/soc@3000000/pinctrl@2000000/uart3_pins@0";
		uart3_pins_sleep = "/soc@3000000/pinctrl@2000000/uart3_pins@1";
		uart4_pins_active = "/soc@3000000/pinctrl@2000000/uart4_pins@0";
		uart4_pins_sleep = "/soc@3000000/pinctrl@2000000/uart4_pins@1";
		uart5_pins_active = "/soc@3000000/pinctrl@2000000/uart5_pins@0";
		uart5_pins_sleep = "/soc@3000000/pinctrl@2000000/uart5_pins@1";
		uart6_pins_active = "/soc@3000000/pinctrl@2000000/uart6_pins@0";
		uart6_pins_sleep = "/soc@3000000/pinctrl@2000000/uart6_pins@1";
		uart7_pins_active = "/soc@3000000/pinctrl@2000000/uart7_pins@0";
		uart7_pins_sleep = "/soc@3000000/pinctrl@2000000/uart7_pins@1";
		pwm0_9_pins_active = "/soc@3000000/pinctrl@2000000/pwm0_9@0";
		pwm0_9_pins_sleep = "/soc@3000000/pinctrl@2000000/pwm0_9@1";
		pwm1_9_pins_active = "/soc@3000000/pinctrl@2000000/pwm1@0";
		pwm1_9_pins_sleep = "/soc@3000000/pinctrl@2000000/pwm1@1";
		pwm1_6_pins_active = "/soc@3000000/pinctrl@2000000/pwm6@0";
		pwm1_6_pins_sleep = "/soc@3000000/pinctrl@2000000/pwm6@1";
		twi0_pins_default = "/soc@3000000/pinctrl@2000000/twi0@0";
		twi0_pins_sleep = "/soc@3000000/pinctrl@2000000/twi0@1";
		twi2_pins_default = "/soc@3000000/pinctrl@2000000/twi2@0";
		twi2_pins_sleep = "/soc@3000000/pinctrl@2000000/twi2@1";
		hym8563_int = "/soc@3000000/pinctrl@2000000/hym8563-int@0";
		husb311_int = "/soc@3000000/pinctrl@2000000/husb311-int@0";
		twi3_pins_default = "/soc@3000000/pinctrl@2000000/twi3@0";
		twi3_pins_sleep = "/soc@3000000/pinctrl@2000000/twi3@1";
		twi4_pins_default = "/soc@3000000/pinctrl@2000000/twi4@0";
		twi4_pins_sleep = "/soc@3000000/pinctrl@2000000/twi4@1";
		twi5_pins_default = "/soc@3000000/pinctrl@2000000/twi5@0";
		twi5_pins_sleep = "/soc@3000000/pinctrl@2000000/twi5@1";
		twi7_pins_default = "/soc@3000000/pinctrl@2000000/twi7@0";
		twi7_pins_sleep = "/soc@3000000/pinctrl@2000000/twi7@1";
		twi8_pins_default = "/soc@3000000/pinctrl@2000000/twi8@0";
		twi8_pins_sleep = "/soc@3000000/pinctrl@2000000/twi8@1";
		twi11_pins_default = "/soc@3000000/pinctrl@2000000/twi11@0";
		twi11_pins_sleep = "/soc@3000000/pinctrl@2000000/twi11@1";
		twi12_pins_default = "/soc@3000000/pinctrl@2000000/twi12@0";
		twi12_pins_sleep = "/soc@3000000/pinctrl@2000000/twi12@1";
		i2s0_pins_a = "/soc@3000000/pinctrl@2000000/i2s0@0";
		i2s0_pins_b = "/soc@3000000/pinctrl@2000000/i2s0@1";
		i2s0_pins_c = "/soc@3000000/pinctrl@2000000/i2s0@2";
		i2s0_pins_e = "/soc@3000000/pinctrl@2000000/i2s0@4";
		i2s0_pins_d = "/soc@3000000/pinctrl@2000000/i2s0@3";
		i2s0_pins_f = "/soc@3000000/pinctrl@2000000/i2s0@5";
		i2s1_pins_a = "/soc@3000000/pinctrl@2000000/i2s1@0";
		i2s1_pins_b = "/soc@3000000/pinctrl@2000000/i2s1@1";
		i2s1_pins_c = "/soc@3000000/pinctrl@2000000/i2s1@2";
		i2s1_pins_d = "/soc@3000000/pinctrl@2000000/i2s1@3";
		i2s1_pins_e = "/soc@3000000/pinctrl@2000000/i2s1@4";
		i2s1_pins_f = "/soc@3000000/pinctrl@2000000/i2s1@5";
		i2s2_pins_b = "/soc@3000000/pinctrl@2000000/i2s2@1";
		i2s2_pins_c = "/soc@3000000/pinctrl@2000000/i2s2@2";
		i2s2_pins_d = "/soc@3000000/pinctrl@2000000/i2s2@3";
		i2s2_pins_e = "/soc@3000000/pinctrl@2000000/i2s2@4";
		i2s2_pins_f = "/soc@3000000/pinctrl@2000000/i2s2@5";
		i2s4_pins_a = "/soc@3000000/pinctrl@2000000/i2s4@0";
		i2s4_pins_b = "/soc@3000000/pinctrl@2000000/i2s4@1";
		i2s4_pins_c = "/soc@3000000/pinctrl@2000000/i2s4@2";
		i2s4_pins_d = "/soc@3000000/pinctrl@2000000/i2s4@3";
		i2s4_pins_f = "/soc@3000000/pinctrl@2000000/i2s4@5";
		owa_pins_a = "/soc@3000000/pinctrl@2000000/owa@0";
		owa_pins_b = "/soc@3000000/pinctrl@2000000/owa@1";
		dmic_pins_a = "/soc@3000000/pinctrl@2000000/dmic@0";
		dmic_pins_b = "/soc@3000000/pinctrl@2000000/dmic@1";
		gmac0_pins_default = "/soc@3000000/pinctrl@2000000/gmac0@0";
		gmac0_pins_sleep = "/soc@3000000/pinctrl@2000000/gmac0@1";
		gmac1_pins_default = "/soc@3000000/pinctrl@2000000/gmac1@0";
		gmac1_pins_sleep = "/soc@3000000/pinctrl@2000000/gmac1@1";
		spi1_pins_default = "/soc@3000000/pinctrl@2000000/spi1@0";
		spi1_pins_sleep = "/soc@3000000/pinctrl@2000000/spi1@1";
		spi4_pins_default = "/soc@3000000/pinctrl@2000000/spi4@0";
		spi4_pins_sleep = "/soc@3000000/pinctrl@2000000/spi4@1";
		spi2_pins_default = "/soc@3000000/pinctrl@2000000/spi2@0";
		spi2_pins_cs = "/soc@3000000/pinctrl@2000000/spi2@1";
		spi2_pins_sleep = "/soc@3000000/pinctrl@2000000/spi2@2";
		ledc_pins_a = "/soc@3000000/pinctrl@2000000/ledc@0";
		ledc_pins_b = "/soc@3000000/pinctrl@2000000/ledc@1";
		r_pio = "/soc@3000000/pinctrl@7025000";
		s_twi0_pins_default = "/soc@3000000/pinctrl@7025000/s_twi0@0";
		s_twi0_pins_sleep = "/soc@3000000/pinctrl@7025000/s_twi0@1";
		s_twi1_pins_default = "/soc@3000000/pinctrl@7025000/s_twi1@0";
		s_twi1_pins_sleep = "/soc@3000000/pinctrl@7025000/s_twi1@1";
		s_twi2_pins_default = "/soc@3000000/pinctrl@7025000/s_twi2@0";
		s_twi2_pins_sleep = "/soc@3000000/pinctrl@7025000/s_twi2@1";
		s_irrx_pins_default = "/soc@3000000/pinctrl@7025000/s_irrx@0";
		s_irrx_pins_sleep = "/soc@3000000/pinctrl@7025000/s_irrx@1";
		wdt = "/soc@3000000/watchdog@2050000";
		dma = "/soc@3000000/dma-controller@4601000";
		sid = "/soc@3000000/sid@3006000";
		sram_ctrl = "/soc@3000000/sram_ctrl@3000000";
		ths = "/soc@3000000/ths@2522000";
		nsi0 = "/soc@3000000/nsi-controller@2020000";
		pinctrl_test = "/soc@3000000/pinctrl_test@2000000";
		uart0 = "/soc@3000000/uart@2500000";
		uart1 = "/soc@3000000/uart@2501000";
		uart2 = "/soc@3000000/uart@2502000";
		uart3 = "/soc@3000000/uart@2503000";
		uart4 = "/soc@3000000/uart@2504000";
		uart5 = "/soc@3000000/uart@2505000";
		uart6 = "/soc@3000000/uart@2506000";
		uart7 = "/soc@3000000/uart@7080000";
		uart8 = "/soc@3000000/uart@7081000";
		twi0 = "/soc@3000000/twi@2510000";
		twi1 = "/soc@3000000/twi@2511000";
		twi2 = "/soc@3000000/twi@2512000";
		twi3 = "/soc@3000000/twi@2513000";
		hym8563 = "/soc@3000000/twi@2513000/hym8563@51";
		twi4 = "/soc@3000000/twi@2514000";
		twi5 = "/soc@3000000/twi@2515000";
		twi6 = "/soc@3000000/twi@2516000";
		twi7 = "/soc@3000000/twi@2517000";
		ac101b = "/soc@3000000/twi@2517000/ac101b@3e";
		ac107 = "/soc@3000000/twi@2517000/ac107@36";
		twi8 = "/soc@3000000/twi@2518000";
		es8388 = "/soc@3000000/twi@2518000/es8388@10";
		twi9 = "/soc@3000000/twi@2519000";
		twi10 = "/soc@3000000/twi@251A000";
		twi11 = "/soc@3000000/twi@251B000";
		twi12 = "/soc@3000000/twi@251C000";
		husb311 = "/soc@3000000/twi@251C000/husb311@4e";
		usbc0_role_sw = "/soc@3000000/twi@251C000/husb311@4e/ports/port@0/endpoint@0";
		usb_con = "/soc@3000000/twi@251C000/husb311@4e/connector";
		usbc0_orien_sw = "/soc@3000000/twi@251C000/husb311@4e/connector/ports/port@0/endpoint@0";
		dp_altmode_mux = "/soc@3000000/twi@251C000/husb311@4e/connector/ports/port@1/endpoint@1";
		s_twi0 = "/soc@3000000/twi@7083000";
		pmu1 = "/soc@3000000/twi@7083000/pmu@34";
		powerkey0 = "/soc@3000000/twi@7083000/pmu@34/powerkey@0";
		usb_power_supply = "/soc@3000000/twi@7083000/pmu@34/usb_power_supply";
		bat_power_supply = "/soc@3000000/twi@7083000/pmu@34/bat-power-supply";
		regulator1 = "/soc@3000000/twi@7083000/pmu@34/regulators@1";
		reg_drivevbus = "/soc@3000000/twi@7083000/pmu@34/regulators@1/drivevbus";
		pmu0 = "/soc@3000000/twi@7083000/pmu@36";
		powerkey1 = "/soc@3000000/twi@7083000/pmu@36/powerkey@1";
		regulator0 = "/soc@3000000/twi@7083000/pmu@36/regulators@0";
		reg_dcdc1 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/dcdc1";
		reg_dcdc2 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/dcdc2";
		reg_dcdc3 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/dcdc3";
		reg_dcdc4 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/dcdc4";
		reg_dcdc5 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/dcdc5";
		reg_dcdc6 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/dcdc6";
		reg_dcdc7 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/dcdc7";
		reg_dcdc8 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/dcdc8";
		reg_dcdc9 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/dcdc9";
		reg_rtcldo = "/soc@3000000/twi@7083000/pmu@36/regulators@0/rtcldo";
		reg_aldo1 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/aldo1";
		reg_aldo2 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/aldo2";
		reg_aldo3 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/aldo3";
		reg_aldo4 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/aldo4";
		reg_aldo5 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/aldo5";
		reg_aldo6 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/aldo6";
		reg_dldo1 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/dldo1";
		reg_dldo2 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/dldo2";
		reg_dldo3 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/dldo3";
		reg_dldo4 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/dldo4";
		reg_dldo5 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/dldo5";
		reg_dldo6 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/dldo6";
		reg_eldo1 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/eldo1";
		reg_eldo2 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/eldo2";
		reg_eldo3 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/eldo3";
		reg_eldo4 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/eldo4";
		reg_eldo5 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/eldo5";
		reg_eldo6 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/eldo6";
		reg_dc1sw1 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/dc1sw1";
		reg_dc1sw2 = "/soc@3000000/twi@7083000/pmu@36/regulators@0/dc1sw2";
		s_twi1 = "/soc@3000000/twi@7084000";
		s_twi2 = "/soc@3000000/twi@7085000";
		pwm0 = "/soc@3000000/pwm@2527000";
		pwm0_0 = "/soc@3000000/pwm0@2527010";
		pwm0_1 = "/soc@3000000/pwm0@2527011";
		pwm0_2 = "/soc@3000000/pwm0@2527012";
		pwm0_3 = "/soc@3000000/pwm0@2527013";
		pwm0_4 = "/soc@3000000/pwm0@2527014";
		pwm0_5 = "/soc@3000000/pwm0@2527015";
		pwm0_6 = "/soc@3000000/pwm0@2527016";
		pwm0_7 = "/soc@3000000/pwm0@2527017";
		pwm0_8 = "/soc@3000000/pwm0@2527018";
		pwm0_9 = "/soc@3000000/pwm0@2527019";
		pwm1 = "/soc@3000000/pwm@2528000";
		pwm1_0 = "/soc@3000000/pwm1@2528010";
		pwm1_1 = "/soc@3000000/pwm1@2528011";
		pwm1_2 = "/soc@3000000/pwm1@2528012";
		pwm1_3 = "/soc@3000000/pwm1@2528013";
		pwm1_4 = "/soc@3000000/pwm1@2528014";
		pwm1_5 = "/soc@3000000/pwm1@2528015";
		pwm1_6 = "/soc@3000000/pwm1@2528016";
		pwm1_7 = "/soc@3000000/pwm1@2528017";
		pwm1_8 = "/soc@3000000/pwm1@2528018";
		pwm1_9 = "/soc@3000000/pwm1@2528019";
		s_pwm0 = "/soc@3000000/pwm@7023000";
		s_pwm0_0 = "/soc@3000000/s_pwm0@7023010";
		s_pwm0_1 = "/soc@3000000/s_pwm0@7023011";
		s_pwm0_2 = "/soc@3000000/s_pwm0@7023012";
		s_pwm0_3 = "/soc@3000000/s_pwm0@7023013";
		s_pwm0_4 = "/soc@3000000/s_pwm0@7023014";
		s_pwm0_5 = "/soc@3000000/s_pwm0@7023015";
		s_pwm0_6 = "/soc@3000000/s_pwm0@7023016";
		s_pwm0_7 = "/soc@3000000/s_pwm0@7023017";
		s_pwm0_8 = "/soc@3000000/s_pwm0@7023018";
		s_pwm0_9 = "/soc@3000000/s_pwm0@7023019";
		lradc = "/soc@3000000/lradc@2524000";
		gpadc0 = "/soc@3000000/gpadc@2521000";
		irrx = "/soc@3000000/irrx@2526000";
		s_irrx = "/soc@3000000/irrx@7040000";
		irtx = "/soc@3000000/irtx@2525000";
		ledc = "/soc@3000000/ledc@2520000";
		npu = "/soc@3000000/npu@3600000";
		hwspinlock = "/soc@3000000/hwspinlock@3005000";
		msgbox = "/soc@3000000/msgbox@3004000";
		a55_rproc = "/soc@3000000/a55_rproc@0";
		cryptoengine = "/soc@3000000/ce@4603000";
		usbc0 = "/soc@3000000/usbc0@10";
		usbc0_role_switch = "/soc@3000000/usbc0@10/port/endpoint@0";
		udc = "/soc@3000000/udc-controller@4100000";
		ehci0 = "/soc@3000000/ehci0-controller@4101000";
		ohci0 = "/soc@3000000/ohci0-controller@4101400";
		usbc1 = "/soc@3000000/usbc1@11";
		ehci1 = "/soc@3000000/ehci1-controller@4200000";
		ohci1 = "/soc@3000000/ohci1-controller@4200400";
		usbc2 = "/soc@3000000/usbc2@12";
		xhci2 = "/soc@3000000/usbc2@12/xhci2-controller@6a00000";
		u2phy = "/soc@3000000/phy@6b00000";
		vind0 = "/soc@3000000/vind@5800800";
		csi0 = "/soc@3000000/vind@5800800/csi@5820000";
		csi1 = "/soc@3000000/vind@5800800/csi@5821000";
		csi2 = "/soc@3000000/vind@5800800/csi@5822000";
		mipi0 = "/soc@3000000/vind@5800800/mipi@5810100";
		mipi1 = "/soc@3000000/vind@5800800/mipi@5810200";
		mipi2 = "/soc@3000000/vind@5800800/mipi@5810300";
		tdm0 = "/soc@3000000/vind@5800800/tdm@5908000";
		isp00 = "/soc@3000000/vind@5800800/isp@5900000";
		isp01 = "/soc@3000000/vind@5800800/isp@58ffffc";
		isp02 = "/soc@3000000/vind@5800800/isp@58ffff8";
		isp03 = "/soc@3000000/vind@5800800/isp@58ffff4";
		isp10 = "/soc@3000000/vind@5800800/isp@4";
		isp20 = "/soc@3000000/vind@5800800/isp@5";
		isp30 = "/soc@3000000/vind@5800800/isp@6";
		scaler00 = "/soc@3000000/vind@5800800/scaler@5910000";
		scaler01 = "/soc@3000000/vind@5800800/scaler@590fffc";
		scaler02 = "/soc@3000000/vind@5800800/scaler@590fff8";
		scaler03 = "/soc@3000000/vind@5800800/scaler@590fff4";
		scaler10 = "/soc@3000000/vind@5800800/scaler@5910400";
		scaler11 = "/soc@3000000/vind@5800800/scaler@59103fc";
		scaler12 = "/soc@3000000/vind@5800800/scaler@59103f8";
		scaler13 = "/soc@3000000/vind@5800800/scaler@59103f4";
		scaler20 = "/soc@3000000/vind@5800800/scaler@5910800";
		scaler21 = "/soc@3000000/vind@5800800/scaler@59107fc";
		scaler22 = "/soc@3000000/vind@5800800/scaler@59107f8";
		scaler23 = "/soc@3000000/vind@5800800/scaler@59107f4";
		scaler30 = "/soc@3000000/vind@5800800/scaler@5910c00";
		scaler31 = "/soc@3000000/vind@5800800/scaler@5910bfc";
		scaler32 = "/soc@3000000/vind@5800800/scaler@5910bf8";
		scaler33 = "/soc@3000000/vind@5800800/scaler@5910bf4";
		scaler40 = "/soc@3000000/vind@5800800/scaler@16";
		scaler50 = "/soc@3000000/vind@5800800/scaler@17";
		actuator0 = "/soc@3000000/vind@5800800/actuator@2108180";
		flash0 = "/soc@3000000/vind@5800800/flash@2108190";
		sensor0 = "/soc@3000000/vind@5800800/sensor@5812000";
		sensor1 = "/soc@3000000/vind@5800800/sensor@5812010";
		sensor2 = "/soc@3000000/vind@5800800/sensor@5812020";
		sensor_list0 = "/soc@3000000/vind@5800800/sensor_list@5812040";
		sensor_list1 = "/soc@3000000/vind@5800800/sensor_list@5812050";
		vinc00 = "/soc@3000000/vind@5800800/vinc@5830000";
		vinc01 = "/soc@3000000/vind@5800800/vinc@582fffc";
		vinc02 = "/soc@3000000/vind@5800800/vinc@582fff8";
		vinc03 = "/soc@3000000/vind@5800800/vinc@582fff4";
		vinc10 = "/soc@3000000/vind@5800800/vinc@5831000";
		vinc11 = "/soc@3000000/vind@5800800/vinc@5830ffc";
		vinc12 = "/soc@3000000/vind@5800800/vinc@5830ff8";
		vinc13 = "/soc@3000000/vind@5800800/vinc@5830ff4";
		vinc20 = "/soc@3000000/vind@5800800/vinc@5832000";
		vinc21 = "/soc@3000000/vind@5800800/vinc@5831ffc";
		vinc22 = "/soc@3000000/vind@5800800/vinc@5831ff8";
		vinc23 = "/soc@3000000/vind@5800800/vinc@5831ff4";
		vinc30 = "/soc@3000000/vind@5800800/vinc@5833000";
		vinc31 = "/soc@3000000/vind@5800800/vinc@5832ffc";
		vinc32 = "/soc@3000000/vind@5800800/vinc@5832ff8";
		vinc33 = "/soc@3000000/vind@5800800/vinc@5832ff4";
		vinc40 = "/soc@3000000/vind@5800800/vinc@5834000";
		vinc50 = "/soc@3000000/vind@5800800/vinc@5835000";
		di = "/soc@3000000/deinterlace@5400000";
		g2d = "/soc@3000000/g2d@5440000";
		pd_vi_test = "/soc@3000000/pd_vi_test@0";
		pd_ve_enc_test = "/soc@3000000/pd_ve_enc_test@0";
		pd_npu_test = "/soc@3000000/pd_npu_test@0";
		pd_gpu_top_test = "/soc@3000000/pd_gpu_top_test@0";
		pd_gpu_core_test = "/soc@3000000/pd_gpu_core_test@0";
		pd_pcie_test = "/soc@3000000/pd_pcie_test@0";
		pd_usb2_test = "/soc@3000000/pd_usb2_test@0";
		pd_de_sys_test = "/soc@3000000/pd_de_sys_test@0";
		pd_vo_test = "/soc@3000000/pd_vo_test@0";
		pd_vo1_test = "/soc@3000000/pd_vo1_test@0";
		gmac_stmmac_axi_setup = "/soc@3000000/stmmac-axi-config";
		gmac_mtl_rx_setup = "/soc@3000000/rx-queues-config";
		gmac_mtl_tx_setup = "/soc@3000000/tx_queues-config";
		gmac0 = "/soc@3000000/ethernet@4500000";
		mdio0 = "/soc@3000000/ethernet@4500000/mdio0@0";
		gmac0_phy0 = "/soc@3000000/ethernet@4500000/mdio0@0/ethernet-phy@1";
		gmac1 = "/soc@3000000/ethernet@4510000";
		mdio1 = "/soc@3000000/ethernet@4510000/mdio1@0";
		gmac1_phy0 = "/soc@3000000/ethernet@4510000/mdio1@0/ethernet-phy@1";
		rfkill = "/soc@3000000/rfkill";
		addr_mgt = "/soc@3000000/addr_mgt";
		btlpm = "/soc@3000000/btlpm";
		spi0 = "/soc@3000000/spi@2540000";
		spi1 = "/soc@3000000/spi@2541000";
		spi2 = "/soc@3000000/spi@2542000";
		spi3 = "/soc@3000000/spi@2543000";
		spi4 = "/soc@3000000/spi@2544000";
		r_spi = "/soc@3000000/spi@7092000";
		serdes = "/soc@3000000/serdes@6c00000";
		combophy0 = "/soc@3000000/serdes@6c00000/combo-phy0@6c01000";
		combo0_dp = "/soc@3000000/serdes@6c00000/combo-phy0@6c01000/combo0-dp-phy";
		combo0_usb = "/soc@3000000/serdes@6c00000/combo-phy0@6c01000/combo0-usb-phy";
		combophy1 = "/soc@3000000/serdes@6c00000/combo-phy1@6c02000";
		combo1_usb = "/soc@3000000/serdes@6c00000/combo-phy1@6c02000/combo1-usb-phy";
		combo1_pcie = "/soc@3000000/serdes@6c00000/combo-phy1@6c02000/combo1-pcie-phy";
		aux_hpd = "/soc@3000000/serdes@6c00000/aux-hpd@6c01e00";
		aux_hpd_phy = "/soc@3000000/serdes@6c00000/aux-hpd@6c01e00/aux-hpd-phy";
		sunxi_drm = "/soc@3000000/sunxi-drm";
		de = "/soc@3000000/de@5000000";
		disp0 = "/soc@3000000/de@5000000/ports/port@0";
		disp0_out_tcon0 = "/soc@3000000/de@5000000/ports/port@0/endpoint@0";
		disp0_out_tcon1 = "/soc@3000000/de@5000000/ports/port@0/endpoint@1";
		disp0_out_tcon2 = "/soc@3000000/de@5000000/ports/port@0/endpoint@2";
		disp0_out_tcon3 = "/soc@3000000/de@5000000/ports/port@0/endpoint@3";
		disp0_out_tcon4 = "/soc@3000000/de@5000000/ports/port@0/endpoint@4";
		disp1 = "/soc@3000000/de@5000000/ports/port@1";
		disp1_out_tcon0 = "/soc@3000000/de@5000000/ports/port@1/endpoint@0";
		disp1_out_tcon1 = "/soc@3000000/de@5000000/ports/port@1/endpoint@1";
		disp1_out_tcon2 = "/soc@3000000/de@5000000/ports/port@1/endpoint@2";
		disp1_out_tcon3 = "/soc@3000000/de@5000000/ports/port@1/endpoint@3";
		disp1_out_tcon4 = "/soc@3000000/de@5000000/ports/port@1/endpoint@4";
		vo0 = "/soc@3000000/vo0@5500000";
		vo1 = "/soc@3000000/vo1@5510000";
		dlcd0 = "/soc@3000000/tcon0@5501000";
		tcon0_in = "/soc@3000000/tcon0@5501000/ports/port@0";
		tcon0_in_disp0 = "/soc@3000000/tcon0@5501000/ports/port@0/endpoint@0";
		tcon0_in_disp1 = "/soc@3000000/tcon0@5501000/ports/port@0/endpoint@1";
		tcon0_out = "/soc@3000000/tcon0@5501000/ports/port@1";
		tcon0_out_dsi0 = "/soc@3000000/tcon0@5501000/ports/port@1/endpoint@0";
		tcon0_out_dsi1 = "/soc@3000000/tcon0@5501000/ports/port@1/endpoint@1";
		tcon0_out_lvds0 = "/soc@3000000/tcon0@5501000/ports/port@1/endpoint@2";
		tcon0_out_rgb0 = "/soc@3000000/tcon0@5501000/ports/port@1/endpoint@3";
		dlcd1 = "/soc@3000000/tcon1@5502000";
		tcon1_in = "/soc@3000000/tcon1@5502000/ports/port@0";
		tcon1_in_disp0 = "/soc@3000000/tcon1@5502000/ports/port@0/endpoint@0";
		tcon1_in_disp1 = "/soc@3000000/tcon1@5502000/ports/port@0/endpoint@1";
		tcon1_out = "/soc@3000000/tcon1@5502000/ports/port@1";
		tcon1_out_dsi1 = "/soc@3000000/tcon1@5502000/ports/port@1/endpoint@0";
		dlcd2 = "/soc@3000000/tcon2@5503000";
		tcon2_in = "/soc@3000000/tcon2@5503000/ports/port@0";
		tcon2_in_disp0 = "/soc@3000000/tcon2@5503000/ports/port@0/endpoint@0";
		tcon2_in_disp1 = "/soc@3000000/tcon2@5503000/ports/port@0/endpoint@1";
		tcon2_out = "/soc@3000000/tcon2@5503000/ports/port@1";
		tcon2_out_lvds1 = "/soc@3000000/tcon2@5503000/ports/port@1/endpoint@0";
		tcon2_out_rgb1 = "/soc@3000000/tcon2@5503000/ports/port@1/endpoint@1";
		dsi0combophy = "/soc@3000000/phy@5507000";
		dsi0 = "/soc@3000000/dsi0@5506000";
		dsi0_in = "/soc@3000000/dsi0@5506000/ports/port@0";
		dsi0_in_tcon0 = "/soc@3000000/dsi0@5506000/ports/port@0/endpoint@0";
		dsi1combophy = "/soc@3000000/phy@5509000";
		dsi1 = "/soc@3000000/dsi1@5508000";
		dsi1_in = "/soc@3000000/dsi1@5508000/ports/port@0";
		dsi1_in_tcon1 = "/soc@3000000/dsi1@5508000/ports/port@0/endpoint@1";
		dsi1_in_tcon0 = "/soc@3000000/dsi1@5508000/ports/port@0/endpoint@0";
		dsi1_out = "/soc@3000000/dsi1@5508000/ports/port@1";
		dsi_out_panel = "/soc@3000000/dsi1@5508000/ports/port@1/endpoint";
		panel = "/soc@3000000/dsi1@5508000/panel@0";
		panel_in = "/soc@3000000/dsi1@5508000/panel@0/ports/port@0";
		panel_input = "/soc@3000000/dsi1@5508000/panel@0/ports/port@0/endpoint@0";
		panel_out = "/soc@3000000/dsi1@5508000/panel@0/ports/port@1";
		panel_output_0 = "/soc@3000000/dsi1@5508000/panel@0/ports/port@1/endpoint@0";
		rgb0 = "/soc@3000000/rgb0@0001000";
		rgb0_in = "/soc@3000000/rgb0@0001000/ports/port@0";
		rgb0_in_tcon0 = "/soc@3000000/rgb0@0001000/ports/port@0/endpoint@0";
		lvds0 = "/soc@3000000/lvds0@0001000";
		lvds0_in = "/soc@3000000/lvds0@0001000/ports/port@0";
		lvds0_in_tcon0 = "/soc@3000000/lvds0@0001000/ports/port@0/endpoint@0";
		lvds_panel_out = "/soc@3000000/lvds0@0001000/ports/port@1/endpoint@0";
		rgb1 = "/soc@3000000/rgb1@0001000";
		rgb1_in = "/soc@3000000/rgb1@0001000/ports/port@0";
		rgb1_in_tcon2 = "/soc@3000000/rgb1@0001000/ports/port@0/endpoint@0";
		lvds1 = "/soc@3000000/lvds1@0001000";
		lvds1_in = "/soc@3000000/lvds1@0001000/ports/port@0";
		lvds1_in_tcon2 = "/soc@3000000/lvds1@0001000/ports/port@0/endpoint@0";
		lvds1_panel_out = "/soc@3000000/lvds1@0001000/ports/port@1/endpoint@0";
		tv0 = "/soc@3000000/tcon3@5730000";
		tcon3_in = "/soc@3000000/tcon3@5730000/ports/port@0";
		tcon3_in_disp0 = "/soc@3000000/tcon3@5730000/ports/port@0/endpoint@0";
		tcon3_in_disp1 = "/soc@3000000/tcon3@5730000/ports/port@0/endpoint@1";
		tcon3_out = "/soc@3000000/tcon3@5730000/ports/port@1";
		tcon3_out_hdmi0 = "/soc@3000000/tcon3@5730000/ports/port@1/endpoint@0";
		tv1 = "/soc@3000000/tcon4@5731000";
		tcon4_in = "/soc@3000000/tcon4@5731000/ports/port@0";
		tcon4_in_disp0 = "/soc@3000000/tcon4@5731000/ports/port@0/endpoint@0";
		tcon4_in_disp1 = "/soc@3000000/tcon4@5731000/ports/port@0/endpoint@1";
		tcon4_out = "/soc@3000000/tcon4@5731000/ports/port@1";
		tcon4_out_edp0 = "/soc@3000000/tcon4@5731000/ports/port@1/endpoint@0";
		edp0 = "/soc@3000000/edp0@5720000";
		edp_in = "/soc@3000000/edp0@5720000/ports/port@0";
		edp0_in_tcon4 = "/soc@3000000/edp0@5720000/ports/port@0/endpoint@0";
		edp_out = "/soc@3000000/edp0@5720000/ports/port@1";
		edp_panel_out = "/soc@3000000/edp0@5720000/ports/port@1/endpoint@0";
		hdmi0 = "/soc@3000000/hdmi0@5520000";
		hdmi_in = "/soc@3000000/hdmi0@5520000/ports/port@0";
		hdmi0_in_tcon3 = "/soc@3000000/hdmi0@5520000/ports/port@0/endpoint@0";
		ufs = "/soc@3000000/ufs@04520000";
		sdc2 = "/soc@3000000/sdmmc@4022000";
		sdc3 = "/soc@3000000/sdmmc@4023000";
		sdc0 = "/soc@3000000/sdmmc@4020000";
		sdc1 = "/soc@3000000/sdmmc@4021000";
		gpu = "/soc@3000000/gpu@1800000";
		gpu_opp_table = "/soc@3000000/gpu-opp-table";
		hdmi_codec = "/soc@3000000/hdmi_codec";
		i2s0_plat = "/soc@3000000/i2s0_plat@2532000";
		i2s0_mach = "/soc@3000000/i2s0_mach";
		i2s0_cpu = "/soc@3000000/i2s0_mach/soundcard-mach,cpu";
		i2s0_codec = "/soc@3000000/i2s0_mach/soundcard-mach,codec";
		i2s1_plat = "/soc@3000000/i2s1_plat@2533000";
		i2s1_mach = "/soc@3000000/i2s1_mach";
		i2s1_cpu = "/soc@3000000/i2s1_mach/soundcard-mach,cpu";
		i2s1_codec = "/soc@3000000/i2s1_mach/soundcard-mach,codec";
		i2s2_plat = "/soc@3000000/i2s2_plat@2534000";
		i2s2_mach = "/soc@3000000/i2s2_mach";
		i2s3_plat = "/soc@3000000/i2s3_plat@2535000";
		i2s3_mach = "/soc@3000000/i2s3_mach";
		i2s3_cpu = "/soc@3000000/i2s3_mach/soundcard-mach,cpu";
		i2s3_codec = "/soc@3000000/i2s3_mach/soundcard-mach,codec";
		i2s4_plat = "/soc@3000000/i2s4_plat@2536000";
		i2s4_mach = "/soc@3000000/i2s4_mach";
		i2s4_cpu = "/soc@3000000/i2s4_mach/soundcard-mach,cpu";
		i2s4_codec = "/soc@3000000/i2s4_mach/soundcard-mach,codec";
		owa_plat = "/soc@3000000/owa_plat@2537000";
		owa_mach = "/soc@3000000/owa_mach";
		dmic_plat = "/soc@3000000/dmic_plat@2531000";
		dmic_mach = "/soc@3000000/dmic_mach";
		pcie_rc = "/soc@3000000/pcie@6000000";
		yellow_pwm_led = "/soc@3000000/leds/yellow-pwm-led";
		vcc3v3_pcie = "/vcc3v3-pcie-regulator";
		reg_usb0_vbus = "/usb0-vbus";
		reg_usb1_vbus = "/usb1-vbus";
		arisc_config = "/arisc_config";
		backlight1 = "/backlight1";
		edp_panel = "/edp_panel";
		panel_in_edp = "/edp_panel/ports/port@0";
		edp_panel_in = "/edp_panel/ports/port@0/endpoint@0";
		backlight0 = "/backlight0";
		lvds_panel = "/lvds_panel@0";
		lvds0_timing0 = "/lvds_panel@0/display-timings/timing0";
		lvds0_timing1 = "/lvds_panel@0/display-timings/timing1";
		lvds_panel_in = "/lvds_panel@0/port/endpoint";
		lvds_panel1 = "/lvds_panel1@0";
		lvds1_timing0 = "/lvds_panel1@0/display-timings/timing0";
		lvds1_timing1 = "/lvds_panel1@0/display-timings/timing1";
		lvds1_panel_in = "/lvds_panel1@0/port/endpoint";
		dsi_panel = "/dsi_panel@1";
		timing0 = "/dsi_panel@1/display-timings/timing0";
		panel0_in = "/dsi_panel@1/port/endpoint@0";
		phy_switcher = "/phy_switcher@10";
		usbdp_orientation_switch = "/phy_switcher@10/port/endpoint@0";
		usbdp_dp_altmode_mux = "/phy_switcher@10/port/endpoint@1";
	};
};