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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/cpufreq/apple,cluster-cpufreq.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Apple SoC cluster cpufreq device
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maintainers:
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- Hector Martin <marcan@marcan.st>
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description: |
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Apple SoCs (e.g. M1) have a per-cpu-cluster DVFS controller that is part of
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the cluster management register block. This binding uses the standard
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operating-points-v2 table to define the CPU performance states, with the
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opp-level property specifying the hardware p-state index for that level.
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- apple,t8103-cluster-cpufreq
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- apple,t8112-cluster-cpufreq
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- const: apple,cluster-cpufreq
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- items:
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- enum:
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- apple,s8000-cluster-cpufreq
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- apple,t8010-cluster-cpufreq
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- apple,t8015-cluster-cpufreq
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- apple,t6000-cluster-cpufreq
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- const: apple,t8103-cluster-cpufreq
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- const: apple,cluster-cpufreq
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- items:
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- const: apple,t7000-cluster-cpufreq
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- const: apple,s5l8960x-cluster-cpufreq
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- const: apple,s5l8960x-cluster-cpufreq
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- items:
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- const: apple,t6020-cluster-cpufreq
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- const: apple,t8112-cluster-cpufreq
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reg:
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maxItems: 1
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'#performance-domain-cells':
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const: 0
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required:
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- compatible
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- reg
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- '#performance-domain-cells'
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additionalProperties: false
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examples:
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- |
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// This example shows a single CPU per domain and 2 domains,
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// with two p-states per domain.
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// Shipping hardware has 2-4 CPUs per domain and 2-6 domains.
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "apple,icestorm";
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device_type = "cpu";
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reg = <0x0 0x0>;
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operating-points-v2 = <&ecluster_opp>;
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performance-domains = <&cpufreq_e>;
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};
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cpu@10100 {
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compatible = "apple,firestorm";
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device_type = "cpu";
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reg = <0x0 0x10100>;
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operating-points-v2 = <&pcluster_opp>;
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performance-domains = <&cpufreq_p>;
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};
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};
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ecluster_opp: opp-table-0 {
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compatible = "operating-points-v2";
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opp-shared;
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opp01 {
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opp-hz = /bits/ 64 <600000000>;
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opp-level = <1>;
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clock-latency-ns = <7500>;
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};
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opp02 {
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opp-hz = /bits/ 64 <972000000>;
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opp-level = <2>;
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clock-latency-ns = <22000>;
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};
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};
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pcluster_opp: opp-table-1 {
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compatible = "operating-points-v2";
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opp-shared;
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opp01 {
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opp-hz = /bits/ 64 <600000000>;
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opp-level = <1>;
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clock-latency-ns = <8000>;
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};
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opp02 {
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opp-hz = /bits/ 64 <828000000>;
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opp-level = <2>;
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clock-latency-ns = <19000>;
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};
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};
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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cpufreq_e: performance-controller@210e20000 {
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compatible = "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
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reg = <0x2 0x10e20000 0 0x1000>;
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#performance-domain-cells = <0>;
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};
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cpufreq_p: performance-controller@211e20000 {
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compatible = "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";
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reg = <0x2 0x11e20000 0 0x1000>;
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#performance-domain-cells = <0>;
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};
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};
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