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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/arch/arm/mach-axxia/platsmp.c
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// SPDX-License-Identifier: GPL-2.0-only

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/*

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 * linux/arch/arm/mach-axxia/platsmp.c

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 *

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 * Copyright (C) 2012 LSI Corporation

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 */

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#include <linux/init.h>

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#include <linux/io.h>

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#include <linux/smp.h>

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#include <linux/of.h>

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#include <linux/of_address.h>

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#include <asm/cacheflush.h>

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/* Syscon register offsets for releasing cores from reset */

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#define SC_CRIT_WRITE_KEY	0x1000

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#define SC_RST_CPU_HOLD		0x1010

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/*

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 * Write the kernel entry point for secondary CPUs to the specified address

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 */

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static void write_release_addr(u32 release_phys)

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{

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	u32 *virt = (u32 *) phys_to_virt(release_phys);

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	writel_relaxed(__pa_symbol(secondary_startup), virt);

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	/* Make sure this store is visible to other CPUs */

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	smp_wmb();

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	__cpuc_flush_dcache_area(virt, sizeof(u32));

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}

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static int axxia_boot_secondary(unsigned int cpu, struct task_struct *idle)

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{

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	struct device_node *syscon_np;

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	void __iomem *syscon;

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	u32 tmp;

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	syscon_np = of_find_compatible_node(NULL, NULL, "lsi,axxia-syscon");

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	if (!syscon_np)

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		return -ENOENT;

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	syscon = of_iomap(syscon_np, 0);

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	of_node_put(syscon_np);

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	if (!syscon)

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		return -ENOMEM;

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	tmp = readl(syscon + SC_RST_CPU_HOLD);

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	writel(0xab, syscon + SC_CRIT_WRITE_KEY);

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	tmp &= ~(1 << cpu);

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	writel(tmp, syscon + SC_RST_CPU_HOLD);

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	return 0;

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}

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static void __init axxia_smp_prepare_cpus(unsigned int max_cpus)

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{

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	int cpu_count = 0;

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	int cpu;

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	/*

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	 * Initialise the present map, which describes the set of CPUs actually

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	 * populated at the present time.

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	 */

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	for_each_possible_cpu(cpu) {

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		struct device_node *np;

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		u32 release_phys;

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		np = of_get_cpu_node(cpu, NULL);

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		if (!np)

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			continue;

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		if (of_property_read_u32(np, "cpu-release-addr", &release_phys))

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			continue;

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		if (cpu_count < max_cpus) {

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			set_cpu_present(cpu, true);

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			cpu_count++;

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		}

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		if (release_phys != 0)

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			write_release_addr(release_phys);

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	}

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}

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static const struct smp_operations axxia_smp_ops __initconst = {

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	.smp_prepare_cpus	= axxia_smp_prepare_cpus,

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	.smp_boot_secondary	= axxia_boot_secondary,

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};

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CPU_METHOD_OF_DECLARE(axxia_smp, "lsi,syscon-release", &axxia_smp_ops);

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