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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/arch/arm/mach-pxa/devices.c
29269 views
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// SPDX-License-Identifier: GPL-2.0
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/clkdev.h>
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#include <linux/clk-provider.h>
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#include <linux/dma-mapping.h>
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#include <linux/dmaengine.h>
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#include <linux/gpio-pxa.h>
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#include <linux/platform_data/i2c-pxa.h>
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#include <linux/soc/pxa/cpu.h>
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#include "udc.h"
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#include <linux/platform_data/video-pxafb.h>
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#include <linux/platform_data/mmc-pxamci.h>
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#include "irqs.h"
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#include <linux/platform_data/usb-ohci-pxa27x.h>
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#include <linux/platform_data/mmp_dma.h>
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#include "mfp-pxa2xx.h"
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#include "regs-ost.h"
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#include "reset.h"
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#include "devices.h"
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#include "generic.h"
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void __init pxa_register_device(struct platform_device *dev, void *data)
28
{
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int ret;
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dev->dev.platform_data = data;
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ret = platform_device_register(dev);
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if (ret)
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dev_err(&dev->dev, "unable to register device: %d\n", ret);
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}
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static struct resource pxa_resource_pmu = {
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.start = IRQ_PMU,
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.end = IRQ_PMU,
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.flags = IORESOURCE_IRQ,
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};
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struct platform_device pxa_device_pmu = {
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.name = "xscale-pmu",
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.id = -1,
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.resource = &pxa_resource_pmu,
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.num_resources = 1,
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};
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static const struct resource pxamci_resources[] = {
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[0] = {
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.start = 0x41100000,
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.end = 0x41100fff,
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.flags = IORESOURCE_MEM,
56
},
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[1] = {
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.start = IRQ_MMC,
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.end = IRQ_MMC,
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.flags = IORESOURCE_IRQ,
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},
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};
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void __init pxa_set_mci_info(const struct pxamci_platform_data *info,
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const struct property_entry *props)
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{
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const struct platform_device_info mci_info = {
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.name = "pxa2xx-mci",
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.id = 0,
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.res = pxamci_resources,
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.num_res = ARRAY_SIZE(pxamci_resources),
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.data = info,
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.size_data = sizeof(*info),
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.dma_mask = 0xffffffffUL,
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.properties = props,
76
};
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struct platform_device *mci_dev;
78
int err;
79
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mci_dev = platform_device_register_full(&mci_info);
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err = PTR_ERR_OR_ZERO(mci_dev);
82
if (err)
83
pr_err("Unable to create mci device: %d\n", err);
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}
85
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static struct pxa2xx_udc_mach_info pxa_udc_info = {
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.gpio_pullup = -1,
88
};
89
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static struct resource pxa2xx_udc_resources[] = {
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[0] = {
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.start = 0x40600000,
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.end = 0x4060ffff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_USB,
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.end = IRQ_USB,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 udc_dma_mask = ~(u32)0;
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struct platform_device pxa25x_device_udc = {
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.name = "pxa25x-udc",
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.id = -1,
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.resource = pxa2xx_udc_resources,
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.num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
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.dev = {
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.platform_data = &pxa_udc_info,
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.dma_mask = &udc_dma_mask,
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}
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};
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struct platform_device pxa27x_device_udc = {
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.name = "pxa27x-udc",
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.id = -1,
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.resource = pxa2xx_udc_resources,
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.num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
121
.dev = {
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.platform_data = &pxa_udc_info,
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.dma_mask = &udc_dma_mask,
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}
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};
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static struct resource pxafb_resources[] = {
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[0] = {
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.start = 0x44000000,
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.end = 0x4400ffff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_LCD,
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.end = IRQ_LCD,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 fb_dma_mask = ~(u64)0;
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struct platform_device pxa_device_fb = {
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.name = "pxa2xx-fb",
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.id = -1,
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.dev = {
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.dma_mask = &fb_dma_mask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(pxafb_resources),
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.resource = pxafb_resources,
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};
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void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
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{
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pxa_device_fb.dev.parent = parent;
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pxa_register_device(&pxa_device_fb, info);
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}
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static struct resource pxa_resource_ffuart[] = {
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{
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.start = 0x40100000,
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.end = 0x40100023,
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.flags = IORESOURCE_MEM,
164
}, {
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.start = IRQ_FFUART,
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.end = IRQ_FFUART,
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.flags = IORESOURCE_IRQ,
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}
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};
170
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struct platform_device pxa_device_ffuart = {
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.name = "pxa2xx-uart",
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.id = 0,
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.resource = pxa_resource_ffuart,
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.num_resources = ARRAY_SIZE(pxa_resource_ffuart),
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};
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void __init pxa_set_ffuart_info(void *info)
179
{
180
pxa_register_device(&pxa_device_ffuart, info);
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}
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static struct resource pxa_resource_btuart[] = {
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{
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.start = 0x40200000,
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.end = 0x40200023,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_BTUART,
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.end = IRQ_BTUART,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device pxa_device_btuart = {
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.name = "pxa2xx-uart",
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.id = 1,
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.resource = pxa_resource_btuart,
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.num_resources = ARRAY_SIZE(pxa_resource_btuart),
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};
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void __init pxa_set_btuart_info(void *info)
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{
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pxa_register_device(&pxa_device_btuart, info);
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}
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static struct resource pxa_resource_stuart[] = {
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{
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.start = 0x40700000,
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.end = 0x40700023,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_STUART,
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.end = IRQ_STUART,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device pxa_device_stuart = {
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.name = "pxa2xx-uart",
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.id = 2,
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.resource = pxa_resource_stuart,
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.num_resources = ARRAY_SIZE(pxa_resource_stuart),
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};
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void __init pxa_set_stuart_info(void *info)
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{
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pxa_register_device(&pxa_device_stuart, info);
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}
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static struct resource pxa_resource_hwuart[] = {
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{
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.start = 0x41600000,
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.end = 0x4160002F,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_HWUART,
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.end = IRQ_HWUART,
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.flags = IORESOURCE_IRQ,
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}
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};
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struct platform_device pxa_device_hwuart = {
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.name = "pxa2xx-uart",
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.id = 3,
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.resource = pxa_resource_hwuart,
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.num_resources = ARRAY_SIZE(pxa_resource_hwuart),
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};
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void __init pxa_set_hwuart_info(void *info)
251
{
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if (cpu_is_pxa255())
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pxa_register_device(&pxa_device_hwuart, info);
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else
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pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
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}
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static struct resource pxai2c_resources[] = {
259
{
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.start = 0x40301680,
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.end = 0x403016a3,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_I2C,
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.end = IRQ_I2C,
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.flags = IORESOURCE_IRQ,
267
},
268
};
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struct platform_device pxa_device_i2c = {
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.name = "pxa2xx-i2c",
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.id = 0,
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.resource = pxai2c_resources,
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.num_resources = ARRAY_SIZE(pxai2c_resources),
275
};
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void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
278
{
279
pxa_register_device(&pxa_device_i2c, info);
280
}
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#ifdef CONFIG_PXA27x
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static struct resource pxa27x_resources_i2c_power[] = {
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{
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.start = 0x40f00180,
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.end = 0x40f001a3,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PWRI2C,
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.end = IRQ_PWRI2C,
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.flags = IORESOURCE_IRQ,
292
},
293
};
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struct platform_device pxa27x_device_i2c_power = {
296
.name = "pxa2xx-i2c",
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.id = 1,
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.resource = pxa27x_resources_i2c_power,
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.num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
300
};
301
#endif
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static struct resource pxai2s_resources[] = {
304
{
305
.start = 0x40400000,
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.end = 0x40400083,
307
.flags = IORESOURCE_MEM,
308
}, {
309
.start = IRQ_I2S,
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.end = IRQ_I2S,
311
.flags = IORESOURCE_IRQ,
312
},
313
};
314
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struct platform_device pxa_device_i2s = {
316
.name = "pxa2xx-i2s",
317
.id = -1,
318
.resource = pxai2s_resources,
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.num_resources = ARRAY_SIZE(pxai2s_resources),
320
};
321
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struct platform_device pxa_device_asoc_ssp1 = {
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.name = "pxa-ssp-dai",
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.id = 0,
325
};
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struct platform_device pxa_device_asoc_ssp2= {
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.name = "pxa-ssp-dai",
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.id = 1,
330
};
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struct platform_device pxa_device_asoc_ssp3 = {
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.name = "pxa-ssp-dai",
334
.id = 2,
335
};
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struct platform_device pxa_device_asoc_ssp4 = {
338
.name = "pxa-ssp-dai",
339
.id = 3,
340
};
341
342
struct platform_device pxa_device_asoc_platform = {
343
.name = "pxa-pcm-audio",
344
.id = -1,
345
};
346
347
static struct resource pxa_rtc_resources[] = {
348
[0] = {
349
.start = 0x40900000,
350
.end = 0x40900000 + 0x3b,
351
.flags = IORESOURCE_MEM,
352
},
353
[1] = {
354
.start = IRQ_RTC1Hz,
355
.end = IRQ_RTC1Hz,
356
.name = "rtc 1Hz",
357
.flags = IORESOURCE_IRQ,
358
},
359
[2] = {
360
.start = IRQ_RTCAlrm,
361
.end = IRQ_RTCAlrm,
362
.name = "rtc alarm",
363
.flags = IORESOURCE_IRQ,
364
},
365
};
366
367
struct platform_device pxa_device_rtc = {
368
.name = "pxa-rtc",
369
.id = -1,
370
.num_resources = ARRAY_SIZE(pxa_rtc_resources),
371
.resource = pxa_rtc_resources,
372
};
373
374
struct platform_device sa1100_device_rtc = {
375
.name = "sa1100-rtc",
376
.id = -1,
377
.num_resources = ARRAY_SIZE(pxa_rtc_resources),
378
.resource = pxa_rtc_resources,
379
};
380
381
#ifdef CONFIG_PXA25x
382
383
static struct resource pxa25x_resource_pwm0[] = {
384
[0] = {
385
.start = 0x40b00000,
386
.end = 0x40b0000f,
387
.flags = IORESOURCE_MEM,
388
},
389
};
390
391
struct platform_device pxa25x_device_pwm0 = {
392
.name = "pxa25x-pwm",
393
.id = 0,
394
.resource = pxa25x_resource_pwm0,
395
.num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
396
};
397
398
static struct resource pxa25x_resource_pwm1[] = {
399
[0] = {
400
.start = 0x40c00000,
401
.end = 0x40c0000f,
402
.flags = IORESOURCE_MEM,
403
},
404
};
405
406
struct platform_device pxa25x_device_pwm1 = {
407
.name = "pxa25x-pwm",
408
.id = 1,
409
.resource = pxa25x_resource_pwm1,
410
.num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
411
};
412
413
static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
414
415
static struct resource pxa25x_resource_ssp[] = {
416
[0] = {
417
.start = 0x41000000,
418
.end = 0x4100001f,
419
.flags = IORESOURCE_MEM,
420
},
421
[1] = {
422
.start = IRQ_SSP,
423
.end = IRQ_SSP,
424
.flags = IORESOURCE_IRQ,
425
},
426
};
427
428
struct platform_device pxa25x_device_ssp = {
429
.name = "pxa25x-ssp",
430
.id = 0,
431
.dev = {
432
.dma_mask = &pxa25x_ssp_dma_mask,
433
.coherent_dma_mask = DMA_BIT_MASK(32),
434
},
435
.resource = pxa25x_resource_ssp,
436
.num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
437
};
438
439
static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
440
441
static struct resource pxa25x_resource_nssp[] = {
442
[0] = {
443
.start = 0x41400000,
444
.end = 0x4140002f,
445
.flags = IORESOURCE_MEM,
446
},
447
[1] = {
448
.start = IRQ_NSSP,
449
.end = IRQ_NSSP,
450
.flags = IORESOURCE_IRQ,
451
},
452
};
453
454
struct platform_device pxa25x_device_nssp = {
455
.name = "pxa25x-nssp",
456
.id = 1,
457
.dev = {
458
.dma_mask = &pxa25x_nssp_dma_mask,
459
.coherent_dma_mask = DMA_BIT_MASK(32),
460
},
461
.resource = pxa25x_resource_nssp,
462
.num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
463
};
464
465
static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
466
467
static struct resource pxa25x_resource_assp[] = {
468
[0] = {
469
.start = 0x41500000,
470
.end = 0x4150002f,
471
.flags = IORESOURCE_MEM,
472
},
473
[1] = {
474
.start = IRQ_ASSP,
475
.end = IRQ_ASSP,
476
.flags = IORESOURCE_IRQ,
477
},
478
};
479
480
struct platform_device pxa25x_device_assp = {
481
/* ASSP is basically equivalent to NSSP */
482
.name = "pxa25x-nssp",
483
.id = 2,
484
.dev = {
485
.dma_mask = &pxa25x_assp_dma_mask,
486
.coherent_dma_mask = DMA_BIT_MASK(32),
487
},
488
.resource = pxa25x_resource_assp,
489
.num_resources = ARRAY_SIZE(pxa25x_resource_assp),
490
};
491
#endif /* CONFIG_PXA25x */
492
493
#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
494
static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
495
496
static struct resource pxa27x_resource_ohci[] = {
497
[0] = {
498
.start = 0x4C000000,
499
.end = 0x4C00ff6f,
500
.flags = IORESOURCE_MEM,
501
},
502
[1] = {
503
.start = IRQ_USBH1,
504
.end = IRQ_USBH1,
505
.flags = IORESOURCE_IRQ,
506
},
507
};
508
509
struct platform_device pxa27x_device_ohci = {
510
.name = "pxa27x-ohci",
511
.id = -1,
512
.dev = {
513
.dma_mask = &pxa27x_ohci_dma_mask,
514
.coherent_dma_mask = DMA_BIT_MASK(32),
515
},
516
.num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
517
.resource = pxa27x_resource_ohci,
518
};
519
520
void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
521
{
522
pxa_register_device(&pxa27x_device_ohci, info);
523
}
524
#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
525
526
#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
527
static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
528
529
static struct resource pxa27x_resource_ssp1[] = {
530
[0] = {
531
.start = 0x41000000,
532
.end = 0x4100003f,
533
.flags = IORESOURCE_MEM,
534
},
535
[1] = {
536
.start = IRQ_SSP,
537
.end = IRQ_SSP,
538
.flags = IORESOURCE_IRQ,
539
},
540
};
541
542
struct platform_device pxa27x_device_ssp1 = {
543
.name = "pxa27x-ssp",
544
.id = 0,
545
.dev = {
546
.dma_mask = &pxa27x_ssp1_dma_mask,
547
.coherent_dma_mask = DMA_BIT_MASK(32),
548
},
549
.resource = pxa27x_resource_ssp1,
550
.num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
551
};
552
553
static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
554
555
static struct resource pxa27x_resource_ssp2[] = {
556
[0] = {
557
.start = 0x41700000,
558
.end = 0x4170003f,
559
.flags = IORESOURCE_MEM,
560
},
561
[1] = {
562
.start = IRQ_SSP2,
563
.end = IRQ_SSP2,
564
.flags = IORESOURCE_IRQ,
565
},
566
};
567
568
struct platform_device pxa27x_device_ssp2 = {
569
.name = "pxa27x-ssp",
570
.id = 1,
571
.dev = {
572
.dma_mask = &pxa27x_ssp2_dma_mask,
573
.coherent_dma_mask = DMA_BIT_MASK(32),
574
},
575
.resource = pxa27x_resource_ssp2,
576
.num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
577
};
578
579
static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
580
581
static struct resource pxa27x_resource_ssp3[] = {
582
[0] = {
583
.start = 0x41900000,
584
.end = 0x4190003f,
585
.flags = IORESOURCE_MEM,
586
},
587
[1] = {
588
.start = IRQ_SSP3,
589
.end = IRQ_SSP3,
590
.flags = IORESOURCE_IRQ,
591
},
592
};
593
594
struct platform_device pxa27x_device_ssp3 = {
595
.name = "pxa27x-ssp",
596
.id = 2,
597
.dev = {
598
.dma_mask = &pxa27x_ssp3_dma_mask,
599
.coherent_dma_mask = DMA_BIT_MASK(32),
600
},
601
.resource = pxa27x_resource_ssp3,
602
.num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
603
};
604
605
static struct resource pxa27x_resource_pwm0[] = {
606
[0] = {
607
.start = 0x40b00000,
608
.end = 0x40b0001f,
609
.flags = IORESOURCE_MEM,
610
},
611
};
612
613
struct platform_device pxa27x_device_pwm0 = {
614
.name = "pxa27x-pwm",
615
.id = 0,
616
.resource = pxa27x_resource_pwm0,
617
.num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
618
};
619
620
static struct resource pxa27x_resource_pwm1[] = {
621
[0] = {
622
.start = 0x40c00000,
623
.end = 0x40c0001f,
624
.flags = IORESOURCE_MEM,
625
},
626
};
627
628
struct platform_device pxa27x_device_pwm1 = {
629
.name = "pxa27x-pwm",
630
.id = 1,
631
.resource = pxa27x_resource_pwm1,
632
.num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
633
};
634
#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
635
636
#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
637
const struct software_node pxa2xx_gpiochip_node = {
638
.name = "gpio-pxa",
639
};
640
641
struct resource pxa_resource_gpio[] = {
642
{
643
.start = 0x40e00000,
644
.end = 0x40e0ffff,
645
.flags = IORESOURCE_MEM,
646
}, {
647
.start = IRQ_GPIO0,
648
.end = IRQ_GPIO0,
649
.name = "gpio0",
650
.flags = IORESOURCE_IRQ,
651
}, {
652
.start = IRQ_GPIO1,
653
.end = IRQ_GPIO1,
654
.name = "gpio1",
655
.flags = IORESOURCE_IRQ,
656
}, {
657
.start = IRQ_GPIO_2_x,
658
.end = IRQ_GPIO_2_x,
659
.name = "gpio_mux",
660
.flags = IORESOURCE_IRQ,
661
},
662
};
663
664
static struct pxa_gpio_platform_data pxa2xx_gpio_info = {
665
.irq_base = PXA_GPIO_TO_IRQ(0),
666
.gpio_set_wake = gpio_set_wake,
667
};
668
669
struct platform_device pxa25x_device_gpio = {
670
.name = "pxa25x-gpio",
671
.id = -1,
672
.num_resources = ARRAY_SIZE(pxa_resource_gpio),
673
.resource = pxa_resource_gpio,
674
.dev = {
675
.platform_data = &pxa2xx_gpio_info,
676
},
677
};
678
679
struct platform_device pxa27x_device_gpio = {
680
.name = "pxa27x-gpio",
681
.id = -1,
682
.num_resources = ARRAY_SIZE(pxa_resource_gpio),
683
.resource = pxa_resource_gpio,
684
.dev = {
685
.platform_data = &pxa2xx_gpio_info,
686
},
687
};
688
#endif /* CONFIG_PXA25x || CONFIG_PXA27x */
689
690
static struct resource pxa_dma_resource[] = {
691
[0] = {
692
.start = 0x40000000,
693
.end = 0x4000ffff,
694
.flags = IORESOURCE_MEM,
695
},
696
[1] = {
697
.start = IRQ_DMA,
698
.end = IRQ_DMA,
699
.flags = IORESOURCE_IRQ,
700
},
701
};
702
703
static u64 pxadma_dmamask = 0xffffffffUL;
704
705
static struct platform_device pxa2xx_pxa_dma = {
706
.name = "pxa-dma",
707
.id = 0,
708
.dev = {
709
.dma_mask = &pxadma_dmamask,
710
.coherent_dma_mask = 0xffffffff,
711
},
712
.num_resources = ARRAY_SIZE(pxa_dma_resource),
713
.resource = pxa_dma_resource,
714
};
715
716
void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata)
717
{
718
pxa_register_device(&pxa2xx_pxa_dma, dma_pdata);
719
}
720
721
void __init pxa_register_wdt(unsigned int reset_status)
722
{
723
struct resource res = DEFINE_RES_MEM(OST_PHYS, OST_LEN);
724
725
reset_status &= RESET_STATUS_WATCHDOG;
726
platform_device_register_resndata(NULL, "sa1100_wdt", -1, &res, 1,
727
&reset_status, sizeof(reset_status));
728
}
729
730