Path: blob/master/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
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// SPDX-License-Identifier: GPL-2.0 OR MIT /* * Copyright (c) 2024 Yixun Lan <[email protected]> */ #include <dt-bindings/gpio/gpio.h> #define K1_PADCONF(pin, func) (((pin) << 16) | (func)) /* Map GPIO pin to each bank's <index, offset> */ #define K1_GPIO(x) (x / 32) (x % 32) &pinctrl { gmac0_cfg: gmac0-cfg { gmac0-pins { pinmux = <K1_PADCONF(0, 1)>, /* gmac0_rxdv */ <K1_PADCONF(1, 1)>, /* gmac0_rx_d0 */ <K1_PADCONF(2, 1)>, /* gmac0_rx_d1 */ <K1_PADCONF(3, 1)>, /* gmac0_rx_clk */ <K1_PADCONF(4, 1)>, /* gmac0_rx_d2 */ <K1_PADCONF(5, 1)>, /* gmac0_rx_d3 */ <K1_PADCONF(6, 1)>, /* gmac0_tx_d0 */ <K1_PADCONF(7, 1)>, /* gmac0_tx_d1 */ <K1_PADCONF(8, 1)>, /* gmac0_tx */ <K1_PADCONF(9, 1)>, /* gmac0_tx_d2 */ <K1_PADCONF(10, 1)>, /* gmac0_tx_d3 */ <K1_PADCONF(11, 1)>, /* gmac0_tx_en */ <K1_PADCONF(12, 1)>, /* gmac0_mdc */ <K1_PADCONF(13, 1)>, /* gmac0_mdio */ <K1_PADCONF(14, 1)>, /* gmac0_int_n */ <K1_PADCONF(45, 1)>; /* gmac0_clk_ref */ bias-pull-up = <0>; drive-strength = <21>; }; }; gmac1_cfg: gmac1-cfg { gmac1-pins { pinmux = <K1_PADCONF(29, 1)>, /* gmac1_rxdv */ <K1_PADCONF(30, 1)>, /* gmac1_rx_d0 */ <K1_PADCONF(31, 1)>, /* gmac1_rx_d1 */ <K1_PADCONF(32, 1)>, /* gmac1_rx_clk */ <K1_PADCONF(33, 1)>, /* gmac1_rx_d2 */ <K1_PADCONF(34, 1)>, /* gmac1_rx_d3 */ <K1_PADCONF(35, 1)>, /* gmac1_tx_d0 */ <K1_PADCONF(36, 1)>, /* gmac1_tx_d1 */ <K1_PADCONF(37, 1)>, /* gmac1_tx */ <K1_PADCONF(38, 1)>, /* gmac1_tx_d2 */ <K1_PADCONF(39, 1)>, /* gmac1_tx_d3 */ <K1_PADCONF(40, 1)>, /* gmac1_tx_en */ <K1_PADCONF(41, 1)>, /* gmac1_mdc */ <K1_PADCONF(42, 1)>, /* gmac1_mdio */ <K1_PADCONF(43, 1)>, /* gmac1_int_n */ <K1_PADCONF(46, 1)>; /* gmac1_clk_ref */ bias-pull-up = <0>; drive-strength = <21>; }; }; uart0_2_cfg: uart0-2-cfg { uart0-2-pins { pinmux = <K1_PADCONF(68, 2)>, <K1_PADCONF(69, 2)>; bias-pull-up = <0>; drive-strength = <32>; }; }; pwm14_1_cfg: pwm14-1-cfg { pwm14-1-pins { pinmux = <K1_PADCONF(44, 4)>; bias-pull-up = <0>; drive-strength = <32>; }; }; };