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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/drivers/char/hw_random/iproc-rng200.c
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2015 Broadcom Corporation
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*
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*/
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/*
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* DESCRIPTION: The Broadcom iProc RNG200 Driver
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*/
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#include <linux/hw_random.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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/* Registers */
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#define RNG_CTRL_OFFSET 0x00
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#define RNG_CTRL_RNG_RBGEN_MASK 0x00001FFF
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#define RNG_CTRL_RNG_RBGEN_ENABLE 0x00000001
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#define RNG_SOFT_RESET_OFFSET 0x04
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#define RNG_SOFT_RESET 0x00000001
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#define RBG_SOFT_RESET_OFFSET 0x08
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#define RBG_SOFT_RESET 0x00000001
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#define RNG_INT_STATUS_OFFSET 0x18
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#define RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK 0x80000000
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#define RNG_INT_STATUS_STARTUP_TRANSITIONS_MET_IRQ_MASK 0x00020000
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#define RNG_INT_STATUS_NIST_FAIL_IRQ_MASK 0x00000020
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#define RNG_INT_STATUS_TOTAL_BITS_COUNT_IRQ_MASK 0x00000001
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#define RNG_FIFO_DATA_OFFSET 0x20
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#define RNG_FIFO_COUNT_OFFSET 0x24
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#define RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK 0x000000FF
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struct iproc_rng200_dev {
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struct hwrng rng;
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void __iomem *base;
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};
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#define to_rng_priv(rng) container_of(rng, struct iproc_rng200_dev, rng)
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static void iproc_rng200_enable_set(void __iomem *rng_base, bool enable)
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{
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u32 val;
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val = ioread32(rng_base + RNG_CTRL_OFFSET);
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val &= ~RNG_CTRL_RNG_RBGEN_MASK;
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if (enable)
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val |= RNG_CTRL_RNG_RBGEN_ENABLE;
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iowrite32(val, rng_base + RNG_CTRL_OFFSET);
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}
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static void iproc_rng200_restart(void __iomem *rng_base)
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{
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uint32_t val;
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iproc_rng200_enable_set(rng_base, false);
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/* Clear all interrupt status */
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iowrite32(0xFFFFFFFFUL, rng_base + RNG_INT_STATUS_OFFSET);
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/* Reset RNG and RBG */
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val = ioread32(rng_base + RBG_SOFT_RESET_OFFSET);
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val |= RBG_SOFT_RESET;
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iowrite32(val, rng_base + RBG_SOFT_RESET_OFFSET);
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val = ioread32(rng_base + RNG_SOFT_RESET_OFFSET);
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val |= RNG_SOFT_RESET;
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iowrite32(val, rng_base + RNG_SOFT_RESET_OFFSET);
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val = ioread32(rng_base + RNG_SOFT_RESET_OFFSET);
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val &= ~RNG_SOFT_RESET;
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iowrite32(val, rng_base + RNG_SOFT_RESET_OFFSET);
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val = ioread32(rng_base + RBG_SOFT_RESET_OFFSET);
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val &= ~RBG_SOFT_RESET;
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iowrite32(val, rng_base + RBG_SOFT_RESET_OFFSET);
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iproc_rng200_enable_set(rng_base, true);
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}
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static int iproc_rng200_read(struct hwrng *rng, void *buf, size_t max,
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bool wait)
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{
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struct iproc_rng200_dev *priv = to_rng_priv(rng);
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uint32_t num_remaining = max;
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uint32_t status;
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#define MAX_RESETS_PER_READ 1
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uint32_t num_resets = 0;
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#define MAX_IDLE_TIME (1 * HZ)
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unsigned long idle_endtime = jiffies + MAX_IDLE_TIME;
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while ((num_remaining > 0) && time_before(jiffies, idle_endtime)) {
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/* Is RNG sane? If not, reset it. */
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status = ioread32(priv->base + RNG_INT_STATUS_OFFSET);
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if ((status & (RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK |
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RNG_INT_STATUS_NIST_FAIL_IRQ_MASK)) != 0) {
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if (num_resets >= MAX_RESETS_PER_READ)
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return max - num_remaining;
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iproc_rng200_restart(priv->base);
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num_resets++;
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}
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/* Are there any random numbers available? */
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if ((ioread32(priv->base + RNG_FIFO_COUNT_OFFSET) &
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RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK) > 0) {
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if (num_remaining >= sizeof(uint32_t)) {
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/* Buffer has room to store entire word */
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*(uint32_t *)buf = ioread32(priv->base +
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RNG_FIFO_DATA_OFFSET);
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buf += sizeof(uint32_t);
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num_remaining -= sizeof(uint32_t);
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} else {
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/* Buffer can only store partial word */
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uint32_t rnd_number = ioread32(priv->base +
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RNG_FIFO_DATA_OFFSET);
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memcpy(buf, &rnd_number, num_remaining);
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buf += num_remaining;
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num_remaining = 0;
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}
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/* Reset the IDLE timeout */
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idle_endtime = jiffies + MAX_IDLE_TIME;
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} else {
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if (!wait)
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/* Cannot wait, return immediately */
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return max - num_remaining;
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/* Can wait, give others chance to run */
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usleep_range(min(num_remaining * 10, 500U), 500);
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}
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}
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return max - num_remaining;
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}
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static int iproc_rng200_init(struct hwrng *rng)
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{
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struct iproc_rng200_dev *priv = to_rng_priv(rng);
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iproc_rng200_enable_set(priv->base, true);
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return 0;
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}
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static void iproc_rng200_cleanup(struct hwrng *rng)
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{
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struct iproc_rng200_dev *priv = to_rng_priv(rng);
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iproc_rng200_enable_set(priv->base, false);
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}
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static int iproc_rng200_probe(struct platform_device *pdev)
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{
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struct iproc_rng200_dev *priv;
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struct device *dev = &pdev->dev;
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int ret;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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/* Map peripheral */
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priv->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(priv->base)) {
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dev_err(dev, "failed to remap rng regs\n");
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return PTR_ERR(priv->base);
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}
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dev_set_drvdata(dev, priv);
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priv->rng.name = "iproc-rng200";
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priv->rng.read = iproc_rng200_read;
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priv->rng.init = iproc_rng200_init;
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priv->rng.cleanup = iproc_rng200_cleanup;
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/* Register driver */
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ret = devm_hwrng_register(dev, &priv->rng);
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if (ret) {
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dev_err(dev, "hwrng registration failed\n");
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return ret;
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}
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dev_info(dev, "hwrng registered\n");
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return 0;
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}
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static int __maybe_unused iproc_rng200_suspend(struct device *dev)
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{
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struct iproc_rng200_dev *priv = dev_get_drvdata(dev);
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iproc_rng200_cleanup(&priv->rng);
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return 0;
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}
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static int __maybe_unused iproc_rng200_resume(struct device *dev)
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{
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struct iproc_rng200_dev *priv = dev_get_drvdata(dev);
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iproc_rng200_init(&priv->rng);
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return 0;
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}
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static const struct dev_pm_ops iproc_rng200_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(iproc_rng200_suspend, iproc_rng200_resume)
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};
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static const struct of_device_id iproc_rng200_of_match[] = {
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{ .compatible = "brcm,bcm2711-rng200", },
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{ .compatible = "brcm,bcm7211-rng200", },
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{ .compatible = "brcm,bcm7278-rng200", },
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{ .compatible = "brcm,iproc-rng200", },
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{},
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};
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MODULE_DEVICE_TABLE(of, iproc_rng200_of_match);
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static struct platform_driver iproc_rng200_driver = {
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.driver = {
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.name = "iproc-rng200",
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.of_match_table = iproc_rng200_of_match,
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.pm = &iproc_rng200_pm_ops,
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},
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.probe = iproc_rng200_probe,
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};
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module_platform_driver(iproc_rng200_driver);
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MODULE_AUTHOR("Broadcom");
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MODULE_DESCRIPTION("iProc RNG200 Random Number Generator driver");
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MODULE_LICENSE("GPL v2");
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