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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/drivers/crypto/intel/qat/qat_420xx/adf_drv.c
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// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright(c) 2023 Intel Corporation */
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <adf_accel_devices.h>
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#include <adf_gen4_hw_data.h>
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#include <adf_gen4_config.h>
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#include <adf_cfg.h>
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#include <adf_common_drv.h>
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#include <adf_dbgfs.h>
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#include "adf_420xx_hw_data.h"
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static const struct pci_device_id adf_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QAT_420XX) },
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{ }
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};
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MODULE_DEVICE_TABLE(pci, adf_pci_tbl);
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static void adf_cleanup_accel(struct adf_accel_dev *accel_dev)
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{
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if (accel_dev->hw_device) {
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adf_clean_hw_data_420xx(accel_dev->hw_device);
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accel_dev->hw_device = NULL;
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}
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adf_dbgfs_exit(accel_dev);
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adf_cfg_dev_remove(accel_dev);
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adf_devmgr_rm_dev(accel_dev, NULL);
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}
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static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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struct adf_accel_dev *accel_dev;
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struct adf_accel_pci *accel_pci_dev;
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struct adf_hw_device_data *hw_data;
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unsigned int i, bar_nr;
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unsigned long bar_mask;
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struct adf_bar *bar;
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int ret;
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if (num_possible_nodes() > 1 && dev_to_node(&pdev->dev) < 0) {
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/*
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* If the accelerator is connected to a node with no memory
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* there is no point in using the accelerator since the remote
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* memory transaction will be very slow.
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*/
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dev_err(&pdev->dev, "Invalid NUMA configuration.\n");
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return -EINVAL;
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}
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accel_dev = devm_kzalloc(&pdev->dev, sizeof(*accel_dev), GFP_KERNEL);
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if (!accel_dev)
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return -ENOMEM;
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INIT_LIST_HEAD(&accel_dev->crypto_list);
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accel_pci_dev = &accel_dev->accel_pci_dev;
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accel_pci_dev->pci_dev = pdev;
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/*
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* Add accel device to accel table
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* This should be called before adf_cleanup_accel is called
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*/
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if (adf_devmgr_add_dev(accel_dev, NULL)) {
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dev_err(&pdev->dev, "Failed to add new accelerator device.\n");
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return -EFAULT;
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}
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accel_dev->owner = THIS_MODULE;
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/* Allocate and initialise device hardware meta-data structure */
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hw_data = devm_kzalloc(&pdev->dev, sizeof(*hw_data), GFP_KERNEL);
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if (!hw_data) {
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ret = -ENOMEM;
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goto out_err;
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}
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accel_dev->hw_device = hw_data;
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adf_init_hw_data_420xx(accel_dev->hw_device, ent->device);
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pci_read_config_byte(pdev, PCI_REVISION_ID, &accel_pci_dev->revid);
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pci_read_config_dword(pdev, ADF_GEN4_FUSECTL4_OFFSET, &hw_data->fuses[ADF_FUSECTL4]);
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/* Get Accelerators and Accelerators Engines masks */
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hw_data->accel_mask = hw_data->get_accel_mask(hw_data);
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hw_data->ae_mask = hw_data->get_ae_mask(hw_data);
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accel_pci_dev->sku = hw_data->get_sku(hw_data);
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/* If the device has no acceleration engines then ignore it */
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if (!hw_data->accel_mask || !hw_data->ae_mask ||
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(~hw_data->ae_mask & 0x01)) {
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dev_err(&pdev->dev, "No acceleration units found.\n");
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ret = -EFAULT;
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goto out_err;
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}
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/* Create device configuration table */
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ret = adf_cfg_dev_add(accel_dev);
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if (ret)
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goto out_err;
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/* Enable PCI device */
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ret = pcim_enable_device(pdev);
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if (ret) {
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dev_err(&pdev->dev, "Can't enable PCI device.\n");
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goto out_err;
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}
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/* Set DMA identifier */
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ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
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if (ret) {
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dev_err(&pdev->dev, "No usable DMA configuration.\n");
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goto out_err;
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}
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ret = adf_gen4_cfg_dev_init(accel_dev);
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if (ret) {
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dev_err(&pdev->dev, "Failed to initialize configuration.\n");
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goto out_err;
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}
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/* Get accelerator capabilities mask */
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hw_data->accel_capabilities_mask = hw_data->get_accel_cap(accel_dev);
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if (!hw_data->accel_capabilities_mask) {
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dev_err(&pdev->dev, "Failed to get capabilities mask.\n");
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ret = -EINVAL;
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goto out_err;
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}
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/* Find and map all the device's BARS */
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bar_mask = pci_select_bars(pdev, IORESOURCE_MEM) & ADF_GEN4_BAR_MASK;
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ret = pcim_request_all_regions(pdev, pci_name(pdev));
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if (ret) {
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dev_err(&pdev->dev, "Failed to request PCI regions.\n");
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goto out_err;
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}
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i = 0;
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for_each_set_bit(bar_nr, &bar_mask, PCI_STD_NUM_BARS) {
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bar = &accel_pci_dev->pci_bars[i++];
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bar->virt_addr = pcim_iomap(pdev, bar_nr, 0);
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if (!bar->virt_addr) {
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dev_err(&pdev->dev, "Failed to ioremap PCI region.\n");
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ret = -ENOMEM;
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goto out_err;
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}
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}
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pci_set_master(pdev);
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if (pci_save_state(pdev)) {
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dev_err(&pdev->dev, "Failed to save pci state.\n");
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ret = -ENOMEM;
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goto out_err;
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}
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accel_dev->ras_errors.enabled = true;
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adf_dbgfs_init(accel_dev);
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ret = adf_dev_up(accel_dev, true);
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if (ret)
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goto out_err_dev_stop;
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ret = adf_sysfs_init(accel_dev);
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if (ret)
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goto out_err_dev_stop;
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return ret;
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out_err_dev_stop:
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adf_dev_down(accel_dev);
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out_err:
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adf_cleanup_accel(accel_dev);
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return ret;
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}
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static void adf_remove(struct pci_dev *pdev)
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{
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struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);
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if (!accel_dev) {
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pr_err("QAT: Driver removal failed\n");
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return;
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}
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adf_dev_down(accel_dev);
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adf_cleanup_accel(accel_dev);
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}
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static void adf_shutdown(struct pci_dev *pdev)
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{
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struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);
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adf_dev_down(accel_dev);
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}
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static struct pci_driver adf_driver = {
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.id_table = adf_pci_tbl,
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.name = ADF_420XX_DEVICE_NAME,
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.probe = adf_probe,
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.remove = adf_remove,
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.shutdown = adf_shutdown,
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.sriov_configure = adf_sriov_configure,
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.err_handler = &adf_err_handler,
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};
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module_pci_driver(adf_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Intel");
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MODULE_FIRMWARE(ADF_420XX_FW);
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MODULE_FIRMWARE(ADF_420XX_MMP);
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MODULE_DESCRIPTION("Intel(R) QuickAssist Technology");
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MODULE_VERSION(ADF_DRV_VERSION);
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MODULE_SOFTDEP("pre: crypto-intel_qat");
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MODULE_IMPORT_NS("CRYPTO_QAT");
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