Path: blob/master/drivers/firmware/tegra/bpmp-tegra186.c
29278 views
// SPDX-License-Identifier: GPL-2.01/*2* Copyright (c) 2018, NVIDIA CORPORATION.3*/45#include <linux/genalloc.h>6#include <linux/io.h>7#include <linux/mailbox_client.h>8#include <linux/of_reserved_mem.h>9#include <linux/platform_device.h>1011#include <soc/tegra/bpmp.h>12#include <soc/tegra/bpmp-abi.h>13#include <soc/tegra/ivc.h>1415#include "bpmp-private.h"1617struct tegra186_bpmp {18struct tegra_bpmp *parent;1920struct {21struct gen_pool *pool;22union {23void __iomem *sram;24void *dram;25};26dma_addr_t phys;27} tx, rx;2829struct {30struct mbox_client client;31struct mbox_chan *channel;32} mbox;33};3435static inline struct tegra_bpmp *36mbox_client_to_bpmp(struct mbox_client *client)37{38struct tegra186_bpmp *priv;3940priv = container_of(client, struct tegra186_bpmp, mbox.client);4142return priv->parent;43}4445static bool tegra186_bpmp_is_message_ready(struct tegra_bpmp_channel *channel)46{47int err;4849err = tegra_ivc_read_get_next_frame(channel->ivc, &channel->ib);50if (err) {51iosys_map_clear(&channel->ib);52return false;53}5455return true;56}5758static bool tegra186_bpmp_is_channel_free(struct tegra_bpmp_channel *channel)59{60int err;6162err = tegra_ivc_write_get_next_frame(channel->ivc, &channel->ob);63if (err) {64iosys_map_clear(&channel->ob);65return false;66}6768return true;69}7071static int tegra186_bpmp_ack_message(struct tegra_bpmp_channel *channel)72{73return tegra_ivc_read_advance(channel->ivc);74}7576static int tegra186_bpmp_post_message(struct tegra_bpmp_channel *channel)77{78return tegra_ivc_write_advance(channel->ivc);79}8081static int tegra186_bpmp_ring_doorbell(struct tegra_bpmp *bpmp)82{83struct tegra186_bpmp *priv = bpmp->priv;84int err;8586err = mbox_send_message(priv->mbox.channel, NULL);87if (err < 0)88return err;8990mbox_client_txdone(priv->mbox.channel, 0);9192return 0;93}9495static void tegra186_bpmp_ivc_notify(struct tegra_ivc *ivc, void *data)96{97struct tegra_bpmp *bpmp = data;98struct tegra186_bpmp *priv = bpmp->priv;99100if (WARN_ON(priv->mbox.channel == NULL))101return;102103tegra186_bpmp_ring_doorbell(bpmp);104}105106static int tegra186_bpmp_channel_init(struct tegra_bpmp_channel *channel,107struct tegra_bpmp *bpmp,108unsigned int index)109{110struct tegra186_bpmp *priv = bpmp->priv;111size_t message_size, queue_size;112struct iosys_map rx, tx;113unsigned int offset;114int err;115116channel->ivc = devm_kzalloc(bpmp->dev, sizeof(*channel->ivc),117GFP_KERNEL);118if (!channel->ivc)119return -ENOMEM;120121message_size = tegra_ivc_align(MSG_MIN_SZ);122queue_size = tegra_ivc_total_queue_size(message_size);123offset = queue_size * index;124125if (priv->rx.pool) {126iosys_map_set_vaddr_iomem(&rx, priv->rx.sram + offset);127iosys_map_set_vaddr_iomem(&tx, priv->tx.sram + offset);128} else {129iosys_map_set_vaddr(&rx, priv->rx.dram + offset);130iosys_map_set_vaddr(&tx, priv->tx.dram + offset);131}132133err = tegra_ivc_init(channel->ivc, NULL, &rx, priv->rx.phys + offset, &tx,134priv->tx.phys + offset, 1, message_size, tegra186_bpmp_ivc_notify,135bpmp);136if (err < 0) {137dev_err(bpmp->dev, "failed to setup IVC for channel %u: %d\n",138index, err);139return err;140}141142init_completion(&channel->completion);143channel->bpmp = bpmp;144145return 0;146}147148static void tegra186_bpmp_channel_reset(struct tegra_bpmp_channel *channel)149{150/* reset the channel state */151tegra_ivc_reset(channel->ivc);152153/* sync the channel state with BPMP */154while (tegra_ivc_notified(channel->ivc))155;156}157158static void tegra186_bpmp_channel_cleanup(struct tegra_bpmp_channel *channel)159{160tegra_ivc_cleanup(channel->ivc);161}162163static void mbox_handle_rx(struct mbox_client *client, void *data)164{165struct tegra_bpmp *bpmp = mbox_client_to_bpmp(client);166167tegra_bpmp_handle_rx(bpmp);168}169170static void tegra186_bpmp_teardown_channels(struct tegra_bpmp *bpmp)171{172struct tegra186_bpmp *priv = bpmp->priv;173unsigned int i;174175for (i = 0; i < bpmp->threaded.count; i++) {176if (!bpmp->threaded_channels[i].bpmp)177continue;178179tegra186_bpmp_channel_cleanup(&bpmp->threaded_channels[i]);180}181182tegra186_bpmp_channel_cleanup(bpmp->rx_channel);183tegra186_bpmp_channel_cleanup(bpmp->tx_channel);184185if (priv->tx.pool) {186gen_pool_free(priv->tx.pool, (unsigned long)priv->tx.sram, 4096);187gen_pool_free(priv->rx.pool, (unsigned long)priv->rx.sram, 4096);188}189}190191static int tegra186_bpmp_dram_init(struct tegra_bpmp *bpmp)192{193struct tegra186_bpmp *priv = bpmp->priv;194struct resource res;195size_t size;196int err;197198err = of_reserved_mem_region_to_resource(bpmp->dev->of_node, 0, &res);199if (err < 0) {200if (err != -ENODEV)201dev_warn(bpmp->dev,202"failed to parse memory region: %d\n", err);203204return err;205}206207size = resource_size(&res);208209if (size < SZ_8K) {210dev_warn(bpmp->dev, "DRAM region must be larger than 8 KiB\n");211return -EINVAL;212}213214priv->tx.phys = res.start;215priv->rx.phys = res.start + SZ_4K;216217priv->tx.dram = devm_memremap(bpmp->dev, priv->tx.phys, size,218MEMREMAP_WC);219if (IS_ERR(priv->tx.dram)) {220err = PTR_ERR(priv->tx.dram);221dev_warn(bpmp->dev, "failed to map DRAM region: %d\n", err);222return err;223}224225priv->rx.dram = priv->tx.dram + SZ_4K;226227return 0;228}229230static int tegra186_bpmp_sram_init(struct tegra_bpmp *bpmp)231{232struct tegra186_bpmp *priv = bpmp->priv;233int err;234235priv->tx.pool = of_gen_pool_get(bpmp->dev->of_node, "shmem", 0);236if (!priv->tx.pool) {237dev_err(bpmp->dev, "TX shmem pool not found\n");238return -EPROBE_DEFER;239}240241priv->tx.sram = (void __iomem *)gen_pool_dma_alloc(priv->tx.pool, 4096,242&priv->tx.phys);243if (!priv->tx.sram) {244dev_err(bpmp->dev, "failed to allocate from TX pool\n");245return -ENOMEM;246}247248priv->rx.pool = of_gen_pool_get(bpmp->dev->of_node, "shmem", 1);249if (!priv->rx.pool) {250dev_err(bpmp->dev, "RX shmem pool not found\n");251err = -EPROBE_DEFER;252goto free_tx;253}254255priv->rx.sram = (void __iomem *)gen_pool_dma_alloc(priv->rx.pool, 4096,256&priv->rx.phys);257if (!priv->rx.sram) {258dev_err(bpmp->dev, "failed to allocate from RX pool\n");259err = -ENOMEM;260goto free_tx;261}262263return 0;264265free_tx:266gen_pool_free(priv->tx.pool, (unsigned long)priv->tx.sram, 4096);267268return err;269}270271static int tegra186_bpmp_setup_channels(struct tegra_bpmp *bpmp)272{273unsigned int i;274int err;275276err = tegra186_bpmp_dram_init(bpmp);277if (err == -ENODEV) {278err = tegra186_bpmp_sram_init(bpmp);279if (err < 0)280return err;281}282283err = tegra186_bpmp_channel_init(bpmp->tx_channel, bpmp,284bpmp->soc->channels.cpu_tx.offset);285if (err < 0)286return err;287288err = tegra186_bpmp_channel_init(bpmp->rx_channel, bpmp,289bpmp->soc->channels.cpu_rx.offset);290if (err < 0) {291tegra186_bpmp_channel_cleanup(bpmp->tx_channel);292return err;293}294295for (i = 0; i < bpmp->threaded.count; i++) {296unsigned int index = bpmp->soc->channels.thread.offset + i;297298err = tegra186_bpmp_channel_init(&bpmp->threaded_channels[i],299bpmp, index);300if (err < 0)301break;302}303304if (err < 0)305tegra186_bpmp_teardown_channels(bpmp);306307return err;308}309310static void tegra186_bpmp_reset_channels(struct tegra_bpmp *bpmp)311{312unsigned int i;313314/* reset message channels */315tegra186_bpmp_channel_reset(bpmp->tx_channel);316tegra186_bpmp_channel_reset(bpmp->rx_channel);317318for (i = 0; i < bpmp->threaded.count; i++)319tegra186_bpmp_channel_reset(&bpmp->threaded_channels[i]);320}321322static int tegra186_bpmp_init(struct tegra_bpmp *bpmp)323{324struct tegra186_bpmp *priv;325int err;326327priv = devm_kzalloc(bpmp->dev, sizeof(*priv), GFP_KERNEL);328if (!priv)329return -ENOMEM;330331priv->parent = bpmp;332bpmp->priv = priv;333334err = tegra186_bpmp_setup_channels(bpmp);335if (err < 0)336return err;337338/* mbox registration */339priv->mbox.client.dev = bpmp->dev;340priv->mbox.client.rx_callback = mbox_handle_rx;341priv->mbox.client.tx_block = false;342priv->mbox.client.knows_txdone = false;343344priv->mbox.channel = mbox_request_channel(&priv->mbox.client, 0);345if (IS_ERR(priv->mbox.channel)) {346err = PTR_ERR(priv->mbox.channel);347dev_err(bpmp->dev, "failed to get HSP mailbox: %d\n", err);348tegra186_bpmp_teardown_channels(bpmp);349return err;350}351352tegra186_bpmp_reset_channels(bpmp);353354return 0;355}356357static void tegra186_bpmp_deinit(struct tegra_bpmp *bpmp)358{359struct tegra186_bpmp *priv = bpmp->priv;360361mbox_free_channel(priv->mbox.channel);362363tegra186_bpmp_teardown_channels(bpmp);364}365366static int tegra186_bpmp_resume(struct tegra_bpmp *bpmp)367{368tegra186_bpmp_reset_channels(bpmp);369370return 0;371}372373const struct tegra_bpmp_ops tegra186_bpmp_ops = {374.init = tegra186_bpmp_init,375.deinit = tegra186_bpmp_deinit,376.is_response_ready = tegra186_bpmp_is_message_ready,377.is_request_ready = tegra186_bpmp_is_message_ready,378.ack_response = tegra186_bpmp_ack_message,379.ack_request = tegra186_bpmp_ack_message,380.is_response_channel_free = tegra186_bpmp_is_channel_free,381.is_request_channel_free = tegra186_bpmp_is_channel_free,382.post_response = tegra186_bpmp_post_message,383.post_request = tegra186_bpmp_post_message,384.ring_doorbell = tegra186_bpmp_ring_doorbell,385.resume = tegra186_bpmp_resume,386};387388389