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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
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/*
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* Copyright 2019 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef _DMUB_SRV_H_
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#define _DMUB_SRV_H_
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/**
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* DOC: DMUB interface and operation
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*
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* DMUB is the interface to the display DMCUB microcontroller on DCN hardware.
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* It delegates hardware initialization and command submission to the
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* microcontroller. DMUB is the shortname for DMCUB.
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*
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* This interface is not thread-safe. Ensure that all access to the interface
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* is properly synchronized by the caller.
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*
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* Initialization and usage of the DMUB service should be done in the
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* steps given below:
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*
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* 1. dmub_srv_create()
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* 2. dmub_srv_has_hw_support()
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* 3. dmub_srv_calc_region_info()
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* 4. dmub_srv_hw_init()
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*
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* The call to dmub_srv_create() is required to use the server.
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*
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* The calls to dmub_srv_has_hw_support() and dmub_srv_calc_region_info()
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* are helpers to query cache window size and allocate framebuffer(s)
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* for the cache windows.
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*
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* The call to dmub_srv_hw_init() programs the DMCUB registers to prepare
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* for command submission. Commands can be queued via dmub_srv_fb_cmd_queue()
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* and executed via dmub_srv_fb_cmd_execute().
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*
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* If the queue is full the dmub_srv_wait_for_idle() call can be used to
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* wait until the queue has been cleared.
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*
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* Destroying the DMUB service can be done by calling dmub_srv_destroy().
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* This does not clear DMUB hardware state, only software state.
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*
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* The interface is intended to be standalone and should not depend on any
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* other component within DAL.
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*/
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#include "inc/dmub_cmd.h"
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#include "dc/dc_types.h"
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#define DMUB_PC_SNAPSHOT_COUNT 10
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/* Default tracebuffer size if meta is absent. */
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#define DMUB_TRACE_BUFFER_SIZE (64 * 1024)
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/* Forward declarations */
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struct dmub_srv;
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struct dmub_srv_common_regs;
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struct dmub_srv_dcn31_regs;
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struct dmcub_trace_buf_entry;
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/* enum dmub_window_memory_type - memory location type specification for windows */
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enum dmub_window_memory_type {
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DMUB_WINDOW_MEMORY_TYPE_FB = 0,
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DMUB_WINDOW_MEMORY_TYPE_GART
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};
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/* enum dmub_status - return code for dmcub functions */
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enum dmub_status {
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DMUB_STATUS_OK = 0,
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DMUB_STATUS_NO_CTX,
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DMUB_STATUS_QUEUE_FULL,
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DMUB_STATUS_TIMEOUT,
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DMUB_STATUS_INVALID,
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DMUB_STATUS_HW_FAILURE,
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DMUB_STATUS_POWER_STATE_D3
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};
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/* enum dmub_asic - dmub asic identifier */
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enum dmub_asic {
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DMUB_ASIC_NONE = 0,
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DMUB_ASIC_DCN20,
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DMUB_ASIC_DCN21,
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DMUB_ASIC_DCN30,
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DMUB_ASIC_DCN301,
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DMUB_ASIC_DCN302,
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DMUB_ASIC_DCN303,
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DMUB_ASIC_DCN31,
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DMUB_ASIC_DCN31B,
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DMUB_ASIC_DCN314,
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DMUB_ASIC_DCN315,
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DMUB_ASIC_DCN316,
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DMUB_ASIC_DCN32,
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DMUB_ASIC_DCN321,
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DMUB_ASIC_DCN35,
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DMUB_ASIC_DCN351,
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DMUB_ASIC_DCN36,
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DMUB_ASIC_DCN401,
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DMUB_ASIC_MAX,
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};
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/* enum dmub_window_id - dmub window identifier */
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enum dmub_window_id {
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DMUB_WINDOW_0_INST_CONST = 0,
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DMUB_WINDOW_1_STACK,
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DMUB_WINDOW_2_BSS_DATA,
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DMUB_WINDOW_3_VBIOS,
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DMUB_WINDOW_4_MAILBOX,
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DMUB_WINDOW_5_TRACEBUFF,
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DMUB_WINDOW_6_FW_STATE,
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DMUB_WINDOW_7_SCRATCH_MEM,
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DMUB_WINDOW_IB_MEM,
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DMUB_WINDOW_SHARED_STATE,
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DMUB_WINDOW_LSDMA_BUFFER,
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DMUB_WINDOW_TOTAL,
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};
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/* enum dmub_notification_type - dmub outbox notification identifier */
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enum dmub_notification_type {
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DMUB_NOTIFICATION_NO_DATA = 0,
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DMUB_NOTIFICATION_AUX_REPLY,
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DMUB_NOTIFICATION_HPD,
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DMUB_NOTIFICATION_HPD_IRQ,
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DMUB_NOTIFICATION_SET_CONFIG_REPLY,
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DMUB_NOTIFICATION_DPIA_NOTIFICATION,
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DMUB_NOTIFICATION_HPD_SENSE_NOTIFY,
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DMUB_NOTIFICATION_FUSED_IO,
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DMUB_NOTIFICATION_MAX
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};
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/**
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* DPIA NOTIFICATION Response Type
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*/
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enum dpia_notify_bw_alloc_status {
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DPIA_BW_REQ_FAILED = 0,
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DPIA_BW_REQ_SUCCESS,
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DPIA_EST_BW_CHANGED,
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DPIA_BW_ALLOC_CAPS_CHANGED
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};
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/* enum dmub_memory_access_type - memory access method */
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enum dmub_memory_access_type {
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DMUB_MEMORY_ACCESS_DEFAULT,
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DMUB_MEMORY_ACCESS_CPU = DMUB_MEMORY_ACCESS_DEFAULT,
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DMUB_MEMORY_ACCESS_DMA
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};
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/* enum dmub_power_state type - to track DC power state in dmub_srv */
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enum dmub_srv_power_state_type {
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DMUB_POWER_STATE_UNDEFINED = 0,
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DMUB_POWER_STATE_D0 = 1,
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DMUB_POWER_STATE_D3 = 8
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};
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/* enum dmub_inbox_cmd_interface type - defines default interface for host->dmub commands */
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enum dmub_inbox_cmd_interface_type {
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DMUB_CMD_INTERFACE_DEFAULT = 0,
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DMUB_CMD_INTERFACE_FB = 1,
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DMUB_CMD_INTERFACE_REG = 2,
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};
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/**
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* struct dmub_region - dmub hw memory region
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* @base: base address for region, must be 256 byte aligned
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* @top: top address for region
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*/
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struct dmub_region {
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uint32_t base;
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uint32_t top;
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};
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/**
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* struct dmub_window - dmub hw cache window
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* @off: offset to the fb memory in gpu address space
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* @r: region in uc address space for cache window
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*/
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struct dmub_window {
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union dmub_addr offset;
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struct dmub_region region;
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};
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/**
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* struct dmub_fb - defines a dmub framebuffer memory region
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* @cpu_addr: cpu virtual address for the region, NULL if invalid
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* @gpu_addr: gpu virtual address for the region, NULL if invalid
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* @size: size of the region in bytes, zero if invalid
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*/
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struct dmub_fb {
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void *cpu_addr;
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uint64_t gpu_addr;
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uint32_t size;
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};
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/**
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* struct dmub_srv_region_params - params used for calculating dmub regions
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* @inst_const_size: size of the fw inst const section
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* @bss_data_size: size of the fw bss data section
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* @vbios_size: size of the vbios data
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* @fw_bss_data: raw firmware bss data section
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*/
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struct dmub_srv_region_params {
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uint32_t inst_const_size;
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uint32_t bss_data_size;
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uint32_t vbios_size;
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const uint8_t *fw_inst_const;
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const uint8_t *fw_bss_data;
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const enum dmub_window_memory_type *window_memory_type;
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};
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/**
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* struct dmub_srv_region_info - output region info from the dmub service
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* @fb_size: required minimum fb size for all regions, aligned to 4096 bytes
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* @num_regions: number of regions used by the dmub service
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* @regions: region info
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*
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* The regions are aligned such that they can be all placed within the
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* same framebuffer but they can also be placed into different framebuffers.
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*
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* The size of each region can be calculated by the caller:
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* size = reg.top - reg.base
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*
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* Care must be taken when performing custom allocations to ensure that each
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* region base address is 256 byte aligned.
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*/
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struct dmub_srv_region_info {
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uint32_t fb_size;
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uint32_t gart_size;
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uint8_t num_regions;
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struct dmub_region regions[DMUB_WINDOW_TOTAL];
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};
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/**
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* struct dmub_srv_memory_params - parameters used for driver fb setup
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* @region_info: region info calculated by dmub service
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* @cpu_fb_addr: base cpu address for the framebuffer
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* @cpu_inbox_addr: base cpu address for the gart
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* @gpu_fb_addr: base gpu virtual address for the framebuffer
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* @gpu_inbox_addr: base gpu virtual address for the gart
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*/
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struct dmub_srv_memory_params {
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const struct dmub_srv_region_info *region_info;
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void *cpu_fb_addr;
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void *cpu_gart_addr;
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uint64_t gpu_fb_addr;
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uint64_t gpu_gart_addr;
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const enum dmub_window_memory_type *window_memory_type;
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};
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/**
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* struct dmub_srv_fb_info - output fb info from the dmub service
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* @num_fbs: number of required dmub framebuffers
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* @fbs: fb data for each region
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*
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* Output from the dmub service helper that can be used by the
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* driver to prepare dmub_fb that can be passed into the dmub
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* hw init service.
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*
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* Assumes that all regions are within the same framebuffer
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* and have been setup according to the region_info generated
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* by the dmub service.
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*/
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struct dmub_srv_fb_info {
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uint8_t num_fb;
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struct dmub_fb fb[DMUB_WINDOW_TOTAL];
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};
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/*
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* struct dmub_srv_hw_params - params for dmub hardware initialization
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* @fb: framebuffer info for each region
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* @fb_base: base of the framebuffer aperture
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* @fb_offset: offset of the framebuffer aperture
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* @psp_version: psp version to pass for DMCU init
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* @load_inst_const: true if DMUB should load inst const fw
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*/
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struct dmub_srv_hw_params {
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struct dmub_fb *fb[DMUB_WINDOW_TOTAL];
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uint64_t fb_base;
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uint64_t fb_offset;
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uint32_t psp_version;
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bool load_inst_const;
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bool skip_panel_power_sequence;
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bool disable_z10;
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bool power_optimization;
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bool dpia_supported;
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bool disable_dpia;
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bool usb4_cm_version;
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bool fw_in_system_memory;
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bool dpia_hpd_int_enable_supported;
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bool disable_clock_gate;
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bool disallow_dispclk_dppclk_ds;
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bool ips_sequential_ono;
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enum dmub_memory_access_type mem_access_type;
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enum dmub_ips_disable_type disable_ips;
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bool disallow_phy_access;
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bool disable_sldo_opt;
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bool enable_non_transparent_setconfig;
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bool lower_hbr3_phy_ssc;
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bool override_hbr3_pll_vco;
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};
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/**
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* struct dmub_srv_debug - Debug info for dmub_srv
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* @timeout_occured: Indicates a timeout occured on any message from driver to dmub
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* @timeout_cmd: first cmd sent from driver that timed out - subsequent timeouts are not stored
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*/
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struct dmub_timeout_info {
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bool timeout_occured;
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union dmub_rb_cmd timeout_cmd;
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unsigned long long timestamp;
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};
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/**
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* struct dmub_diagnostic_data - Diagnostic data retrieved from DMCUB for
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* debugging purposes, including logging, crash analysis, etc.
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*/
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struct dmub_diagnostic_data {
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uint32_t dmcub_version;
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uint32_t scratch[17];
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uint32_t pc[DMUB_PC_SNAPSHOT_COUNT];
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uint32_t undefined_address_fault_addr;
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uint32_t inst_fetch_fault_addr;
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uint32_t data_write_fault_addr;
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uint32_t inbox1_rptr;
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uint32_t inbox1_wptr;
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uint32_t inbox1_size;
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uint32_t inbox0_rptr;
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uint32_t inbox0_wptr;
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uint32_t inbox0_size;
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uint32_t outbox1_rptr;
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uint32_t outbox1_wptr;
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uint32_t outbox1_size;
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uint32_t gpint_datain0;
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struct dmub_timeout_info timeout_info;
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uint8_t is_dmcub_enabled : 1;
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uint8_t is_dmcub_soft_reset : 1;
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uint8_t is_dmcub_secure_reset : 1;
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uint8_t is_traceport_en : 1;
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uint8_t is_cw0_enabled : 1;
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uint8_t is_cw6_enabled : 1;
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uint8_t is_pwait : 1;
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};
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struct dmub_srv_inbox {
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/* generic status */
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uint64_t num_submitted;
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uint64_t num_reported;
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union {
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/* frame buffer mailbox status */
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struct dmub_rb rb;
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/* register mailbox status */
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struct {
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bool is_pending;
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bool is_multi_pending;
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};
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};
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};
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/**
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* struct dmub_srv_base_funcs - Driver specific base callbacks
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*/
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struct dmub_srv_base_funcs {
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/**
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* @reg_read:
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*
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* Hook for reading a register.
387
*
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* Return: The 32-bit register value from the given address.
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*/
390
uint32_t (*reg_read)(void *ctx, uint32_t address);
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392
/**
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* @reg_write:
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*
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* Hook for writing a value to the register specified by address.
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*/
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void (*reg_write)(void *ctx, uint32_t address, uint32_t value);
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};
399
400
/**
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* struct dmub_srv_hw_funcs - hardware sequencer funcs for dmub
402
*/
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struct dmub_srv_hw_funcs {
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/* private: internal use only */
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void (*init)(struct dmub_srv *dmub);
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void (*reset)(struct dmub_srv *dmub);
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void (*reset_release)(struct dmub_srv *dmub);
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void (*backdoor_load)(struct dmub_srv *dmub,
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const struct dmub_window *cw0,
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const struct dmub_window *cw1);
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void (*backdoor_load_zfb_mode)(struct dmub_srv *dmub,
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const struct dmub_window *cw0,
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const struct dmub_window *cw1);
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void (*setup_windows)(struct dmub_srv *dmub,
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const struct dmub_window *cw2,
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const struct dmub_window *cw3,
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const struct dmub_window *cw4,
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const struct dmub_window *cw5,
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const struct dmub_window *cw6,
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const struct dmub_window *region6);
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void (*setup_mailbox)(struct dmub_srv *dmub,
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const struct dmub_region *inbox1);
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uint32_t (*get_inbox1_wptr)(struct dmub_srv *dmub);
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uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub);
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void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
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void (*setup_out_mailbox)(struct dmub_srv *dmub,
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const struct dmub_region *outbox1);
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uint32_t (*get_outbox1_wptr)(struct dmub_srv *dmub);
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void (*set_outbox1_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);
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void (*setup_outbox0)(struct dmub_srv *dmub,
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const struct dmub_region *outbox0);
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uint32_t (*get_outbox0_wptr)(struct dmub_srv *dmub);
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void (*set_outbox0_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);
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uint32_t (*emul_get_inbox1_rptr)(struct dmub_srv *dmub);
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uint32_t (*emul_get_inbox1_wptr)(struct dmub_srv *dmub);
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void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
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bool (*is_supported)(struct dmub_srv *dmub);
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bool (*is_psrsu_supported)(struct dmub_srv *dmub);
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bool (*is_hw_init)(struct dmub_srv *dmub);
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bool (*is_hw_powered_up)(struct dmub_srv *dmub);
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void (*enable_dmub_boot_options)(struct dmub_srv *dmub,
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const struct dmub_srv_hw_params *params);
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466
void (*skip_dmub_panel_power_sequence)(struct dmub_srv *dmub, bool skip);
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union dmub_fw_boot_status (*get_fw_status)(struct dmub_srv *dmub);
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union dmub_fw_boot_options (*get_fw_boot_option)(struct dmub_srv *dmub);
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void (*set_gpint)(struct dmub_srv *dmub,
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union dmub_gpint_data_register reg);
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bool (*is_gpint_acked)(struct dmub_srv *dmub,
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union dmub_gpint_data_register reg);
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uint32_t (*get_gpint_response)(struct dmub_srv *dmub);
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uint32_t (*get_gpint_dataout)(struct dmub_srv *dmub);
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void (*configure_dmub_in_system_memory)(struct dmub_srv *dmub);
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void (*clear_inbox0_ack_register)(struct dmub_srv *dmub);
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uint32_t (*read_inbox0_ack_register)(struct dmub_srv *dmub);
485
void (*send_inbox0_cmd)(struct dmub_srv *dmub, union dmub_inbox0_data_register data);
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uint32_t (*get_current_time)(struct dmub_srv *dmub);
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void (*get_diagnostic_data)(struct dmub_srv *dmub);
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bool (*should_detect)(struct dmub_srv *dmub);
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void (*init_reg_offsets)(struct dmub_srv *dmub, struct dc_context *ctx);
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void (*subvp_save_surf_addr)(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);
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void (*send_reg_inbox0_cmd_msg)(struct dmub_srv *dmub,
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union dmub_rb_cmd *cmd);
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uint32_t (*read_reg_inbox0_rsp_int_status)(struct dmub_srv *dmub);
498
void (*read_reg_inbox0_cmd_rsp)(struct dmub_srv *dmub,
499
union dmub_rb_cmd *cmd);
500
void (*write_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub);
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void (*clear_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub);
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void (*enable_reg_inbox0_rsp_int)(struct dmub_srv *dmub, bool enable);
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uint32_t (*read_reg_outbox0_rdy_int_status)(struct dmub_srv *dmub);
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void (*write_reg_outbox0_rdy_int_ack)(struct dmub_srv *dmub);
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void (*read_reg_outbox0_msg)(struct dmub_srv *dmub, uint32_t *msg);
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void (*write_reg_outbox0_rsp)(struct dmub_srv *dmub, uint32_t *rsp);
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uint32_t (*read_reg_outbox0_rsp_int_status)(struct dmub_srv *dmub);
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void (*enable_reg_outbox0_rdy_int)(struct dmub_srv *dmub, bool enable);
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};
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512
/**
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* struct dmub_srv_create_params - params for dmub service creation
514
* @base_funcs: driver supplied base routines
515
* @hw_funcs: optional overrides for hw funcs
516
* @user_ctx: context data for callback funcs
517
* @asic: driver supplied asic
518
* @fw_version: the current firmware version, if any
519
* @is_virtual: false for hw support only
520
*/
521
struct dmub_srv_create_params {
522
struct dmub_srv_base_funcs funcs;
523
struct dmub_srv_hw_funcs *hw_funcs;
524
void *user_ctx;
525
enum dmub_asic asic;
526
uint32_t fw_version;
527
bool is_virtual;
528
enum dmub_inbox_cmd_interface_type inbox_type;
529
};
530
531
/**
532
* struct dmub_srv - software state for dmcub
533
* @asic: dmub asic identifier
534
* @user_ctx: user provided context for the dmub_srv
535
* @fw_version: the current firmware version, if any
536
* @is_virtual: false if hardware support only
537
* @shared_state: dmub shared state between firmware and driver
538
* @fw_state: dmub firmware state pointer
539
*/
540
struct dmub_srv {
541
enum dmub_asic asic;
542
void *user_ctx;
543
uint32_t fw_version;
544
bool is_virtual;
545
struct dmub_fb scratch_mem_fb;
546
struct dmub_fb ib_mem_gart;
547
volatile struct dmub_shared_state_feature_block *shared_state;
548
volatile const struct dmub_fw_state *fw_state;
549
550
/* private: internal use only */
551
const struct dmub_srv_common_regs *regs;
552
const struct dmub_srv_dcn31_regs *regs_dcn31;
553
struct dmub_srv_dcn32_regs *regs_dcn32;
554
struct dmub_srv_dcn35_regs *regs_dcn35;
555
const struct dmub_srv_dcn401_regs *regs_dcn401;
556
struct dmub_srv_base_funcs funcs;
557
struct dmub_srv_hw_funcs hw_funcs;
558
struct dmub_srv_inbox inbox1;
559
uint32_t inbox1_last_wptr;
560
struct dmub_srv_inbox reg_inbox0;
561
/**
562
* outbox1_rb is accessed without locks (dal & dc)
563
* and to be used only in dmub_srv_stat_get_notification()
564
*/
565
struct dmub_rb outbox1_rb;
566
567
struct dmub_rb outbox0_rb;
568
569
bool sw_init;
570
bool hw_init;
571
bool dpia_supported;
572
573
uint64_t fb_base;
574
uint64_t fb_offset;
575
uint32_t psp_version;
576
577
/* Feature capabilities reported by fw */
578
struct dmub_fw_meta_info meta_info;
579
struct dmub_feature_caps feature_caps;
580
struct dmub_visual_confirm_color visual_confirm_color;
581
enum dmub_inbox_cmd_interface_type inbox_type;
582
583
enum dmub_srv_power_state_type power_state;
584
struct dmub_diagnostic_data debug;
585
struct dmub_fb lsdma_rb_fb;
586
};
587
588
/**
589
* struct dmub_notification - dmub notification data
590
* @type: dmub notification type
591
* @link_index: link index to identify aux connection
592
* @result: USB4 status returned from dmub
593
* @pending_notification: Indicates there are other pending notifications
594
* @aux_reply: aux reply
595
* @hpd_status: hpd status
596
* @bw_alloc_reply: BW Allocation reply from CM/DPIA
597
*/
598
struct dmub_notification {
599
enum dmub_notification_type type;
600
uint8_t link_index;
601
uint8_t result;
602
/* notify instance from DMUB */
603
uint8_t instance;
604
bool pending_notification;
605
union {
606
struct aux_reply_data aux_reply;
607
enum dp_hpd_status hpd_status;
608
enum set_config_status sc_status;
609
struct dmub_rb_cmd_hpd_sense_notify_data hpd_sense_notify;
610
struct dmub_cmd_fused_request fused_request;
611
};
612
};
613
614
/**
615
* DMUB firmware version helper macro - useful for checking if the version
616
* of a firmware to know if feature or functionality is supported or present.
617
*/
618
#define DMUB_FW_VERSION(major, minor, revision) \
619
((((major) & 0xFF) << 24) | (((minor) & 0xFF) << 16) | (((revision) & 0xFF) << 8))
620
621
/**
622
* dmub_srv_create() - creates the DMUB service.
623
* @dmub: the dmub service
624
* @params: creation parameters for the service
625
*
626
* Return:
627
* DMUB_STATUS_OK - success
628
* DMUB_STATUS_INVALID - unspecified error
629
*/
630
enum dmub_status dmub_srv_create(struct dmub_srv *dmub,
631
const struct dmub_srv_create_params *params);
632
633
/**
634
* dmub_srv_destroy() - destroys the DMUB service.
635
* @dmub: the dmub service
636
*/
637
void dmub_srv_destroy(struct dmub_srv *dmub);
638
639
/**
640
* dmub_srv_calc_region_info() - retreives region info from the dmub service
641
* @dmub: the dmub service
642
* @params: parameters used to calculate region locations
643
* @info_out: the output region info from dmub
644
*
645
* Calculates the base and top address for all relevant dmub regions
646
* using the parameters given (if any).
647
*
648
* Return:
649
* DMUB_STATUS_OK - success
650
* DMUB_STATUS_INVALID - unspecified error
651
*/
652
enum dmub_status
653
dmub_srv_calc_region_info(struct dmub_srv *dmub,
654
const struct dmub_srv_region_params *params,
655
struct dmub_srv_region_info *out);
656
657
/**
658
* dmub_srv_calc_region_info() - retreives fb info from the dmub service
659
* @dmub: the dmub service
660
* @params: parameters used to calculate fb locations
661
* @info_out: the output fb info from dmub
662
*
663
* Calculates the base and top address for all relevant dmub regions
664
* using the parameters given (if any).
665
*
666
* Return:
667
* DMUB_STATUS_OK - success
668
* DMUB_STATUS_INVALID - unspecified error
669
*/
670
enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub,
671
const struct dmub_srv_memory_params *params,
672
struct dmub_srv_fb_info *out);
673
674
/**
675
* dmub_srv_has_hw_support() - returns hw support state for dmcub
676
* @dmub: the dmub service
677
* @is_supported: hw support state
678
*
679
* Queries the hardware for DMCUB support and returns the result.
680
*
681
* Can be called before dmub_srv_hw_init().
682
*
683
* Return:
684
* DMUB_STATUS_OK - success
685
* DMUB_STATUS_INVALID - unspecified error
686
*/
687
enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub,
688
bool *is_supported);
689
690
/**
691
* dmub_srv_is_hw_init() - returns hardware init state
692
*
693
* Return:
694
* DMUB_STATUS_OK - success
695
* DMUB_STATUS_INVALID - unspecified error
696
*/
697
enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init);
698
699
/**
700
* dmub_srv_hw_init() - initializes the underlying DMUB hardware
701
* @dmub: the dmub service
702
* @params: params for hardware initialization
703
*
704
* Resets the DMUB hardware and performs backdoor loading of the
705
* required cache regions based on the input framebuffer regions.
706
*
707
* Return:
708
* DMUB_STATUS_OK - success
709
* DMUB_STATUS_NO_CTX - dmcub context not initialized
710
* DMUB_STATUS_INVALID - unspecified error
711
*/
712
enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub,
713
const struct dmub_srv_hw_params *params);
714
715
/**
716
* dmub_srv_hw_reset() - puts the DMUB hardware in reset state if initialized
717
* @dmub: the dmub service
718
*
719
* Before destroying the DMUB service or releasing the backing framebuffer
720
* memory we'll need to put the DMCUB into reset first.
721
*
722
* A subsequent call to dmub_srv_hw_init() will re-enable the DMCUB.
723
*
724
* Return:
725
* DMUB_STATUS_OK - success
726
* DMUB_STATUS_INVALID - unspecified error
727
*/
728
enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub);
729
730
/**
731
* dmub_srv_fb_cmd_queue() - queues a command to the DMUB
732
* @dmub: the dmub service
733
* @cmd: the command to queue
734
*
735
* Queues a command to the DMUB service but does not begin execution
736
* immediately.
737
*
738
* Return:
739
* DMUB_STATUS_OK - success
740
* DMUB_STATUS_QUEUE_FULL - no remaining room in queue
741
* DMUB_STATUS_INVALID - unspecified error
742
*/
743
enum dmub_status dmub_srv_fb_cmd_queue(struct dmub_srv *dmub,
744
const union dmub_rb_cmd *cmd);
745
746
/**
747
* dmub_srv_fb_cmd_execute() - Executes a queued sequence to the dmub
748
* @dmub: the dmub service
749
*
750
* Begins execution of queued commands on the dmub.
751
*
752
* Return:
753
* DMUB_STATUS_OK - success
754
* DMUB_STATUS_INVALID - unspecified error
755
*/
756
enum dmub_status dmub_srv_fb_cmd_execute(struct dmub_srv *dmub);
757
758
/**
759
* dmub_srv_wait_for_hw_pwr_up() - Waits for firmware hardware power up is completed
760
* @dmub: the dmub service
761
* @timeout_us: the maximum number of microseconds to wait
762
*
763
* Waits until firmware hardware is powered up. The maximum
764
* wait time is given in microseconds to prevent spinning forever.
765
*
766
* Return:
767
* DMUB_STATUS_OK - success
768
* DMUB_STATUS_TIMEOUT - timed out
769
* DMUB_STATUS_INVALID - unspecified error
770
*/
771
enum dmub_status dmub_srv_wait_for_hw_pwr_up(struct dmub_srv *dmub,
772
uint32_t timeout_us);
773
774
bool dmub_srv_is_hw_pwr_up(struct dmub_srv *dmub);
775
776
/**
777
* dmub_srv_wait_for_auto_load() - Waits for firmware auto load to complete
778
* @dmub: the dmub service
779
* @timeout_us: the maximum number of microseconds to wait
780
*
781
* Waits until firmware has been autoloaded by the DMCUB. The maximum
782
* wait time is given in microseconds to prevent spinning forever.
783
*
784
* On ASICs without firmware autoload support this function will return
785
* immediately.
786
*
787
* Return:
788
* DMUB_STATUS_OK - success
789
* DMUB_STATUS_TIMEOUT - wait for phy init timed out
790
* DMUB_STATUS_INVALID - unspecified error
791
*/
792
enum dmub_status dmub_srv_wait_for_auto_load(struct dmub_srv *dmub,
793
uint32_t timeout_us);
794
795
/**
796
* dmub_srv_wait_for_phy_init() - Waits for DMUB PHY init to complete
797
* @dmub: the dmub service
798
* @timeout_us: the maximum number of microseconds to wait
799
*
800
* Waits until the PHY has been initialized by the DMUB. The maximum
801
* wait time is given in microseconds to prevent spinning forever.
802
*
803
* On ASICs without PHY init support this function will return
804
* immediately.
805
*
806
* Return:
807
* DMUB_STATUS_OK - success
808
* DMUB_STATUS_TIMEOUT - wait for phy init timed out
809
* DMUB_STATUS_INVALID - unspecified error
810
*/
811
enum dmub_status dmub_srv_wait_for_phy_init(struct dmub_srv *dmub,
812
uint32_t timeout_us);
813
814
/**
815
* dmub_srv_wait_for_pending() - Re-entrant wait for messages currently pending
816
* @dmub: the dmub service
817
* @timeout_us: the maximum number of microseconds to wait
818
*
819
* Waits until the commands queued prior to this call are complete.
820
* If interfaces remain busy due to additional work being submitted
821
* concurrently, this function will not continue to wait.
822
*
823
* Return:
824
* DMUB_STATUS_OK - success
825
* DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out
826
* DMUB_STATUS_INVALID - unspecified error
827
*/
828
enum dmub_status dmub_srv_wait_for_pending(struct dmub_srv *dmub,
829
uint32_t timeout_us);
830
831
/**
832
* dmub_srv_wait_for_idle() - Waits for the DMUB to be idle
833
* @dmub: the dmub service
834
* @timeout_us: the maximum number of microseconds to wait
835
*
836
* Waits until the DMUB buffer is empty and all commands have
837
* finished processing. The maximum wait time is given in
838
* microseconds to prevent spinning forever.
839
*
840
* Return:
841
* DMUB_STATUS_OK - success
842
* DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out
843
* DMUB_STATUS_INVALID - unspecified error
844
*/
845
enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub,
846
uint32_t timeout_us);
847
848
/**
849
* dmub_srv_send_gpint_command() - Sends a GPINT based command.
850
* @dmub: the dmub service
851
* @command_code: the command code to send
852
* @param: the command parameter to send
853
* @timeout_us: the maximum number of microseconds to wait
854
*
855
* Sends a command via the general purpose interrupt (GPINT).
856
* Waits for the number of microseconds specified by timeout_us
857
* for the command ACK before returning.
858
*
859
* Can be called after software initialization.
860
*
861
* Return:
862
* DMUB_STATUS_OK - success
863
* DMUB_STATUS_TIMEOUT - wait for ACK timed out
864
* DMUB_STATUS_INVALID - unspecified error
865
*/
866
enum dmub_status
867
dmub_srv_send_gpint_command(struct dmub_srv *dmub,
868
enum dmub_gpint_command command_code,
869
uint16_t param, uint32_t timeout_us);
870
871
/**
872
* dmub_srv_get_gpint_response() - Queries the GPINT response.
873
* @dmub: the dmub service
874
* @response: the response for the last GPINT
875
*
876
* Returns the response code for the last GPINT interrupt.
877
*
878
* Can be called after software initialization.
879
*
880
* Return:
881
* DMUB_STATUS_OK - success
882
* DMUB_STATUS_INVALID - unspecified error
883
*/
884
enum dmub_status dmub_srv_get_gpint_response(struct dmub_srv *dmub,
885
uint32_t *response);
886
887
/**
888
* dmub_srv_get_gpint_dataout() - Queries the GPINT DATAOUT.
889
* @dmub: the dmub service
890
* @dataout: the data for the GPINT DATAOUT
891
*
892
* Returns the response code for the last GPINT DATAOUT interrupt.
893
*
894
* Can be called after software initialization.
895
*
896
* Return:
897
* DMUB_STATUS_OK - success
898
* DMUB_STATUS_INVALID - unspecified error
899
*/
900
enum dmub_status dmub_srv_get_gpint_dataout(struct dmub_srv *dmub,
901
uint32_t *dataout);
902
903
/**
904
* dmub_flush_buffer_mem() - Read back entire frame buffer region.
905
* This ensures that the write from x86 has been flushed and will not
906
* hang the DMCUB.
907
* @fb: frame buffer to flush
908
*
909
* Can be called after software initialization.
910
*/
911
void dmub_flush_buffer_mem(const struct dmub_fb *fb);
912
913
/**
914
* dmub_srv_get_fw_boot_status() - Returns the DMUB boot status bits.
915
*
916
* @dmub: the dmub service
917
* @status: out pointer for firmware status
918
*
919
* Return:
920
* DMUB_STATUS_OK - success
921
* DMUB_STATUS_INVALID - unspecified error, unsupported
922
*/
923
enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub,
924
union dmub_fw_boot_status *status);
925
926
enum dmub_status dmub_srv_get_fw_boot_option(struct dmub_srv *dmub,
927
union dmub_fw_boot_options *option);
928
929
enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub,
930
bool skip);
931
932
bool dmub_srv_get_outbox0_msg(struct dmub_srv *dmub, struct dmcub_trace_buf_entry *entry);
933
934
bool dmub_srv_get_diagnostic_data(struct dmub_srv *dmub);
935
936
bool dmub_srv_should_detect(struct dmub_srv *dmub);
937
938
/**
939
* dmub_srv_send_inbox0_cmd() - Send command to DMUB using INBOX0
940
* @dmub: the dmub service
941
* @data: the data to be sent in the INBOX0 command
942
*
943
* Send command by writing directly to INBOX0 WPTR
944
*
945
* Return:
946
* DMUB_STATUS_OK - success
947
* DMUB_STATUS_INVALID - hw_init false or hw function does not exist
948
*/
949
enum dmub_status dmub_srv_send_inbox0_cmd(struct dmub_srv *dmub, union dmub_inbox0_data_register data);
950
951
/**
952
* dmub_srv_wait_for_inbox0_ack() - wait for DMUB to ACK INBOX0 command
953
* @dmub: the dmub service
954
* @timeout_us: the maximum number of microseconds to wait
955
*
956
* Wait for DMUB to ACK the INBOX0 message
957
*
958
* Return:
959
* DMUB_STATUS_OK - success
960
* DMUB_STATUS_INVALID - hw_init false or hw function does not exist
961
* DMUB_STATUS_TIMEOUT - wait for ack timed out
962
*/
963
enum dmub_status dmub_srv_wait_for_inbox0_ack(struct dmub_srv *dmub, uint32_t timeout_us);
964
965
/**
966
* dmub_srv_wait_for_inbox0_ack() - clear ACK register for INBOX0
967
* @dmub: the dmub service
968
*
969
* Clear ACK register for INBOX0
970
*
971
* Return:
972
* DMUB_STATUS_OK - success
973
* DMUB_STATUS_INVALID - hw_init false or hw function does not exist
974
*/
975
enum dmub_status dmub_srv_clear_inbox0_ack(struct dmub_srv *dmub);
976
977
/**
978
* dmub_srv_subvp_save_surf_addr() - Save primary and meta address for subvp on each flip
979
* @dmub: The dmub service
980
* @addr: The surface address to be programmed on the current flip
981
* @subvp_index: Index of subvp pipe, indicates which subvp pipe the address should be saved for
982
*
983
* Function to save the surface flip addr into scratch registers. This is to fix a race condition
984
* between FW and driver reading / writing to the surface address at the same time. This is
985
* required because there is no EARLIEST_IN_USE_META.
986
*
987
* Return:
988
* void
989
*/
990
void dmub_srv_subvp_save_surf_addr(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);
991
992
/**
993
* dmub_srv_set_power_state() - Track DC power state in dmub_srv
994
* @dmub: The dmub service
995
* @power_state: DC power state setting
996
*
997
* Store DC power state in dmub_srv. If dmub_srv is in D3, then don't send messages to DMUB
998
*
999
* Return:
1000
* void
1001
*/
1002
void dmub_srv_set_power_state(struct dmub_srv *dmub, enum dmub_srv_power_state_type dmub_srv_power_state);
1003
1004
/**
1005
* dmub_srv_reg_cmd_execute() - Executes provided command to the dmub
1006
* @dmub: the dmub service
1007
* @cmd: the command packet to be executed
1008
*
1009
* Executes a single command for the dmub.
1010
*
1011
* Return:
1012
* DMUB_STATUS_OK - success
1013
* DMUB_STATUS_INVALID - unspecified error
1014
*/
1015
enum dmub_status dmub_srv_reg_cmd_execute(struct dmub_srv *dmub, union dmub_rb_cmd *cmd);
1016
1017
1018
/**
1019
* dmub_srv_cmd_get_response() - Copies return data for command into buffer
1020
* @dmub: the dmub service
1021
* @cmd_rsp: response buffer
1022
*
1023
* Copies return data for command into buffer
1024
*/
1025
void dmub_srv_cmd_get_response(struct dmub_srv *dmub,
1026
union dmub_rb_cmd *cmd_rsp);
1027
1028
/**
1029
* dmub_srv_sync_inboxes() - Sync inbox state
1030
* @dmub: the dmub service
1031
*
1032
* Sync inbox state
1033
*
1034
* Return:
1035
* DMUB_STATUS_OK - success
1036
* DMUB_STATUS_INVALID - unspecified error
1037
*/
1038
enum dmub_status dmub_srv_sync_inboxes(struct dmub_srv *dmub);
1039
1040
/**
1041
* dmub_srv_wait_for_inbox_free() - Waits for space in the DMUB inbox to free up
1042
* @dmub: the dmub service
1043
* @timeout_us: the maximum number of microseconds to wait
1044
* @num_free_required: number of free entries required
1045
*
1046
* Waits until the DMUB buffer is freed to the specified number.
1047
* The maximum wait time is given in microseconds to prevent spinning
1048
* forever.
1049
*
1050
* Return:
1051
* DMUB_STATUS_OK - success
1052
* DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out
1053
* DMUB_STATUS_INVALID - unspecified error
1054
*/
1055
enum dmub_status dmub_srv_wait_for_inbox_free(struct dmub_srv *dmub,
1056
uint32_t timeout_us,
1057
uint32_t num_free_required);
1058
1059
/**
1060
* dmub_srv_update_inbox_status() - Updates pending status for inbox & reg inbox0
1061
* @dmub: the dmub service
1062
*
1063
* Return:
1064
* DMUB_STATUS_OK - success
1065
* DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out
1066
* DMUB_STATUS_HW_FAILURE - issue with HW programming
1067
* DMUB_STATUS_INVALID - unspecified error
1068
*/
1069
enum dmub_status dmub_srv_update_inbox_status(struct dmub_srv *dmub);
1070
1071
#endif /* _DMUB_SRV_H_ */
1072
1073