Path: blob/master/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
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/*1* Copyright 2019 Advanced Micro Devices, Inc.2*3* Permission is hereby granted, free of charge, to any person obtaining a4* copy of this software and associated documentation files (the "Software"),5* to deal in the Software without restriction, including without limitation6* the rights to use, copy, modify, merge, publish, distribute, sublicense,7* and/or sell copies of the Software, and to permit persons to whom the8* Software is furnished to do so, subject to the following conditions:9*10* The above copyright notice and this permission notice shall be included in11* all copies or substantial portions of the Software.12*13* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR14* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,15* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL16* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR17* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,18* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR19* OTHER DEALINGS IN THE SOFTWARE.20*21* Authors: AMD22*23*/2425#ifndef _DMUB_SRV_H_26#define _DMUB_SRV_H_2728/**29* DOC: DMUB interface and operation30*31* DMUB is the interface to the display DMCUB microcontroller on DCN hardware.32* It delegates hardware initialization and command submission to the33* microcontroller. DMUB is the shortname for DMCUB.34*35* This interface is not thread-safe. Ensure that all access to the interface36* is properly synchronized by the caller.37*38* Initialization and usage of the DMUB service should be done in the39* steps given below:40*41* 1. dmub_srv_create()42* 2. dmub_srv_has_hw_support()43* 3. dmub_srv_calc_region_info()44* 4. dmub_srv_hw_init()45*46* The call to dmub_srv_create() is required to use the server.47*48* The calls to dmub_srv_has_hw_support() and dmub_srv_calc_region_info()49* are helpers to query cache window size and allocate framebuffer(s)50* for the cache windows.51*52* The call to dmub_srv_hw_init() programs the DMCUB registers to prepare53* for command submission. Commands can be queued via dmub_srv_fb_cmd_queue()54* and executed via dmub_srv_fb_cmd_execute().55*56* If the queue is full the dmub_srv_wait_for_idle() call can be used to57* wait until the queue has been cleared.58*59* Destroying the DMUB service can be done by calling dmub_srv_destroy().60* This does not clear DMUB hardware state, only software state.61*62* The interface is intended to be standalone and should not depend on any63* other component within DAL.64*/6566#include "inc/dmub_cmd.h"67#include "dc/dc_types.h"6869#define DMUB_PC_SNAPSHOT_COUNT 107071/* Default tracebuffer size if meta is absent. */72#define DMUB_TRACE_BUFFER_SIZE (64 * 1024)7374/* Forward declarations */75struct dmub_srv;76struct dmub_srv_common_regs;77struct dmub_srv_dcn31_regs;7879struct dmcub_trace_buf_entry;8081/* enum dmub_window_memory_type - memory location type specification for windows */82enum dmub_window_memory_type {83DMUB_WINDOW_MEMORY_TYPE_FB = 0,84DMUB_WINDOW_MEMORY_TYPE_GART85};8687/* enum dmub_status - return code for dmcub functions */88enum dmub_status {89DMUB_STATUS_OK = 0,90DMUB_STATUS_NO_CTX,91DMUB_STATUS_QUEUE_FULL,92DMUB_STATUS_TIMEOUT,93DMUB_STATUS_INVALID,94DMUB_STATUS_HW_FAILURE,95DMUB_STATUS_POWER_STATE_D396};9798/* enum dmub_asic - dmub asic identifier */99enum dmub_asic {100DMUB_ASIC_NONE = 0,101DMUB_ASIC_DCN20,102DMUB_ASIC_DCN21,103DMUB_ASIC_DCN30,104DMUB_ASIC_DCN301,105DMUB_ASIC_DCN302,106DMUB_ASIC_DCN303,107DMUB_ASIC_DCN31,108DMUB_ASIC_DCN31B,109DMUB_ASIC_DCN314,110DMUB_ASIC_DCN315,111DMUB_ASIC_DCN316,112DMUB_ASIC_DCN32,113DMUB_ASIC_DCN321,114DMUB_ASIC_DCN35,115DMUB_ASIC_DCN351,116DMUB_ASIC_DCN36,117DMUB_ASIC_DCN401,118DMUB_ASIC_MAX,119};120121/* enum dmub_window_id - dmub window identifier */122enum dmub_window_id {123DMUB_WINDOW_0_INST_CONST = 0,124DMUB_WINDOW_1_STACK,125DMUB_WINDOW_2_BSS_DATA,126DMUB_WINDOW_3_VBIOS,127DMUB_WINDOW_4_MAILBOX,128DMUB_WINDOW_5_TRACEBUFF,129DMUB_WINDOW_6_FW_STATE,130DMUB_WINDOW_7_SCRATCH_MEM,131DMUB_WINDOW_IB_MEM,132DMUB_WINDOW_SHARED_STATE,133DMUB_WINDOW_LSDMA_BUFFER,134DMUB_WINDOW_TOTAL,135};136137/* enum dmub_notification_type - dmub outbox notification identifier */138enum dmub_notification_type {139DMUB_NOTIFICATION_NO_DATA = 0,140DMUB_NOTIFICATION_AUX_REPLY,141DMUB_NOTIFICATION_HPD,142DMUB_NOTIFICATION_HPD_IRQ,143DMUB_NOTIFICATION_SET_CONFIG_REPLY,144DMUB_NOTIFICATION_DPIA_NOTIFICATION,145DMUB_NOTIFICATION_HPD_SENSE_NOTIFY,146DMUB_NOTIFICATION_FUSED_IO,147DMUB_NOTIFICATION_MAX148};149150/**151* DPIA NOTIFICATION Response Type152*/153enum dpia_notify_bw_alloc_status {154155DPIA_BW_REQ_FAILED = 0,156DPIA_BW_REQ_SUCCESS,157DPIA_EST_BW_CHANGED,158DPIA_BW_ALLOC_CAPS_CHANGED159};160161/* enum dmub_memory_access_type - memory access method */162enum dmub_memory_access_type {163DMUB_MEMORY_ACCESS_DEFAULT,164DMUB_MEMORY_ACCESS_CPU = DMUB_MEMORY_ACCESS_DEFAULT,165DMUB_MEMORY_ACCESS_DMA166};167168/* enum dmub_power_state type - to track DC power state in dmub_srv */169enum dmub_srv_power_state_type {170DMUB_POWER_STATE_UNDEFINED = 0,171DMUB_POWER_STATE_D0 = 1,172DMUB_POWER_STATE_D3 = 8173};174175/* enum dmub_inbox_cmd_interface type - defines default interface for host->dmub commands */176enum dmub_inbox_cmd_interface_type {177DMUB_CMD_INTERFACE_DEFAULT = 0,178DMUB_CMD_INTERFACE_FB = 1,179DMUB_CMD_INTERFACE_REG = 2,180};181182/**183* struct dmub_region - dmub hw memory region184* @base: base address for region, must be 256 byte aligned185* @top: top address for region186*/187struct dmub_region {188uint32_t base;189uint32_t top;190};191192/**193* struct dmub_window - dmub hw cache window194* @off: offset to the fb memory in gpu address space195* @r: region in uc address space for cache window196*/197struct dmub_window {198union dmub_addr offset;199struct dmub_region region;200};201202/**203* struct dmub_fb - defines a dmub framebuffer memory region204* @cpu_addr: cpu virtual address for the region, NULL if invalid205* @gpu_addr: gpu virtual address for the region, NULL if invalid206* @size: size of the region in bytes, zero if invalid207*/208struct dmub_fb {209void *cpu_addr;210uint64_t gpu_addr;211uint32_t size;212};213214/**215* struct dmub_srv_region_params - params used for calculating dmub regions216* @inst_const_size: size of the fw inst const section217* @bss_data_size: size of the fw bss data section218* @vbios_size: size of the vbios data219* @fw_bss_data: raw firmware bss data section220*/221struct dmub_srv_region_params {222uint32_t inst_const_size;223uint32_t bss_data_size;224uint32_t vbios_size;225const uint8_t *fw_inst_const;226const uint8_t *fw_bss_data;227const enum dmub_window_memory_type *window_memory_type;228};229230/**231* struct dmub_srv_region_info - output region info from the dmub service232* @fb_size: required minimum fb size for all regions, aligned to 4096 bytes233* @num_regions: number of regions used by the dmub service234* @regions: region info235*236* The regions are aligned such that they can be all placed within the237* same framebuffer but they can also be placed into different framebuffers.238*239* The size of each region can be calculated by the caller:240* size = reg.top - reg.base241*242* Care must be taken when performing custom allocations to ensure that each243* region base address is 256 byte aligned.244*/245struct dmub_srv_region_info {246uint32_t fb_size;247uint32_t gart_size;248uint8_t num_regions;249struct dmub_region regions[DMUB_WINDOW_TOTAL];250};251252/**253* struct dmub_srv_memory_params - parameters used for driver fb setup254* @region_info: region info calculated by dmub service255* @cpu_fb_addr: base cpu address for the framebuffer256* @cpu_inbox_addr: base cpu address for the gart257* @gpu_fb_addr: base gpu virtual address for the framebuffer258* @gpu_inbox_addr: base gpu virtual address for the gart259*/260struct dmub_srv_memory_params {261const struct dmub_srv_region_info *region_info;262void *cpu_fb_addr;263void *cpu_gart_addr;264uint64_t gpu_fb_addr;265uint64_t gpu_gart_addr;266const enum dmub_window_memory_type *window_memory_type;267};268269/**270* struct dmub_srv_fb_info - output fb info from the dmub service271* @num_fbs: number of required dmub framebuffers272* @fbs: fb data for each region273*274* Output from the dmub service helper that can be used by the275* driver to prepare dmub_fb that can be passed into the dmub276* hw init service.277*278* Assumes that all regions are within the same framebuffer279* and have been setup according to the region_info generated280* by the dmub service.281*/282struct dmub_srv_fb_info {283uint8_t num_fb;284struct dmub_fb fb[DMUB_WINDOW_TOTAL];285};286287/*288* struct dmub_srv_hw_params - params for dmub hardware initialization289* @fb: framebuffer info for each region290* @fb_base: base of the framebuffer aperture291* @fb_offset: offset of the framebuffer aperture292* @psp_version: psp version to pass for DMCU init293* @load_inst_const: true if DMUB should load inst const fw294*/295struct dmub_srv_hw_params {296struct dmub_fb *fb[DMUB_WINDOW_TOTAL];297uint64_t fb_base;298uint64_t fb_offset;299uint32_t psp_version;300bool load_inst_const;301bool skip_panel_power_sequence;302bool disable_z10;303bool power_optimization;304bool dpia_supported;305bool disable_dpia;306bool usb4_cm_version;307bool fw_in_system_memory;308bool dpia_hpd_int_enable_supported;309bool disable_clock_gate;310bool disallow_dispclk_dppclk_ds;311bool ips_sequential_ono;312enum dmub_memory_access_type mem_access_type;313enum dmub_ips_disable_type disable_ips;314bool disallow_phy_access;315bool disable_sldo_opt;316bool enable_non_transparent_setconfig;317bool lower_hbr3_phy_ssc;318bool override_hbr3_pll_vco;319};320321/**322* struct dmub_srv_debug - Debug info for dmub_srv323* @timeout_occured: Indicates a timeout occured on any message from driver to dmub324* @timeout_cmd: first cmd sent from driver that timed out - subsequent timeouts are not stored325*/326struct dmub_timeout_info {327bool timeout_occured;328union dmub_rb_cmd timeout_cmd;329unsigned long long timestamp;330};331332/**333* struct dmub_diagnostic_data - Diagnostic data retrieved from DMCUB for334* debugging purposes, including logging, crash analysis, etc.335*/336struct dmub_diagnostic_data {337uint32_t dmcub_version;338uint32_t scratch[17];339uint32_t pc[DMUB_PC_SNAPSHOT_COUNT];340uint32_t undefined_address_fault_addr;341uint32_t inst_fetch_fault_addr;342uint32_t data_write_fault_addr;343uint32_t inbox1_rptr;344uint32_t inbox1_wptr;345uint32_t inbox1_size;346uint32_t inbox0_rptr;347uint32_t inbox0_wptr;348uint32_t inbox0_size;349uint32_t outbox1_rptr;350uint32_t outbox1_wptr;351uint32_t outbox1_size;352uint32_t gpint_datain0;353struct dmub_timeout_info timeout_info;354uint8_t is_dmcub_enabled : 1;355uint8_t is_dmcub_soft_reset : 1;356uint8_t is_dmcub_secure_reset : 1;357uint8_t is_traceport_en : 1;358uint8_t is_cw0_enabled : 1;359uint8_t is_cw6_enabled : 1;360uint8_t is_pwait : 1;361};362363struct dmub_srv_inbox {364/* generic status */365uint64_t num_submitted;366uint64_t num_reported;367union {368/* frame buffer mailbox status */369struct dmub_rb rb;370/* register mailbox status */371struct {372bool is_pending;373bool is_multi_pending;374};375};376};377378/**379* struct dmub_srv_base_funcs - Driver specific base callbacks380*/381struct dmub_srv_base_funcs {382/**383* @reg_read:384*385* Hook for reading a register.386*387* Return: The 32-bit register value from the given address.388*/389uint32_t (*reg_read)(void *ctx, uint32_t address);390391/**392* @reg_write:393*394* Hook for writing a value to the register specified by address.395*/396void (*reg_write)(void *ctx, uint32_t address, uint32_t value);397};398399/**400* struct dmub_srv_hw_funcs - hardware sequencer funcs for dmub401*/402struct dmub_srv_hw_funcs {403/* private: internal use only */404405void (*init)(struct dmub_srv *dmub);406407void (*reset)(struct dmub_srv *dmub);408409void (*reset_release)(struct dmub_srv *dmub);410411void (*backdoor_load)(struct dmub_srv *dmub,412const struct dmub_window *cw0,413const struct dmub_window *cw1);414415void (*backdoor_load_zfb_mode)(struct dmub_srv *dmub,416const struct dmub_window *cw0,417const struct dmub_window *cw1);418void (*setup_windows)(struct dmub_srv *dmub,419const struct dmub_window *cw2,420const struct dmub_window *cw3,421const struct dmub_window *cw4,422const struct dmub_window *cw5,423const struct dmub_window *cw6,424const struct dmub_window *region6);425426void (*setup_mailbox)(struct dmub_srv *dmub,427const struct dmub_region *inbox1);428429uint32_t (*get_inbox1_wptr)(struct dmub_srv *dmub);430431uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub);432433void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);434435void (*setup_out_mailbox)(struct dmub_srv *dmub,436const struct dmub_region *outbox1);437438uint32_t (*get_outbox1_wptr)(struct dmub_srv *dmub);439440void (*set_outbox1_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);441442void (*setup_outbox0)(struct dmub_srv *dmub,443const struct dmub_region *outbox0);444445uint32_t (*get_outbox0_wptr)(struct dmub_srv *dmub);446447void (*set_outbox0_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset);448449uint32_t (*emul_get_inbox1_rptr)(struct dmub_srv *dmub);450451uint32_t (*emul_get_inbox1_wptr)(struct dmub_srv *dmub);452453void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);454455bool (*is_supported)(struct dmub_srv *dmub);456457bool (*is_psrsu_supported)(struct dmub_srv *dmub);458459bool (*is_hw_init)(struct dmub_srv *dmub);460bool (*is_hw_powered_up)(struct dmub_srv *dmub);461462void (*enable_dmub_boot_options)(struct dmub_srv *dmub,463const struct dmub_srv_hw_params *params);464465void (*skip_dmub_panel_power_sequence)(struct dmub_srv *dmub, bool skip);466467union dmub_fw_boot_status (*get_fw_status)(struct dmub_srv *dmub);468469union dmub_fw_boot_options (*get_fw_boot_option)(struct dmub_srv *dmub);470471void (*set_gpint)(struct dmub_srv *dmub,472union dmub_gpint_data_register reg);473474bool (*is_gpint_acked)(struct dmub_srv *dmub,475union dmub_gpint_data_register reg);476477uint32_t (*get_gpint_response)(struct dmub_srv *dmub);478479uint32_t (*get_gpint_dataout)(struct dmub_srv *dmub);480481void (*configure_dmub_in_system_memory)(struct dmub_srv *dmub);482void (*clear_inbox0_ack_register)(struct dmub_srv *dmub);483uint32_t (*read_inbox0_ack_register)(struct dmub_srv *dmub);484void (*send_inbox0_cmd)(struct dmub_srv *dmub, union dmub_inbox0_data_register data);485uint32_t (*get_current_time)(struct dmub_srv *dmub);486487void (*get_diagnostic_data)(struct dmub_srv *dmub);488489bool (*should_detect)(struct dmub_srv *dmub);490void (*init_reg_offsets)(struct dmub_srv *dmub, struct dc_context *ctx);491492void (*subvp_save_surf_addr)(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);493494void (*send_reg_inbox0_cmd_msg)(struct dmub_srv *dmub,495union dmub_rb_cmd *cmd);496uint32_t (*read_reg_inbox0_rsp_int_status)(struct dmub_srv *dmub);497void (*read_reg_inbox0_cmd_rsp)(struct dmub_srv *dmub,498union dmub_rb_cmd *cmd);499void (*write_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub);500void (*clear_reg_inbox0_rsp_int_ack)(struct dmub_srv *dmub);501void (*enable_reg_inbox0_rsp_int)(struct dmub_srv *dmub, bool enable);502503uint32_t (*read_reg_outbox0_rdy_int_status)(struct dmub_srv *dmub);504void (*write_reg_outbox0_rdy_int_ack)(struct dmub_srv *dmub);505void (*read_reg_outbox0_msg)(struct dmub_srv *dmub, uint32_t *msg);506void (*write_reg_outbox0_rsp)(struct dmub_srv *dmub, uint32_t *rsp);507uint32_t (*read_reg_outbox0_rsp_int_status)(struct dmub_srv *dmub);508void (*enable_reg_outbox0_rdy_int)(struct dmub_srv *dmub, bool enable);509};510511/**512* struct dmub_srv_create_params - params for dmub service creation513* @base_funcs: driver supplied base routines514* @hw_funcs: optional overrides for hw funcs515* @user_ctx: context data for callback funcs516* @asic: driver supplied asic517* @fw_version: the current firmware version, if any518* @is_virtual: false for hw support only519*/520struct dmub_srv_create_params {521struct dmub_srv_base_funcs funcs;522struct dmub_srv_hw_funcs *hw_funcs;523void *user_ctx;524enum dmub_asic asic;525uint32_t fw_version;526bool is_virtual;527enum dmub_inbox_cmd_interface_type inbox_type;528};529530/**531* struct dmub_srv - software state for dmcub532* @asic: dmub asic identifier533* @user_ctx: user provided context for the dmub_srv534* @fw_version: the current firmware version, if any535* @is_virtual: false if hardware support only536* @shared_state: dmub shared state between firmware and driver537* @fw_state: dmub firmware state pointer538*/539struct dmub_srv {540enum dmub_asic asic;541void *user_ctx;542uint32_t fw_version;543bool is_virtual;544struct dmub_fb scratch_mem_fb;545struct dmub_fb ib_mem_gart;546volatile struct dmub_shared_state_feature_block *shared_state;547volatile const struct dmub_fw_state *fw_state;548549/* private: internal use only */550const struct dmub_srv_common_regs *regs;551const struct dmub_srv_dcn31_regs *regs_dcn31;552struct dmub_srv_dcn32_regs *regs_dcn32;553struct dmub_srv_dcn35_regs *regs_dcn35;554const struct dmub_srv_dcn401_regs *regs_dcn401;555struct dmub_srv_base_funcs funcs;556struct dmub_srv_hw_funcs hw_funcs;557struct dmub_srv_inbox inbox1;558uint32_t inbox1_last_wptr;559struct dmub_srv_inbox reg_inbox0;560/**561* outbox1_rb is accessed without locks (dal & dc)562* and to be used only in dmub_srv_stat_get_notification()563*/564struct dmub_rb outbox1_rb;565566struct dmub_rb outbox0_rb;567568bool sw_init;569bool hw_init;570bool dpia_supported;571572uint64_t fb_base;573uint64_t fb_offset;574uint32_t psp_version;575576/* Feature capabilities reported by fw */577struct dmub_fw_meta_info meta_info;578struct dmub_feature_caps feature_caps;579struct dmub_visual_confirm_color visual_confirm_color;580enum dmub_inbox_cmd_interface_type inbox_type;581582enum dmub_srv_power_state_type power_state;583struct dmub_diagnostic_data debug;584struct dmub_fb lsdma_rb_fb;585};586587/**588* struct dmub_notification - dmub notification data589* @type: dmub notification type590* @link_index: link index to identify aux connection591* @result: USB4 status returned from dmub592* @pending_notification: Indicates there are other pending notifications593* @aux_reply: aux reply594* @hpd_status: hpd status595* @bw_alloc_reply: BW Allocation reply from CM/DPIA596*/597struct dmub_notification {598enum dmub_notification_type type;599uint8_t link_index;600uint8_t result;601/* notify instance from DMUB */602uint8_t instance;603bool pending_notification;604union {605struct aux_reply_data aux_reply;606enum dp_hpd_status hpd_status;607enum set_config_status sc_status;608struct dmub_rb_cmd_hpd_sense_notify_data hpd_sense_notify;609struct dmub_cmd_fused_request fused_request;610};611};612613/**614* DMUB firmware version helper macro - useful for checking if the version615* of a firmware to know if feature or functionality is supported or present.616*/617#define DMUB_FW_VERSION(major, minor, revision) \618((((major) & 0xFF) << 24) | (((minor) & 0xFF) << 16) | (((revision) & 0xFF) << 8))619620/**621* dmub_srv_create() - creates the DMUB service.622* @dmub: the dmub service623* @params: creation parameters for the service624*625* Return:626* DMUB_STATUS_OK - success627* DMUB_STATUS_INVALID - unspecified error628*/629enum dmub_status dmub_srv_create(struct dmub_srv *dmub,630const struct dmub_srv_create_params *params);631632/**633* dmub_srv_destroy() - destroys the DMUB service.634* @dmub: the dmub service635*/636void dmub_srv_destroy(struct dmub_srv *dmub);637638/**639* dmub_srv_calc_region_info() - retreives region info from the dmub service640* @dmub: the dmub service641* @params: parameters used to calculate region locations642* @info_out: the output region info from dmub643*644* Calculates the base and top address for all relevant dmub regions645* using the parameters given (if any).646*647* Return:648* DMUB_STATUS_OK - success649* DMUB_STATUS_INVALID - unspecified error650*/651enum dmub_status652dmub_srv_calc_region_info(struct dmub_srv *dmub,653const struct dmub_srv_region_params *params,654struct dmub_srv_region_info *out);655656/**657* dmub_srv_calc_region_info() - retreives fb info from the dmub service658* @dmub: the dmub service659* @params: parameters used to calculate fb locations660* @info_out: the output fb info from dmub661*662* Calculates the base and top address for all relevant dmub regions663* using the parameters given (if any).664*665* Return:666* DMUB_STATUS_OK - success667* DMUB_STATUS_INVALID - unspecified error668*/669enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub,670const struct dmub_srv_memory_params *params,671struct dmub_srv_fb_info *out);672673/**674* dmub_srv_has_hw_support() - returns hw support state for dmcub675* @dmub: the dmub service676* @is_supported: hw support state677*678* Queries the hardware for DMCUB support and returns the result.679*680* Can be called before dmub_srv_hw_init().681*682* Return:683* DMUB_STATUS_OK - success684* DMUB_STATUS_INVALID - unspecified error685*/686enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub,687bool *is_supported);688689/**690* dmub_srv_is_hw_init() - returns hardware init state691*692* Return:693* DMUB_STATUS_OK - success694* DMUB_STATUS_INVALID - unspecified error695*/696enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init);697698/**699* dmub_srv_hw_init() - initializes the underlying DMUB hardware700* @dmub: the dmub service701* @params: params for hardware initialization702*703* Resets the DMUB hardware and performs backdoor loading of the704* required cache regions based on the input framebuffer regions.705*706* Return:707* DMUB_STATUS_OK - success708* DMUB_STATUS_NO_CTX - dmcub context not initialized709* DMUB_STATUS_INVALID - unspecified error710*/711enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub,712const struct dmub_srv_hw_params *params);713714/**715* dmub_srv_hw_reset() - puts the DMUB hardware in reset state if initialized716* @dmub: the dmub service717*718* Before destroying the DMUB service or releasing the backing framebuffer719* memory we'll need to put the DMCUB into reset first.720*721* A subsequent call to dmub_srv_hw_init() will re-enable the DMCUB.722*723* Return:724* DMUB_STATUS_OK - success725* DMUB_STATUS_INVALID - unspecified error726*/727enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub);728729/**730* dmub_srv_fb_cmd_queue() - queues a command to the DMUB731* @dmub: the dmub service732* @cmd: the command to queue733*734* Queues a command to the DMUB service but does not begin execution735* immediately.736*737* Return:738* DMUB_STATUS_OK - success739* DMUB_STATUS_QUEUE_FULL - no remaining room in queue740* DMUB_STATUS_INVALID - unspecified error741*/742enum dmub_status dmub_srv_fb_cmd_queue(struct dmub_srv *dmub,743const union dmub_rb_cmd *cmd);744745/**746* dmub_srv_fb_cmd_execute() - Executes a queued sequence to the dmub747* @dmub: the dmub service748*749* Begins execution of queued commands on the dmub.750*751* Return:752* DMUB_STATUS_OK - success753* DMUB_STATUS_INVALID - unspecified error754*/755enum dmub_status dmub_srv_fb_cmd_execute(struct dmub_srv *dmub);756757/**758* dmub_srv_wait_for_hw_pwr_up() - Waits for firmware hardware power up is completed759* @dmub: the dmub service760* @timeout_us: the maximum number of microseconds to wait761*762* Waits until firmware hardware is powered up. The maximum763* wait time is given in microseconds to prevent spinning forever.764*765* Return:766* DMUB_STATUS_OK - success767* DMUB_STATUS_TIMEOUT - timed out768* DMUB_STATUS_INVALID - unspecified error769*/770enum dmub_status dmub_srv_wait_for_hw_pwr_up(struct dmub_srv *dmub,771uint32_t timeout_us);772773bool dmub_srv_is_hw_pwr_up(struct dmub_srv *dmub);774775/**776* dmub_srv_wait_for_auto_load() - Waits for firmware auto load to complete777* @dmub: the dmub service778* @timeout_us: the maximum number of microseconds to wait779*780* Waits until firmware has been autoloaded by the DMCUB. The maximum781* wait time is given in microseconds to prevent spinning forever.782*783* On ASICs without firmware autoload support this function will return784* immediately.785*786* Return:787* DMUB_STATUS_OK - success788* DMUB_STATUS_TIMEOUT - wait for phy init timed out789* DMUB_STATUS_INVALID - unspecified error790*/791enum dmub_status dmub_srv_wait_for_auto_load(struct dmub_srv *dmub,792uint32_t timeout_us);793794/**795* dmub_srv_wait_for_phy_init() - Waits for DMUB PHY init to complete796* @dmub: the dmub service797* @timeout_us: the maximum number of microseconds to wait798*799* Waits until the PHY has been initialized by the DMUB. The maximum800* wait time is given in microseconds to prevent spinning forever.801*802* On ASICs without PHY init support this function will return803* immediately.804*805* Return:806* DMUB_STATUS_OK - success807* DMUB_STATUS_TIMEOUT - wait for phy init timed out808* DMUB_STATUS_INVALID - unspecified error809*/810enum dmub_status dmub_srv_wait_for_phy_init(struct dmub_srv *dmub,811uint32_t timeout_us);812813/**814* dmub_srv_wait_for_pending() - Re-entrant wait for messages currently pending815* @dmub: the dmub service816* @timeout_us: the maximum number of microseconds to wait817*818* Waits until the commands queued prior to this call are complete.819* If interfaces remain busy due to additional work being submitted820* concurrently, this function will not continue to wait.821*822* Return:823* DMUB_STATUS_OK - success824* DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out825* DMUB_STATUS_INVALID - unspecified error826*/827enum dmub_status dmub_srv_wait_for_pending(struct dmub_srv *dmub,828uint32_t timeout_us);829830/**831* dmub_srv_wait_for_idle() - Waits for the DMUB to be idle832* @dmub: the dmub service833* @timeout_us: the maximum number of microseconds to wait834*835* Waits until the DMUB buffer is empty and all commands have836* finished processing. The maximum wait time is given in837* microseconds to prevent spinning forever.838*839* Return:840* DMUB_STATUS_OK - success841* DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out842* DMUB_STATUS_INVALID - unspecified error843*/844enum dmub_status dmub_srv_wait_for_idle(struct dmub_srv *dmub,845uint32_t timeout_us);846847/**848* dmub_srv_send_gpint_command() - Sends a GPINT based command.849* @dmub: the dmub service850* @command_code: the command code to send851* @param: the command parameter to send852* @timeout_us: the maximum number of microseconds to wait853*854* Sends a command via the general purpose interrupt (GPINT).855* Waits for the number of microseconds specified by timeout_us856* for the command ACK before returning.857*858* Can be called after software initialization.859*860* Return:861* DMUB_STATUS_OK - success862* DMUB_STATUS_TIMEOUT - wait for ACK timed out863* DMUB_STATUS_INVALID - unspecified error864*/865enum dmub_status866dmub_srv_send_gpint_command(struct dmub_srv *dmub,867enum dmub_gpint_command command_code,868uint16_t param, uint32_t timeout_us);869870/**871* dmub_srv_get_gpint_response() - Queries the GPINT response.872* @dmub: the dmub service873* @response: the response for the last GPINT874*875* Returns the response code for the last GPINT interrupt.876*877* Can be called after software initialization.878*879* Return:880* DMUB_STATUS_OK - success881* DMUB_STATUS_INVALID - unspecified error882*/883enum dmub_status dmub_srv_get_gpint_response(struct dmub_srv *dmub,884uint32_t *response);885886/**887* dmub_srv_get_gpint_dataout() - Queries the GPINT DATAOUT.888* @dmub: the dmub service889* @dataout: the data for the GPINT DATAOUT890*891* Returns the response code for the last GPINT DATAOUT interrupt.892*893* Can be called after software initialization.894*895* Return:896* DMUB_STATUS_OK - success897* DMUB_STATUS_INVALID - unspecified error898*/899enum dmub_status dmub_srv_get_gpint_dataout(struct dmub_srv *dmub,900uint32_t *dataout);901902/**903* dmub_flush_buffer_mem() - Read back entire frame buffer region.904* This ensures that the write from x86 has been flushed and will not905* hang the DMCUB.906* @fb: frame buffer to flush907*908* Can be called after software initialization.909*/910void dmub_flush_buffer_mem(const struct dmub_fb *fb);911912/**913* dmub_srv_get_fw_boot_status() - Returns the DMUB boot status bits.914*915* @dmub: the dmub service916* @status: out pointer for firmware status917*918* Return:919* DMUB_STATUS_OK - success920* DMUB_STATUS_INVALID - unspecified error, unsupported921*/922enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub,923union dmub_fw_boot_status *status);924925enum dmub_status dmub_srv_get_fw_boot_option(struct dmub_srv *dmub,926union dmub_fw_boot_options *option);927928enum dmub_status dmub_srv_set_skip_panel_power_sequence(struct dmub_srv *dmub,929bool skip);930931bool dmub_srv_get_outbox0_msg(struct dmub_srv *dmub, struct dmcub_trace_buf_entry *entry);932933bool dmub_srv_get_diagnostic_data(struct dmub_srv *dmub);934935bool dmub_srv_should_detect(struct dmub_srv *dmub);936937/**938* dmub_srv_send_inbox0_cmd() - Send command to DMUB using INBOX0939* @dmub: the dmub service940* @data: the data to be sent in the INBOX0 command941*942* Send command by writing directly to INBOX0 WPTR943*944* Return:945* DMUB_STATUS_OK - success946* DMUB_STATUS_INVALID - hw_init false or hw function does not exist947*/948enum dmub_status dmub_srv_send_inbox0_cmd(struct dmub_srv *dmub, union dmub_inbox0_data_register data);949950/**951* dmub_srv_wait_for_inbox0_ack() - wait for DMUB to ACK INBOX0 command952* @dmub: the dmub service953* @timeout_us: the maximum number of microseconds to wait954*955* Wait for DMUB to ACK the INBOX0 message956*957* Return:958* DMUB_STATUS_OK - success959* DMUB_STATUS_INVALID - hw_init false or hw function does not exist960* DMUB_STATUS_TIMEOUT - wait for ack timed out961*/962enum dmub_status dmub_srv_wait_for_inbox0_ack(struct dmub_srv *dmub, uint32_t timeout_us);963964/**965* dmub_srv_wait_for_inbox0_ack() - clear ACK register for INBOX0966* @dmub: the dmub service967*968* Clear ACK register for INBOX0969*970* Return:971* DMUB_STATUS_OK - success972* DMUB_STATUS_INVALID - hw_init false or hw function does not exist973*/974enum dmub_status dmub_srv_clear_inbox0_ack(struct dmub_srv *dmub);975976/**977* dmub_srv_subvp_save_surf_addr() - Save primary and meta address for subvp on each flip978* @dmub: The dmub service979* @addr: The surface address to be programmed on the current flip980* @subvp_index: Index of subvp pipe, indicates which subvp pipe the address should be saved for981*982* Function to save the surface flip addr into scratch registers. This is to fix a race condition983* between FW and driver reading / writing to the surface address at the same time. This is984* required because there is no EARLIEST_IN_USE_META.985*986* Return:987* void988*/989void dmub_srv_subvp_save_surf_addr(struct dmub_srv *dmub, const struct dc_plane_address *addr, uint8_t subvp_index);990991/**992* dmub_srv_set_power_state() - Track DC power state in dmub_srv993* @dmub: The dmub service994* @power_state: DC power state setting995*996* Store DC power state in dmub_srv. If dmub_srv is in D3, then don't send messages to DMUB997*998* Return:999* void1000*/1001void dmub_srv_set_power_state(struct dmub_srv *dmub, enum dmub_srv_power_state_type dmub_srv_power_state);10021003/**1004* dmub_srv_reg_cmd_execute() - Executes provided command to the dmub1005* @dmub: the dmub service1006* @cmd: the command packet to be executed1007*1008* Executes a single command for the dmub.1009*1010* Return:1011* DMUB_STATUS_OK - success1012* DMUB_STATUS_INVALID - unspecified error1013*/1014enum dmub_status dmub_srv_reg_cmd_execute(struct dmub_srv *dmub, union dmub_rb_cmd *cmd);101510161017/**1018* dmub_srv_cmd_get_response() - Copies return data for command into buffer1019* @dmub: the dmub service1020* @cmd_rsp: response buffer1021*1022* Copies return data for command into buffer1023*/1024void dmub_srv_cmd_get_response(struct dmub_srv *dmub,1025union dmub_rb_cmd *cmd_rsp);10261027/**1028* dmub_srv_sync_inboxes() - Sync inbox state1029* @dmub: the dmub service1030*1031* Sync inbox state1032*1033* Return:1034* DMUB_STATUS_OK - success1035* DMUB_STATUS_INVALID - unspecified error1036*/1037enum dmub_status dmub_srv_sync_inboxes(struct dmub_srv *dmub);10381039/**1040* dmub_srv_wait_for_inbox_free() - Waits for space in the DMUB inbox to free up1041* @dmub: the dmub service1042* @timeout_us: the maximum number of microseconds to wait1043* @num_free_required: number of free entries required1044*1045* Waits until the DMUB buffer is freed to the specified number.1046* The maximum wait time is given in microseconds to prevent spinning1047* forever.1048*1049* Return:1050* DMUB_STATUS_OK - success1051* DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out1052* DMUB_STATUS_INVALID - unspecified error1053*/1054enum dmub_status dmub_srv_wait_for_inbox_free(struct dmub_srv *dmub,1055uint32_t timeout_us,1056uint32_t num_free_required);10571058/**1059* dmub_srv_update_inbox_status() - Updates pending status for inbox & reg inbox01060* @dmub: the dmub service1061*1062* Return:1063* DMUB_STATUS_OK - success1064* DMUB_STATUS_TIMEOUT - wait for buffer to flush timed out1065* DMUB_STATUS_HW_FAILURE - issue with HW programming1066* DMUB_STATUS_INVALID - unspecified error1067*/1068enum dmub_status dmub_srv_update_inbox_status(struct dmub_srv *dmub);10691070#endif /* _DMUB_SRV_H_ */107110721073