Path: blob/master/drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
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// SPDX-License-Identifier: GPL-2.0-only1/*2* Analog Devices ADV7511 HDMI transmitter driver3*4* Copyright 2012 Analog Devices Inc.5*/67#include <linux/clk.h>8#include <linux/device.h>9#include <linux/gpio/consumer.h>10#include <linux/module.h>11#include <linux/of.h>12#include <linux/slab.h>1314#include <sound/pcm.h>1516#include <drm/drm_atomic.h>17#include <drm/drm_atomic_helper.h>18#include <drm/drm_bridge_connector.h>19#include <drm/drm_edid.h>20#include <drm/drm_of.h>21#include <drm/drm_print.h>22#include <drm/drm_probe_helper.h>23#include <drm/display/drm_hdmi_helper.h>24#include <drm/display/drm_hdmi_state_helper.h>2526#include "adv7511.h"2728/* ADI recommended values for proper operation. */29static const struct reg_sequence adv7511_fixed_registers[] = {30{ 0x98, 0x03 },31{ 0x9a, 0xe0 },32{ 0x9c, 0x30 },33{ 0x9d, 0x61 },34{ 0xa2, 0xa4 },35{ 0xa3, 0xa4 },36{ 0xe0, 0xd0 },37{ 0xf9, 0x00 },38{ 0x55, 0x02 },39};4041/* -----------------------------------------------------------------------------42* Register access43*/4445static const uint8_t adv7511_register_defaults[] = {460x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 00 */470x00, 0x00, 0x01, 0x0e, 0xbc, 0x18, 0x01, 0x13,480x25, 0x37, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 10 */490x46, 0x62, 0x04, 0xa8, 0x00, 0x00, 0x1c, 0x84,500x1c, 0xbf, 0x04, 0xa8, 0x1e, 0x70, 0x02, 0x1e, /* 20 */510x00, 0x00, 0x04, 0xa8, 0x08, 0x12, 0x1b, 0xac,520x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 */530x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0xb0,540x00, 0x50, 0x90, 0x7e, 0x79, 0x70, 0x00, 0x00, /* 40 */550x00, 0xa8, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,560x00, 0x00, 0x02, 0x0d, 0x00, 0x00, 0x00, 0x00, /* 50 */570x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,580x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 60 */590x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,600x01, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 70 */610x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,620x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 80 */630x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,640x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, /* 90 */650x0b, 0x02, 0x00, 0x18, 0x5a, 0x60, 0x00, 0x00,660x00, 0x00, 0x80, 0x80, 0x08, 0x04, 0x00, 0x00, /* a0 */670x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x40, 0x14,680x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* b0 */690x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,700x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* c0 */710x00, 0x03, 0x00, 0x00, 0x02, 0x00, 0x01, 0x04,720x30, 0xff, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /* d0 */730x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x01,740x80, 0x75, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, /* e0 */750x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,760x00, 0x00, 0x00, 0x00, 0x00, 0x75, 0x11, 0x00, /* f0 */770x00, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,78};7980static bool adv7511_register_volatile(struct device *dev, unsigned int reg)81{82switch (reg) {83case ADV7511_REG_CHIP_REVISION:84case ADV7511_REG_SPDIF_FREQ:85case ADV7511_REG_CTS_AUTOMATIC1:86case ADV7511_REG_CTS_AUTOMATIC2:87case ADV7511_REG_VIC_DETECTED:88case ADV7511_REG_VIC_SEND:89case ADV7511_REG_AUX_VIC_DETECTED:90case ADV7511_REG_STATUS:91case ADV7511_REG_GC(1):92case ADV7511_REG_INT(0):93case ADV7511_REG_INT(1):94case ADV7511_REG_PLL_STATUS:95case ADV7511_REG_AN(0):96case ADV7511_REG_AN(1):97case ADV7511_REG_AN(2):98case ADV7511_REG_AN(3):99case ADV7511_REG_AN(4):100case ADV7511_REG_AN(5):101case ADV7511_REG_AN(6):102case ADV7511_REG_AN(7):103case ADV7511_REG_HDCP_STATUS:104case ADV7511_REG_BCAPS:105case ADV7511_REG_BKSV(0):106case ADV7511_REG_BKSV(1):107case ADV7511_REG_BKSV(2):108case ADV7511_REG_BKSV(3):109case ADV7511_REG_BKSV(4):110case ADV7511_REG_DDC_STATUS:111case ADV7511_REG_EDID_READ_CTRL:112case ADV7511_REG_BSTATUS(0):113case ADV7511_REG_BSTATUS(1):114case ADV7511_REG_CHIP_ID_HIGH:115case ADV7511_REG_CHIP_ID_LOW:116return true;117}118119return false;120}121122static const struct regmap_config adv7511_regmap_config = {123.reg_bits = 8,124.val_bits = 8,125126.max_register = 0xff,127.cache_type = REGCACHE_MAPLE,128.reg_defaults_raw = adv7511_register_defaults,129.num_reg_defaults_raw = ARRAY_SIZE(adv7511_register_defaults),130131.volatile_reg = adv7511_register_volatile,132};133134static const struct regmap_config adv7511_packet_config = {135.reg_bits = 8,136.val_bits = 8,137138.max_register = 0xff,139};140141/* -----------------------------------------------------------------------------142* Hardware configuration143*/144145static void adv7511_set_colormap(struct adv7511 *adv7511, bool enable,146const uint16_t *coeff,147unsigned int scaling_factor)148{149unsigned int i;150151regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(1),152ADV7511_CSC_UPDATE_MODE, ADV7511_CSC_UPDATE_MODE);153154if (enable) {155for (i = 0; i < 12; ++i) {156regmap_update_bits(adv7511->regmap,157ADV7511_REG_CSC_UPPER(i),1580x1f, coeff[i] >> 8);159regmap_write(adv7511->regmap,160ADV7511_REG_CSC_LOWER(i),161coeff[i] & 0xff);162}163}164165if (enable)166regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(0),1670xe0, 0x80 | (scaling_factor << 5));168else169regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(0),1700x80, 0x00);171172regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(1),173ADV7511_CSC_UPDATE_MODE, 0);174}175176static int adv7511_packet_enable(struct adv7511 *adv7511, unsigned int packet)177{178if (packet & 0xff)179regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE0,180packet, 0xff);181182if (packet & 0xff00) {183packet >>= 8;184regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE1,185packet, 0xff);186}187188return 0;189}190191static int adv7511_packet_disable(struct adv7511 *adv7511, unsigned int packet)192{193if (packet & 0xff)194regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE0,195packet, 0x00);196197if (packet & 0xff00) {198packet >>= 8;199regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE1,200packet, 0x00);201}202203return 0;204}205206/* Coefficients for adv7511 color space conversion */207static const uint16_t adv7511_csc_ycbcr_to_rgb[] = {2080x0734, 0x04ad, 0x0000, 0x1c1b,2090x1ddc, 0x04ad, 0x1f24, 0x0135,2100x0000, 0x04ad, 0x087c, 0x1b77,211};212213static void adv7511_set_config_csc(struct adv7511 *adv7511,214struct drm_connector *connector,215bool rgb)216{217struct adv7511_video_config config;218bool output_format_422, output_format_ycbcr;219unsigned int mode;220221if (rgb) {222config.csc_enable = false;223output_format_422 = false;224output_format_ycbcr = false;225} else {226config.csc_scaling_factor = ADV7511_CSC_SCALING_4;227config.csc_coefficents = adv7511_csc_ycbcr_to_rgb;228229if ((connector->display_info.color_formats &230DRM_COLOR_FORMAT_YCBCR422) &&231connector->display_info.is_hdmi) {232config.csc_enable = false;233output_format_422 = true;234output_format_ycbcr = true;235} else {236config.csc_enable = true;237output_format_422 = false;238output_format_ycbcr = false;239}240}241242if (connector->display_info.is_hdmi)243mode = ADV7511_HDMI_CFG_MODE_HDMI;244else245mode = ADV7511_HDMI_CFG_MODE_DVI;246247adv7511_set_colormap(adv7511, config.csc_enable,248config.csc_coefficents,249config.csc_scaling_factor);250251regmap_update_bits(adv7511->regmap, ADV7511_REG_VIDEO_INPUT_CFG1, 0x81,252(output_format_422 << 7) | output_format_ycbcr);253254regmap_update_bits(adv7511->regmap, ADV7511_REG_HDCP_HDMI_CFG,255ADV7511_HDMI_CFG_MODE_MASK, mode);256}257258static void adv7511_set_link_config(struct adv7511 *adv7511,259const struct adv7511_link_config *config)260{261/*262* The input style values documented in the datasheet don't match the263* hardware register field values :-(264*/265static const unsigned int input_styles[4] = { 0, 2, 1, 3 };266267unsigned int clock_delay;268unsigned int color_depth;269unsigned int input_id;270271clock_delay = (config->clock_delay + 1200) / 400;272color_depth = config->input_color_depth == 8 ? 3273: (config->input_color_depth == 10 ? 1 : 2);274275/* TODO Support input ID 6 */276if (config->input_colorspace != HDMI_COLORSPACE_YUV422)277input_id = config->input_clock == ADV7511_INPUT_CLOCK_DDR278? 5 : 0;279else if (config->input_clock == ADV7511_INPUT_CLOCK_DDR)280input_id = config->embedded_sync ? 8 : 7;281else if (config->input_clock == ADV7511_INPUT_CLOCK_2X)282input_id = config->embedded_sync ? 4 : 3;283else284input_id = config->embedded_sync ? 2 : 1;285286regmap_update_bits(adv7511->regmap, ADV7511_REG_I2C_FREQ_ID_CFG, 0xf,287input_id);288regmap_update_bits(adv7511->regmap, ADV7511_REG_VIDEO_INPUT_CFG1, 0x7e,289(color_depth << 4) |290(input_styles[config->input_style] << 2));291regmap_write(adv7511->regmap, ADV7511_REG_VIDEO_INPUT_CFG2,292config->input_justification << 3);293regmap_write(adv7511->regmap, ADV7511_REG_TIMING_GEN_SEQ,294config->sync_pulse << 2);295296regmap_write(adv7511->regmap, 0xba, clock_delay << 5);297298adv7511->embedded_sync = config->embedded_sync;299adv7511->hsync_polarity = config->hsync_polarity;300adv7511->vsync_polarity = config->vsync_polarity;301adv7511->rgb = config->input_colorspace == HDMI_COLORSPACE_RGB;302}303304static void __adv7511_power_on(struct adv7511 *adv7511)305{306adv7511->current_edid_segment = -1;307308regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,309ADV7511_POWER_POWER_DOWN, 0);310if (adv7511->i2c_main->irq) {311/*312* Documentation says the INT_ENABLE registers are reset in313* POWER_DOWN mode. My 7511w preserved the bits, however.314* Still, let's be safe and stick to the documentation.315*/316regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(0),317ADV7511_INT0_EDID_READY | ADV7511_INT0_HPD);318regmap_update_bits(adv7511->regmap,319ADV7511_REG_INT_ENABLE(1),320ADV7511_INT1_DDC_ERROR,321ADV7511_INT1_DDC_ERROR);322}323324/*325* Per spec it is allowed to pulse the HPD signal to indicate that the326* EDID information has changed. Some monitors do this when they wakeup327* from standby or are enabled. When the HPD goes low the adv7511 is328* reset and the outputs are disabled which might cause the monitor to329* go to standby again. To avoid this we ignore the HPD pin for the330* first few seconds after enabling the output. On the other hand331* adv7535 require to enable HPD Override bit for proper HPD.332*/333if (adv7511->info->hpd_override_enable)334regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER2,335ADV7535_REG_POWER2_HPD_OVERRIDE,336ADV7535_REG_POWER2_HPD_OVERRIDE);337else338regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER2,339ADV7511_REG_POWER2_HPD_SRC_MASK,340ADV7511_REG_POWER2_HPD_SRC_NONE);341}342343static void adv7511_power_on(struct adv7511 *adv7511)344{345__adv7511_power_on(adv7511);346347/*348* Most of the registers are reset during power down or when HPD is low.349*/350regcache_sync(adv7511->regmap);351352if (adv7511->info->has_dsi)353adv7533_dsi_power_on(adv7511);354adv7511->powered = true;355}356357static void __adv7511_power_off(struct adv7511 *adv7511)358{359/* TODO: setup additional power down modes */360if (adv7511->info->hpd_override_enable)361regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER2,362ADV7535_REG_POWER2_HPD_OVERRIDE, 0);363364regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,365ADV7511_POWER_POWER_DOWN,366ADV7511_POWER_POWER_DOWN);367regmap_update_bits(adv7511->regmap,368ADV7511_REG_INT_ENABLE(1),369ADV7511_INT1_DDC_ERROR, 0);370regcache_mark_dirty(adv7511->regmap);371}372373static void adv7511_power_off(struct adv7511 *adv7511)374{375__adv7511_power_off(adv7511);376if (adv7511->info->has_dsi)377adv7533_dsi_power_off(adv7511);378adv7511->powered = false;379}380381/* -----------------------------------------------------------------------------382* Interrupt and hotplug detection383*/384385static bool adv7511_hpd(struct adv7511 *adv7511)386{387unsigned int irq0;388int ret;389390ret = regmap_read(adv7511->regmap, ADV7511_REG_INT(0), &irq0);391if (ret < 0)392return false;393394if (irq0 & ADV7511_INT0_HPD) {395regmap_write(adv7511->regmap, ADV7511_REG_INT(0),396ADV7511_INT0_HPD);397return true;398}399400return false;401}402403static void adv7511_hpd_work(struct work_struct *work)404{405struct adv7511 *adv7511 = container_of(work, struct adv7511, hpd_work);406enum drm_connector_status status;407unsigned int val;408int ret;409410ret = regmap_read(adv7511->regmap, ADV7511_REG_STATUS, &val);411if (ret < 0)412status = connector_status_disconnected;413else if (val & ADV7511_STATUS_HPD)414status = connector_status_connected;415else416status = connector_status_disconnected;417418/*419* The bridge resets its registers on unplug. So when we get a plug420* event and we're already supposed to be powered, cycle the bridge to421* restore its state.422*/423if (status == connector_status_connected &&424adv7511->status == connector_status_disconnected &&425adv7511->powered) {426regcache_mark_dirty(adv7511->regmap);427adv7511_power_on(adv7511);428}429430if (adv7511->status != status) {431adv7511->status = status;432433drm_bridge_hpd_notify(&adv7511->bridge, status);434}435}436437static int adv7511_irq_process(struct adv7511 *adv7511, bool process_hpd)438{439unsigned int irq0, irq1;440int ret;441int cec_status = IRQ_NONE;442int irq_status = IRQ_NONE;443444ret = regmap_read(adv7511->regmap, ADV7511_REG_INT(0), &irq0);445if (ret < 0)446return ret;447448ret = regmap_read(adv7511->regmap, ADV7511_REG_INT(1), &irq1);449if (ret < 0)450return ret;451452regmap_write(adv7511->regmap, ADV7511_REG_INT(0), irq0);453regmap_write(adv7511->regmap, ADV7511_REG_INT(1), irq1);454455if (process_hpd && irq0 & ADV7511_INT0_HPD && adv7511->bridge.encoder) {456schedule_work(&adv7511->hpd_work);457irq_status = IRQ_HANDLED;458}459460if (irq0 & ADV7511_INT0_EDID_READY || irq1 & ADV7511_INT1_DDC_ERROR) {461adv7511->edid_read = true;462463if (adv7511->i2c_main->irq)464wake_up_all(&adv7511->wq);465irq_status = IRQ_HANDLED;466}467468#ifdef CONFIG_DRM_I2C_ADV7511_CEC469cec_status = adv7511_cec_irq_process(adv7511, irq1);470#endif471472/* If there is no IRQ to handle, exit indicating no IRQ data */473if (irq_status == IRQ_HANDLED || cec_status == IRQ_HANDLED)474return IRQ_HANDLED;475476return IRQ_NONE;477}478479static irqreturn_t adv7511_irq_handler(int irq, void *devid)480{481struct adv7511 *adv7511 = devid;482int ret;483484ret = adv7511_irq_process(adv7511, true);485return ret < 0 ? IRQ_NONE : ret;486}487488/* -----------------------------------------------------------------------------489* EDID retrieval490*/491492static int adv7511_wait_for_edid(struct adv7511 *adv7511, int timeout)493{494int ret;495496if (adv7511->i2c_main->irq) {497ret = wait_event_interruptible_timeout(adv7511->wq,498adv7511->edid_read, msecs_to_jiffies(timeout));499} else {500for (; timeout > 0; timeout -= 25) {501ret = adv7511_irq_process(adv7511, false);502if (ret < 0)503break;504505if (adv7511->edid_read)506break;507508msleep(25);509}510}511512return adv7511->edid_read ? 0 : -EIO;513}514515static int adv7511_get_edid_block(void *data, u8 *buf, unsigned int block,516size_t len)517{518struct adv7511 *adv7511 = data;519struct i2c_msg xfer[2];520uint8_t offset;521unsigned int i;522int ret;523524if (len > 128)525return -EINVAL;526527if (adv7511->current_edid_segment != block / 2) {528unsigned int status;529530ret = regmap_read(adv7511->regmap, ADV7511_REG_DDC_STATUS,531&status);532if (ret < 0)533return ret;534535if (status != 2) {536adv7511->edid_read = false;537regmap_write(adv7511->regmap, ADV7511_REG_EDID_SEGMENT,538block);539ret = adv7511_wait_for_edid(adv7511, 200);540if (ret < 0)541return ret;542}543544/* Break this apart, hopefully more I2C controllers will545* support 64 byte transfers than 256 byte transfers546*/547548xfer[0].addr = adv7511->i2c_edid->addr;549xfer[0].flags = 0;550xfer[0].len = 1;551xfer[0].buf = &offset;552xfer[1].addr = adv7511->i2c_edid->addr;553xfer[1].flags = I2C_M_RD;554xfer[1].len = 64;555xfer[1].buf = adv7511->edid_buf;556557offset = 0;558559for (i = 0; i < 4; ++i) {560ret = i2c_transfer(adv7511->i2c_edid->adapter, xfer,561ARRAY_SIZE(xfer));562if (ret < 0)563return ret;564else if (ret != 2)565return -EIO;566567xfer[1].buf += 64;568offset += 64;569}570571adv7511->current_edid_segment = block / 2;572}573574if (block % 2 == 0)575memcpy(buf, adv7511->edid_buf, len);576else577memcpy(buf, adv7511->edid_buf + 128, len);578579return 0;580}581582/* -----------------------------------------------------------------------------583* ADV75xx helpers584*/585586static const struct drm_edid *adv7511_edid_read(struct adv7511 *adv7511,587struct drm_connector *connector)588{589const struct drm_edid *drm_edid;590591/* Reading the EDID only works if the device is powered */592if (!adv7511->powered) {593unsigned int edid_i2c_addr =594(adv7511->i2c_edid->addr << 1);595596__adv7511_power_on(adv7511);597598/* Reset the EDID_I2C_ADDR register as it might be cleared */599regmap_write(adv7511->regmap, ADV7511_REG_EDID_I2C_ADDR,600edid_i2c_addr);601}602603drm_edid = drm_edid_read_custom(connector, adv7511_get_edid_block, adv7511);604605if (!adv7511->powered)606__adv7511_power_off(adv7511);607608return drm_edid;609}610611static enum drm_connector_status612adv7511_detect(struct adv7511 *adv7511)613{614enum drm_connector_status status;615unsigned int val;616bool hpd;617int ret;618619ret = regmap_read(adv7511->regmap, ADV7511_REG_STATUS, &val);620if (ret < 0)621return connector_status_disconnected;622623if (val & ADV7511_STATUS_HPD)624status = connector_status_connected;625else626status = connector_status_disconnected;627628hpd = adv7511_hpd(adv7511);629630/* The chip resets itself when the cable is disconnected, so in case631* there is a pending HPD interrupt and the cable is connected there was632* at least one transition from disconnected to connected and the chip633* has to be reinitialized. */634if (status == connector_status_connected && hpd && adv7511->powered) {635regcache_mark_dirty(adv7511->regmap);636adv7511_power_on(adv7511);637if (adv7511->status == connector_status_connected)638status = connector_status_disconnected;639} else {640/* Renable HPD sensing */641if (adv7511->info->hpd_override_enable)642regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER2,643ADV7535_REG_POWER2_HPD_OVERRIDE,644ADV7535_REG_POWER2_HPD_OVERRIDE);645else646regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER2,647ADV7511_REG_POWER2_HPD_SRC_MASK,648ADV7511_REG_POWER2_HPD_SRC_BOTH);649}650651adv7511->status = status;652return status;653}654655static void adv7511_mode_set(struct adv7511 *adv7511,656const struct drm_display_mode *adj_mode)657{658unsigned int low_refresh_rate;659unsigned int hsync_polarity = 0;660unsigned int vsync_polarity = 0;661662if (adv7511->embedded_sync) {663unsigned int hsync_offset, hsync_len;664unsigned int vsync_offset, vsync_len;665666hsync_offset = adj_mode->crtc_hsync_start -667adj_mode->crtc_hdisplay;668vsync_offset = adj_mode->crtc_vsync_start -669adj_mode->crtc_vdisplay;670hsync_len = adj_mode->crtc_hsync_end -671adj_mode->crtc_hsync_start;672vsync_len = adj_mode->crtc_vsync_end -673adj_mode->crtc_vsync_start;674675/* The hardware vsync generator has a off-by-one bug */676vsync_offset += 1;677678regmap_write(adv7511->regmap, ADV7511_REG_HSYNC_PLACEMENT_MSB,679((hsync_offset >> 10) & 0x7) << 5);680regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(0),681(hsync_offset >> 2) & 0xff);682regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(1),683((hsync_offset & 0x3) << 6) |684((hsync_len >> 4) & 0x3f));685regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(2),686((hsync_len & 0xf) << 4) |687((vsync_offset >> 6) & 0xf));688regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(3),689((vsync_offset & 0x3f) << 2) |690((vsync_len >> 8) & 0x3));691regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(4),692vsync_len & 0xff);693694hsync_polarity = !(adj_mode->flags & DRM_MODE_FLAG_PHSYNC);695vsync_polarity = !(adj_mode->flags & DRM_MODE_FLAG_PVSYNC);696} else {697enum adv7511_sync_polarity mode_hsync_polarity;698enum adv7511_sync_polarity mode_vsync_polarity;699700/**701* If the input signal is always low or always high we want to702* invert or let it passthrough depending on the polarity of the703* current mode.704**/705if (adj_mode->flags & DRM_MODE_FLAG_NHSYNC)706mode_hsync_polarity = ADV7511_SYNC_POLARITY_LOW;707else708mode_hsync_polarity = ADV7511_SYNC_POLARITY_HIGH;709710if (adj_mode->flags & DRM_MODE_FLAG_NVSYNC)711mode_vsync_polarity = ADV7511_SYNC_POLARITY_LOW;712else713mode_vsync_polarity = ADV7511_SYNC_POLARITY_HIGH;714715if (adv7511->hsync_polarity != mode_hsync_polarity &&716adv7511->hsync_polarity !=717ADV7511_SYNC_POLARITY_PASSTHROUGH)718hsync_polarity = 1;719720if (adv7511->vsync_polarity != mode_vsync_polarity &&721adv7511->vsync_polarity !=722ADV7511_SYNC_POLARITY_PASSTHROUGH)723vsync_polarity = 1;724}725726if (drm_mode_vrefresh(adj_mode) <= 24)727low_refresh_rate = ADV7511_LOW_REFRESH_RATE_24HZ;728else if (drm_mode_vrefresh(adj_mode) <= 25)729low_refresh_rate = ADV7511_LOW_REFRESH_RATE_25HZ;730else if (drm_mode_vrefresh(adj_mode) <= 30)731low_refresh_rate = ADV7511_LOW_REFRESH_RATE_30HZ;732else733low_refresh_rate = ADV7511_LOW_REFRESH_RATE_NONE;734735if (adv7511->info->type == ADV7511)736regmap_update_bits(adv7511->regmap, 0xfb,7370x6, low_refresh_rate << 1);738else739regmap_update_bits(adv7511->regmap, 0x4a,7400xc, low_refresh_rate << 2);741742regmap_update_bits(adv7511->regmap, 0x17,7430x60, (vsync_polarity << 6) | (hsync_polarity << 5));744745drm_mode_copy(&adv7511->curr_mode, adj_mode);746747/* Update horizontal/vertical porch params */748if (adv7511->info->has_dsi && adv7511->use_timing_gen)749adv7533_dsi_config_timing_gen(adv7511);750751/*752* TODO Test first order 4:2:2 to 4:4:4 up conversion method, which is753* supposed to give better results.754*/755756adv7511->f_tmds = adj_mode->clock;757}758759static int adv7511_connector_init(struct adv7511 *adv)760{761struct drm_bridge *bridge = &adv->bridge;762struct drm_connector *connector;763764connector = drm_bridge_connector_init(bridge->dev, bridge->encoder);765if (IS_ERR(connector)) {766DRM_ERROR("Failed to initialize connector with drm\n");767return PTR_ERR(connector);768}769770drm_connector_attach_encoder(connector, bridge->encoder);771772return 0;773}774775/* -----------------------------------------------------------------------------776* DRM Bridge Operations777*/778779static const struct adv7511 *bridge_to_adv7511_const(const struct drm_bridge *bridge)780{781return container_of(bridge, struct adv7511, bridge);782}783784static void adv7511_bridge_atomic_enable(struct drm_bridge *bridge,785struct drm_atomic_state *state)786{787struct adv7511 *adv = bridge_to_adv7511(bridge);788struct drm_connector *connector;789struct drm_connector_state *conn_state;790struct drm_crtc_state *crtc_state;791792adv7511_power_on(adv);793794connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder);795if (WARN_ON(!connector))796return;797798conn_state = drm_atomic_get_new_connector_state(state, connector);799if (WARN_ON(!conn_state))800return;801802crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);803if (WARN_ON(!crtc_state))804return;805806adv7511_set_config_csc(adv, connector, adv->rgb);807808adv7511_mode_set(adv, &crtc_state->adjusted_mode);809810drm_atomic_helper_connector_hdmi_update_infoframes(connector, state);811}812813static void adv7511_bridge_atomic_disable(struct drm_bridge *bridge,814struct drm_atomic_state *state)815{816struct adv7511 *adv = bridge_to_adv7511(bridge);817818adv7511_power_off(adv);819}820821static enum drm_mode_status822adv7511_bridge_hdmi_tmds_char_rate_valid(const struct drm_bridge *bridge,823const struct drm_display_mode *mode,824unsigned long long tmds_rate)825{826const struct adv7511 *adv = bridge_to_adv7511_const(bridge);827828if (tmds_rate > 1000ULL * adv->info->max_mode_clock_khz)829return MODE_CLOCK_HIGH;830831return MODE_OK;832}833834static enum drm_mode_status adv7511_bridge_mode_valid(struct drm_bridge *bridge,835const struct drm_display_info *info,836const struct drm_display_mode *mode)837{838struct adv7511 *adv = bridge_to_adv7511(bridge);839840if (!adv->info->has_dsi)841return MODE_OK;842843return adv7533_mode_valid(adv, mode);844}845846static int adv7511_bridge_attach(struct drm_bridge *bridge,847struct drm_encoder *encoder,848enum drm_bridge_attach_flags flags)849{850struct adv7511 *adv = bridge_to_adv7511(bridge);851int ret = 0;852853if (adv->next_bridge) {854ret = drm_bridge_attach(encoder, adv->next_bridge, bridge,855flags | DRM_BRIDGE_ATTACH_NO_CONNECTOR);856if (ret)857return ret;858}859860if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)) {861ret = adv7511_connector_init(adv);862if (ret < 0)863return ret;864}865866if (adv->i2c_main->irq)867regmap_write(adv->regmap, ADV7511_REG_INT_ENABLE(0),868ADV7511_INT0_HPD);869870return ret;871}872873static enum drm_connector_status874adv7511_bridge_detect(struct drm_bridge *bridge, struct drm_connector *connector)875{876struct adv7511 *adv = bridge_to_adv7511(bridge);877878return adv7511_detect(adv);879}880881static const struct drm_edid *adv7511_bridge_edid_read(struct drm_bridge *bridge,882struct drm_connector *connector)883{884struct adv7511 *adv = bridge_to_adv7511(bridge);885886return adv7511_edid_read(adv, connector);887}888889static int adv7511_bridge_hdmi_clear_infoframe(struct drm_bridge *bridge,890enum hdmi_infoframe_type type)891{892struct adv7511 *adv7511 = bridge_to_adv7511(bridge);893894switch (type) {895case HDMI_INFOFRAME_TYPE_AUDIO:896adv7511_packet_disable(adv7511, ADV7511_PACKET_ENABLE_AUDIO_INFOFRAME);897break;898case HDMI_INFOFRAME_TYPE_AVI:899adv7511_packet_disable(adv7511, ADV7511_PACKET_ENABLE_AVI_INFOFRAME);900break;901case HDMI_INFOFRAME_TYPE_SPD:902adv7511_packet_disable(adv7511, ADV7511_PACKET_ENABLE_SPD);903break;904case HDMI_INFOFRAME_TYPE_VENDOR:905adv7511_packet_disable(adv7511, ADV7511_PACKET_ENABLE_SPARE1);906break;907default:908drm_dbg_driver(adv7511->bridge.dev, "Unsupported HDMI InfoFrame %x\n", type);909break;910}911912return 0;913}914915static int adv7511_bridge_hdmi_write_infoframe(struct drm_bridge *bridge,916enum hdmi_infoframe_type type,917const u8 *buffer, size_t len)918{919struct adv7511 *adv7511 = bridge_to_adv7511(bridge);920921switch (type) {922case HDMI_INFOFRAME_TYPE_AUDIO:923/* send current Audio infoframe values while updating */924regmap_update_bits(adv7511->regmap, ADV7511_REG_INFOFRAME_UPDATE,925BIT(5), BIT(5));926927/* The Audio infoframe id is not configurable */928regmap_bulk_write(adv7511->regmap, ADV7511_REG_AUDIO_INFOFRAME_VERSION,929buffer + 1, len - 1);930931/* use Audio infoframe updated info */932regmap_update_bits(adv7511->regmap, ADV7511_REG_INFOFRAME_UPDATE,933BIT(5), 0);934935adv7511_packet_enable(adv7511, ADV7511_PACKET_ENABLE_AUDIO_INFOFRAME);936break;937case HDMI_INFOFRAME_TYPE_AVI:938/* send current AVI infoframe values while updating */939regmap_update_bits(adv7511->regmap, ADV7511_REG_INFOFRAME_UPDATE,940BIT(6), BIT(6));941942/* The AVI infoframe id is not configurable */943regmap_bulk_write(adv7511->regmap, ADV7511_REG_AVI_INFOFRAME_VERSION,944buffer + 1, len - 1);945946regmap_write(adv7511->regmap, ADV7511_REG_AUDIO_INFOFRAME_LENGTH, 0x2);947regmap_write(adv7511->regmap, ADV7511_REG_AUDIO_INFOFRAME(1), 0x1);948949/* use AVI infoframe updated info */950regmap_update_bits(adv7511->regmap, ADV7511_REG_INFOFRAME_UPDATE,951BIT(6), 0);952953adv7511_packet_enable(adv7511, ADV7511_PACKET_ENABLE_AVI_INFOFRAME);954break;955case HDMI_INFOFRAME_TYPE_SPD:956adv7511_packet_disable(adv7511, ADV7511_PACKET_ENABLE_SPD);957regmap_bulk_write(adv7511->regmap_packet, ADV7511_PACKET_SPD(0),958buffer, len);959adv7511_packet_enable(adv7511, ADV7511_PACKET_ENABLE_SPD);960break;961case HDMI_INFOFRAME_TYPE_VENDOR:962adv7511_packet_disable(adv7511, ADV7511_PACKET_ENABLE_SPARE1);963regmap_bulk_write(adv7511->regmap_packet, ADV7511_PACKET_SPARE1(0),964buffer, len);965adv7511_packet_enable(adv7511, ADV7511_PACKET_ENABLE_SPARE1);966break;967default:968drm_dbg_driver(adv7511->bridge.dev, "Unsupported HDMI InfoFrame %x\n", type);969break;970}971972return 0;973}974975static const struct drm_bridge_funcs adv7511_bridge_funcs = {976.mode_valid = adv7511_bridge_mode_valid,977.attach = adv7511_bridge_attach,978.detect = adv7511_bridge_detect,979.edid_read = adv7511_bridge_edid_read,980981.atomic_enable = adv7511_bridge_atomic_enable,982.atomic_disable = adv7511_bridge_atomic_disable,983.atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,984.atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,985.atomic_reset = drm_atomic_helper_bridge_reset,986987.hdmi_tmds_char_rate_valid = adv7511_bridge_hdmi_tmds_char_rate_valid,988.hdmi_clear_infoframe = adv7511_bridge_hdmi_clear_infoframe,989.hdmi_write_infoframe = adv7511_bridge_hdmi_write_infoframe,990991.hdmi_audio_startup = adv7511_hdmi_audio_startup,992.hdmi_audio_prepare = adv7511_hdmi_audio_prepare,993.hdmi_audio_shutdown = adv7511_hdmi_audio_shutdown,994995.hdmi_cec_init = adv7511_cec_init,996.hdmi_cec_enable = adv7511_cec_enable,997.hdmi_cec_log_addr = adv7511_cec_log_addr,998.hdmi_cec_transmit = adv7511_cec_transmit,999};10001001/* -----------------------------------------------------------------------------1002* Probe & remove1003*/10041005static const char * const adv7511_supply_names[] = {1006"avdd",1007"dvdd",1008"pvdd",1009"bgvdd",1010"dvdd-3v",1011};10121013static const char * const adv7533_supply_names[] = {1014"avdd",1015"dvdd",1016"pvdd",1017"a2vdd",1018"v3p3",1019"v1p2",1020};10211022static int adv7511_init_regulators(struct adv7511 *adv)1023{1024const char * const *supply_names = adv->info->supply_names;1025unsigned int num_supplies = adv->info->num_supplies;1026struct device *dev = &adv->i2c_main->dev;1027unsigned int i;1028int ret;10291030adv->supplies = devm_kcalloc(dev, num_supplies,1031sizeof(*adv->supplies), GFP_KERNEL);1032if (!adv->supplies)1033return -ENOMEM;10341035for (i = 0; i < num_supplies; i++)1036adv->supplies[i].supply = supply_names[i];10371038ret = devm_regulator_bulk_get(dev, num_supplies, adv->supplies);1039if (ret)1040return ret;10411042return regulator_bulk_enable(num_supplies, adv->supplies);1043}10441045static void adv7511_uninit_regulators(struct adv7511 *adv)1046{1047regulator_bulk_disable(adv->info->num_supplies, adv->supplies);1048}10491050static bool adv7511_cec_register_volatile(struct device *dev, unsigned int reg)1051{1052struct i2c_client *i2c = to_i2c_client(dev);1053struct adv7511 *adv7511 = i2c_get_clientdata(i2c);10541055reg -= adv7511->info->reg_cec_offset;10561057switch (reg) {1058case ADV7511_REG_CEC_RX1_FRAME_HDR:1059case ADV7511_REG_CEC_RX1_FRAME_DATA0 ... ADV7511_REG_CEC_RX1_FRAME_DATA0 + 14:1060case ADV7511_REG_CEC_RX1_FRAME_LEN:1061case ADV7511_REG_CEC_RX2_FRAME_HDR:1062case ADV7511_REG_CEC_RX2_FRAME_DATA0 ... ADV7511_REG_CEC_RX2_FRAME_DATA0 + 14:1063case ADV7511_REG_CEC_RX2_FRAME_LEN:1064case ADV7511_REG_CEC_RX3_FRAME_HDR:1065case ADV7511_REG_CEC_RX3_FRAME_DATA0 ... ADV7511_REG_CEC_RX3_FRAME_DATA0 + 14:1066case ADV7511_REG_CEC_RX3_FRAME_LEN:1067case ADV7511_REG_CEC_RX_STATUS:1068case ADV7511_REG_CEC_RX_BUFFERS:1069case ADV7511_REG_CEC_TX_LOW_DRV_CNT:1070return true;1071}10721073return false;1074}10751076static const struct regmap_config adv7511_cec_regmap_config = {1077.reg_bits = 8,1078.val_bits = 8,10791080.max_register = 0xff,1081.cache_type = REGCACHE_MAPLE,1082.volatile_reg = adv7511_cec_register_volatile,1083};10841085static int adv7511_init_cec_regmap(struct adv7511 *adv)1086{1087int ret;10881089adv->i2c_cec = i2c_new_ancillary_device(adv->i2c_main, "cec",1090ADV7511_CEC_I2C_ADDR_DEFAULT);1091if (IS_ERR(adv->i2c_cec))1092return PTR_ERR(adv->i2c_cec);10931094regmap_write(adv->regmap, ADV7511_REG_CEC_I2C_ADDR,1095adv->i2c_cec->addr << 1);10961097i2c_set_clientdata(adv->i2c_cec, adv);10981099adv->regmap_cec = devm_regmap_init_i2c(adv->i2c_cec,1100&adv7511_cec_regmap_config);1101if (IS_ERR(adv->regmap_cec)) {1102ret = PTR_ERR(adv->regmap_cec);1103goto err;1104}11051106if (adv->info->reg_cec_offset == ADV7533_REG_CEC_OFFSET) {1107ret = adv7533_patch_cec_registers(adv);1108if (ret)1109goto err;1110}11111112return 0;1113err:1114i2c_unregister_device(adv->i2c_cec);1115return ret;1116}11171118static int adv7511_parse_dt(struct device_node *np,1119struct adv7511_link_config *config)1120{1121const char *str;1122int ret;11231124of_property_read_u32(np, "adi,input-depth", &config->input_color_depth);1125if (config->input_color_depth != 8 && config->input_color_depth != 10 &&1126config->input_color_depth != 12)1127return -EINVAL;11281129ret = of_property_read_string(np, "adi,input-colorspace", &str);1130if (ret < 0)1131return ret;11321133if (!strcmp(str, "rgb"))1134config->input_colorspace = HDMI_COLORSPACE_RGB;1135else if (!strcmp(str, "yuv422"))1136config->input_colorspace = HDMI_COLORSPACE_YUV422;1137else if (!strcmp(str, "yuv444"))1138config->input_colorspace = HDMI_COLORSPACE_YUV444;1139else1140return -EINVAL;11411142ret = of_property_read_string(np, "adi,input-clock", &str);1143if (ret < 0)1144return ret;11451146if (!strcmp(str, "1x"))1147config->input_clock = ADV7511_INPUT_CLOCK_1X;1148else if (!strcmp(str, "2x"))1149config->input_clock = ADV7511_INPUT_CLOCK_2X;1150else if (!strcmp(str, "ddr"))1151config->input_clock = ADV7511_INPUT_CLOCK_DDR;1152else1153return -EINVAL;11541155if (config->input_colorspace == HDMI_COLORSPACE_YUV422 ||1156config->input_clock != ADV7511_INPUT_CLOCK_1X) {1157ret = of_property_read_u32(np, "adi,input-style",1158&config->input_style);1159if (ret)1160return ret;11611162if (config->input_style < 1 || config->input_style > 3)1163return -EINVAL;11641165ret = of_property_read_string(np, "adi,input-justification",1166&str);1167if (ret < 0)1168return ret;11691170if (!strcmp(str, "left"))1171config->input_justification =1172ADV7511_INPUT_JUSTIFICATION_LEFT;1173else if (!strcmp(str, "evenly"))1174config->input_justification =1175ADV7511_INPUT_JUSTIFICATION_EVENLY;1176else if (!strcmp(str, "right"))1177config->input_justification =1178ADV7511_INPUT_JUSTIFICATION_RIGHT;1179else1180return -EINVAL;11811182} else {1183config->input_style = 1;1184config->input_justification = ADV7511_INPUT_JUSTIFICATION_LEFT;1185}11861187of_property_read_u32(np, "adi,clock-delay", &config->clock_delay);1188if (config->clock_delay < -1200 || config->clock_delay > 1600)1189return -EINVAL;11901191config->embedded_sync = of_property_read_bool(np, "adi,embedded-sync");11921193/* Hardcode the sync pulse configurations for now. */1194config->sync_pulse = ADV7511_INPUT_SYNC_PULSE_NONE;1195config->vsync_polarity = ADV7511_SYNC_POLARITY_PASSTHROUGH;1196config->hsync_polarity = ADV7511_SYNC_POLARITY_PASSTHROUGH;11971198return 0;1199}12001201static int adv7511_probe(struct i2c_client *i2c)1202{1203struct adv7511_link_config link_config;1204struct adv7511 *adv7511;1205struct device *dev = &i2c->dev;1206unsigned int val;1207int ret;12081209if (!dev->of_node)1210return -EINVAL;12111212adv7511 = devm_drm_bridge_alloc(dev, struct adv7511, bridge,1213&adv7511_bridge_funcs);1214if (IS_ERR(adv7511))1215return PTR_ERR(adv7511);12161217adv7511->i2c_main = i2c;1218adv7511->powered = false;1219adv7511->status = connector_status_disconnected;1220adv7511->info = i2c_get_match_data(i2c);12211222memset(&link_config, 0, sizeof(link_config));12231224ret = drm_of_find_panel_or_bridge(dev->of_node, 1, -1, NULL,1225&adv7511->next_bridge);1226if (ret && ret != -ENODEV)1227return ret;12281229if (adv7511->info->link_config)1230ret = adv7511_parse_dt(dev->of_node, &link_config);1231else1232ret = adv7533_parse_dt(dev->of_node, adv7511);1233if (ret)1234return ret;12351236ret = adv7511_init_regulators(adv7511);1237if (ret) {1238dev_err_probe(dev, ret, "failed to init regulators\n");1239goto err_of_node_put;1240}12411242/*1243* The power down GPIO is optional. If present, toggle it from active to1244* inactive to wake up the encoder.1245*/1246adv7511->gpio_pd = devm_gpiod_get_optional(dev, "pd", GPIOD_OUT_HIGH);1247if (IS_ERR(adv7511->gpio_pd)) {1248ret = PTR_ERR(adv7511->gpio_pd);1249goto uninit_regulators;1250}12511252if (adv7511->gpio_pd) {1253usleep_range(5000, 6000);1254gpiod_set_value_cansleep(adv7511->gpio_pd, 0);1255}12561257adv7511->regmap = devm_regmap_init_i2c(i2c, &adv7511_regmap_config);1258if (IS_ERR(adv7511->regmap)) {1259ret = PTR_ERR(adv7511->regmap);1260goto uninit_regulators;1261}12621263ret = regmap_read(adv7511->regmap, ADV7511_REG_CHIP_REVISION, &val);1264if (ret)1265goto uninit_regulators;1266dev_dbg(dev, "Rev. %d\n", val);12671268if (adv7511->info->type == ADV7511)1269ret = regmap_register_patch(adv7511->regmap,1270adv7511_fixed_registers,1271ARRAY_SIZE(adv7511_fixed_registers));1272else1273ret = adv7533_patch_registers(adv7511);1274if (ret)1275goto uninit_regulators;12761277adv7511_packet_disable(adv7511, 0xffff);12781279adv7511->i2c_edid = i2c_new_ancillary_device(i2c, "edid",1280ADV7511_EDID_I2C_ADDR_DEFAULT);1281if (IS_ERR(adv7511->i2c_edid)) {1282ret = PTR_ERR(adv7511->i2c_edid);1283goto uninit_regulators;1284}12851286regmap_write(adv7511->regmap, ADV7511_REG_EDID_I2C_ADDR,1287adv7511->i2c_edid->addr << 1);12881289adv7511->i2c_packet = i2c_new_ancillary_device(i2c, "packet",1290ADV7511_PACKET_I2C_ADDR_DEFAULT);1291if (IS_ERR(adv7511->i2c_packet)) {1292ret = PTR_ERR(adv7511->i2c_packet);1293goto err_i2c_unregister_edid;1294}12951296adv7511->regmap_packet = devm_regmap_init_i2c(adv7511->i2c_packet,1297&adv7511_packet_config);1298if (IS_ERR(adv7511->regmap_packet)) {1299ret = PTR_ERR(adv7511->regmap_packet);1300goto err_i2c_unregister_packet;1301}13021303regmap_write(adv7511->regmap, ADV7511_REG_PACKET_I2C_ADDR,1304adv7511->i2c_packet->addr << 1);13051306ret = adv7511_init_cec_regmap(adv7511);1307if (ret)1308goto err_i2c_unregister_packet;13091310INIT_WORK(&adv7511->hpd_work, adv7511_hpd_work);13111312adv7511_power_off(adv7511);13131314i2c_set_clientdata(i2c, adv7511);13151316if (adv7511->info->link_config)1317adv7511_set_link_config(adv7511, &link_config);13181319regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL,1320ADV7511_CEC_CTRL_POWER_DOWN);13211322adv7511->bridge.ops = DRM_BRIDGE_OP_DETECT |1323DRM_BRIDGE_OP_EDID |1324DRM_BRIDGE_OP_HDMI;1325if (adv7511->i2c_main->irq)1326adv7511->bridge.ops |= DRM_BRIDGE_OP_HPD;13271328adv7511->bridge.vendor = "Analog";1329adv7511->bridge.product = adv7511->info->name;13301331#ifdef CONFIG_DRM_I2C_ADV7511_AUDIO1332adv7511->bridge.ops |= DRM_BRIDGE_OP_HDMI_AUDIO;1333adv7511->bridge.hdmi_audio_dev = dev;1334adv7511->bridge.hdmi_audio_max_i2s_playback_channels = 2;1335adv7511->bridge.hdmi_audio_i2s_formats = (SNDRV_PCM_FMTBIT_S16_LE |1336SNDRV_PCM_FMTBIT_S20_3LE |1337SNDRV_PCM_FMTBIT_S24_3LE |1338SNDRV_PCM_FMTBIT_S24_LE |1339SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE),1340adv7511->bridge.hdmi_audio_spdif_playback = 1;1341adv7511->bridge.hdmi_audio_dai_port = 2;1342#endif13431344#ifdef CONFIG_DRM_I2C_ADV7511_CEC1345adv7511->bridge.ops |= DRM_BRIDGE_OP_HDMI_CEC_ADAPTER;1346adv7511->bridge.hdmi_cec_dev = dev;1347adv7511->bridge.hdmi_cec_adapter_name = dev_name(dev);1348adv7511->bridge.hdmi_cec_available_las = ADV7511_MAX_ADDRS;1349#endif13501351adv7511->bridge.of_node = dev->of_node;1352adv7511->bridge.type = DRM_MODE_CONNECTOR_HDMIA;13531354drm_bridge_add(&adv7511->bridge);13551356if (i2c->irq) {1357init_waitqueue_head(&adv7511->wq);13581359ret = devm_request_threaded_irq(dev, i2c->irq, NULL,1360adv7511_irq_handler,1361IRQF_ONESHOT | IRQF_SHARED,1362dev_name(dev),1363adv7511);1364if (ret)1365goto err_unregister_audio;1366}13671368if (adv7511->info->has_dsi) {1369ret = adv7533_attach_dsi(adv7511);1370if (ret)1371goto err_unregister_audio;1372}13731374return 0;13751376err_unregister_audio:1377drm_bridge_remove(&adv7511->bridge);1378i2c_unregister_device(adv7511->i2c_cec);1379clk_disable_unprepare(adv7511->cec_clk);1380err_i2c_unregister_packet:1381i2c_unregister_device(adv7511->i2c_packet);1382err_i2c_unregister_edid:1383i2c_unregister_device(adv7511->i2c_edid);1384uninit_regulators:1385adv7511_uninit_regulators(adv7511);1386err_of_node_put:1387of_node_put(adv7511->host_node);13881389return ret;1390}13911392static void adv7511_remove(struct i2c_client *i2c)1393{1394struct adv7511 *adv7511 = i2c_get_clientdata(i2c);13951396of_node_put(adv7511->host_node);13971398adv7511_uninit_regulators(adv7511);13991400drm_bridge_remove(&adv7511->bridge);14011402i2c_unregister_device(adv7511->i2c_cec);1403clk_disable_unprepare(adv7511->cec_clk);14041405i2c_unregister_device(adv7511->i2c_packet);1406i2c_unregister_device(adv7511->i2c_edid);1407}14081409static const struct adv7511_chip_info adv7511_chip_info = {1410.type = ADV7511,1411.name = "ADV7511",1412.max_mode_clock_khz = 165000,1413.supply_names = adv7511_supply_names,1414.num_supplies = ARRAY_SIZE(adv7511_supply_names),1415.link_config = true,1416};14171418static const struct adv7511_chip_info adv7533_chip_info = {1419.type = ADV7533,1420.name = "ADV7533",1421.max_mode_clock_khz = 80000,1422.max_lane_freq_khz = 800000,1423.supply_names = adv7533_supply_names,1424.num_supplies = ARRAY_SIZE(adv7533_supply_names),1425.reg_cec_offset = ADV7533_REG_CEC_OFFSET,1426.has_dsi = true,1427};14281429static const struct adv7511_chip_info adv7535_chip_info = {1430.type = ADV7535,1431.name = "ADV7535",1432.max_mode_clock_khz = 148500,1433.max_lane_freq_khz = 891000,1434.supply_names = adv7533_supply_names,1435.num_supplies = ARRAY_SIZE(adv7533_supply_names),1436.reg_cec_offset = ADV7533_REG_CEC_OFFSET,1437.has_dsi = true,1438.hpd_override_enable = true,1439};14401441static const struct i2c_device_id adv7511_i2c_ids[] = {1442{ "adv7511", (kernel_ulong_t)&adv7511_chip_info },1443{ "adv7511w", (kernel_ulong_t)&adv7511_chip_info },1444{ "adv7513", (kernel_ulong_t)&adv7511_chip_info },1445{ "adv7533", (kernel_ulong_t)&adv7533_chip_info },1446{ "adv7535", (kernel_ulong_t)&adv7535_chip_info },1447{ }1448};1449MODULE_DEVICE_TABLE(i2c, adv7511_i2c_ids);14501451static const struct of_device_id adv7511_of_ids[] = {1452{ .compatible = "adi,adv7511", .data = &adv7511_chip_info },1453{ .compatible = "adi,adv7511w", .data = &adv7511_chip_info },1454{ .compatible = "adi,adv7513", .data = &adv7511_chip_info },1455{ .compatible = "adi,adv7533", .data = &adv7533_chip_info },1456{ .compatible = "adi,adv7535", .data = &adv7535_chip_info },1457{ }1458};1459MODULE_DEVICE_TABLE(of, adv7511_of_ids);14601461static struct mipi_dsi_driver adv7533_dsi_driver = {1462.driver.name = "adv7533",1463};14641465static struct i2c_driver adv7511_driver = {1466.driver = {1467.name = "adv7511",1468.of_match_table = adv7511_of_ids,1469},1470.id_table = adv7511_i2c_ids,1471.probe = adv7511_probe,1472.remove = adv7511_remove,1473};14741475static int __init adv7511_init(void)1476{1477int ret;14781479if (IS_ENABLED(CONFIG_DRM_MIPI_DSI)) {1480ret = mipi_dsi_driver_register(&adv7533_dsi_driver);1481if (ret)1482return ret;1483}14841485ret = i2c_add_driver(&adv7511_driver);1486if (ret) {1487if (IS_ENABLED(CONFIG_DRM_MIPI_DSI))1488mipi_dsi_driver_unregister(&adv7533_dsi_driver);1489}14901491return ret;1492}1493module_init(adv7511_init);14941495static void __exit adv7511_exit(void)1496{1497i2c_del_driver(&adv7511_driver);14981499if (IS_ENABLED(CONFIG_DRM_MIPI_DSI))1500mipi_dsi_driver_unregister(&adv7533_dsi_driver);1501}1502module_exit(adv7511_exit);15031504MODULE_AUTHOR("Lars-Peter Clausen <[email protected]>");1505MODULE_DESCRIPTION("ADV7511 HDMI transmitter driver");1506MODULE_LICENSE("GPL");150715081509