/* SPDX-License-Identifier: MIT */1/*2* Copyright © 2024 Tomeu Vizoso3*/4#ifndef __DRM_UAPI_ROCKET_ACCEL_H__5#define __DRM_UAPI_ROCKET_ACCEL_H__67#include "drm.h"89#if defined(__cplusplus)10extern "C" {11#endif1213#define DRM_ROCKET_CREATE_BO 0x0014#define DRM_ROCKET_SUBMIT 0x0115#define DRM_ROCKET_PREP_BO 0x0216#define DRM_ROCKET_FINI_BO 0x031718#define DRM_IOCTL_ROCKET_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_ROCKET_CREATE_BO, struct drm_rocket_create_bo)19#define DRM_IOCTL_ROCKET_SUBMIT DRM_IOW(DRM_COMMAND_BASE + DRM_ROCKET_SUBMIT, struct drm_rocket_submit)20#define DRM_IOCTL_ROCKET_PREP_BO DRM_IOW(DRM_COMMAND_BASE + DRM_ROCKET_PREP_BO, struct drm_rocket_prep_bo)21#define DRM_IOCTL_ROCKET_FINI_BO DRM_IOW(DRM_COMMAND_BASE + DRM_ROCKET_FINI_BO, struct drm_rocket_fini_bo)2223/**24* struct drm_rocket_create_bo - ioctl argument for creating Rocket BOs.25*26*/27struct drm_rocket_create_bo {28/** Input: Size of the requested BO. */29__u32 size;3031/** Output: GEM handle for the BO. */32__u32 handle;3334/**35* Output: DMA address for the BO in the NPU address space. This address36* is private to the DRM fd and is valid for the lifetime of the GEM37* handle.38*/39__u64 dma_address;4041/** Output: Offset into the drm node to use for subsequent mmap call. */42__u64 offset;43};4445/**46* struct drm_rocket_prep_bo - ioctl argument for starting CPU ownership of the BO.47*48* Takes care of waiting for any NPU jobs that might still use the NPU and performs cache49* synchronization.50*/51struct drm_rocket_prep_bo {52/** Input: GEM handle of the buffer object. */53__u32 handle;5455/** Reserved, must be zero. */56__u32 reserved;5758/** Input: Amount of time to wait for NPU jobs. */59__s64 timeout_ns;60};6162/**63* struct drm_rocket_fini_bo - ioctl argument for finishing CPU ownership of the BO.64*65* Synchronize caches for NPU access.66*/67struct drm_rocket_fini_bo {68/** Input: GEM handle of the buffer object. */69__u32 handle;7071/** Reserved, must be zero. */72__u32 reserved;73};7475/**76* struct drm_rocket_task - A task to be run on the NPU77*78* A task is the smallest unit of work that can be run on the NPU.79*/80struct drm_rocket_task {81/** Input: DMA address to NPU mapping of register command buffer */82__u32 regcmd;8384/** Input: Number of commands in the register command buffer */85__u32 regcmd_count;86};8788/**89* struct drm_rocket_job - A job to be run on the NPU90*91* The kernel will schedule the execution of this job taking into account its92* dependencies with other jobs. All tasks in the same job will be executed93* sequentially on the same core, to benefit from memory residency in SRAM.94*/95struct drm_rocket_job {96/** Input: Pointer to an array of struct drm_rocket_task. */97__u64 tasks;9899/** Input: Pointer to a u32 array of the BOs that are read by the job. */100__u64 in_bo_handles;101102/** Input: Pointer to a u32 array of the BOs that are written to by the job. */103__u64 out_bo_handles;104105/** Input: Number of tasks passed in. */106__u32 task_count;107108/** Input: Size in bytes of the structs in the @tasks field. */109__u32 task_struct_size;110111/** Input: Number of input BO handles passed in (size is that times 4). */112__u32 in_bo_handle_count;113114/** Input: Number of output BO handles passed in (size is that times 4). */115__u32 out_bo_handle_count;116};117118/**119* struct drm_rocket_submit - ioctl argument for submitting commands to the NPU.120*121* The kernel will schedule the execution of these jobs in dependency order.122*/123struct drm_rocket_submit {124/** Input: Pointer to an array of struct drm_rocket_job. */125__u64 jobs;126127/** Input: Number of jobs passed in. */128__u32 job_count;129130/** Input: Size in bytes of the structs in the @jobs field. */131__u32 job_struct_size;132133/** Reserved, must be zero. */134__u64 reserved;135};136137#if defined(__cplusplus)138}139#endif140141#endif /* __DRM_UAPI_ROCKET_ACCEL_H__ */142143144