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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/include/uapi/rdma/irdma-abi.h
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/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR Linux-OpenIB */

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/*

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 * Copyright (c) 2006 - 2021 Intel Corporation.  All rights reserved.

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 * Copyright (c) 2005 Topspin Communications.  All rights reserved.

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 * Copyright (c) 2005 Cisco Systems.  All rights reserved.

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 * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.

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 */

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#ifndef IRDMA_ABI_H

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#define IRDMA_ABI_H

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#include <linux/types.h>

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/* irdma must support legacy GEN_1 i40iw kernel

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 * and user-space whose last ABI ver is 5

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 */

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#define IRDMA_ABI_VER 5

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enum irdma_memreg_type {

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	IRDMA_MEMREG_TYPE_MEM  = 0,

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	IRDMA_MEMREG_TYPE_QP   = 1,

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	IRDMA_MEMREG_TYPE_CQ   = 2,

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	IRDMA_MEMREG_TYPE_SRQ  = 3,

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};

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enum {

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	IRDMA_ALLOC_UCTX_USE_RAW_ATTR = 1 << 0,

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	IRDMA_ALLOC_UCTX_MIN_HW_WQ_SIZE = 1 << 1,

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	IRDMA_ALLOC_UCTX_MAX_HW_SRQ_QUANTA = 1 << 2,

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	IRDMA_SUPPORT_WQE_FORMAT_V2 = 1 << 3,

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};

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struct irdma_alloc_ucontext_req {

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	__u32 rsvd32;

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	__u8 userspace_ver;

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	__u8 rsvd8[3];

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	__aligned_u64 comp_mask;

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};

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struct irdma_alloc_ucontext_resp {

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	__u32 max_pds;

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	__u32 max_qps;

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	__u32 wq_size; /* size of the WQs (SQ+RQ) in the mmaped area */

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	__u8 kernel_ver;

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	__u8 rsvd[3];

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	__aligned_u64 feature_flags;

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	__aligned_u64 db_mmap_key;

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	__u32 max_hw_wq_frags;

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	__u32 max_hw_read_sges;

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	__u32 max_hw_inline;

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	__u32 max_hw_rq_quanta;

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	__u32 max_hw_wq_quanta;

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	__u32 min_hw_cq_size;

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	__u32 max_hw_cq_size;

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	__u16 max_hw_sq_chunk;

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	__u8 hw_rev;

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	__u8 rsvd2;

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	__aligned_u64 comp_mask;

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	__u16 min_hw_wq_size;

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	__u32 max_hw_srq_quanta;

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	__u8 rsvd3[2];

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};

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struct irdma_alloc_pd_resp {

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	__u32 pd_id;

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	__u8 rsvd[4];

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};

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struct irdma_resize_cq_req {

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	__aligned_u64 user_cq_buffer;

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};

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struct irdma_create_cq_req {

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	__aligned_u64 user_cq_buf;

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	__aligned_u64 user_shadow_area;

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};

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struct irdma_create_srq_req {

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	__aligned_u64 user_srq_buf;

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	__aligned_u64 user_shadow_area;

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};

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struct irdma_create_srq_resp {

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	__u32 srq_id;

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	__u32 srq_size;

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};

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struct irdma_create_qp_req {

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	__aligned_u64 user_wqe_bufs;

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	__aligned_u64 user_compl_ctx;

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};

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struct irdma_mem_reg_req {

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	__u16 reg_type; /* enum irdma_memreg_type */

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	__u16 cq_pages;

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	__u16 rq_pages;

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	__u16 sq_pages;

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};

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struct irdma_modify_qp_req {

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	__u8 sq_flush;

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	__u8 rq_flush;

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	__u8 rsvd[6];

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};

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struct irdma_create_cq_resp {

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	__u32 cq_id;

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	__u32 cq_size;

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};

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struct irdma_create_qp_resp {

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	__u32 qp_id;

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	__u32 actual_sq_size;

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	__u32 actual_rq_size;

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	__u32 irdma_drv_opt;

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	__u16 push_idx;

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	__u8 lsmm;

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	__u8 rsvd;

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	__u32 qp_caps;

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};

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struct irdma_modify_qp_resp {

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	__aligned_u64 push_wqe_mmap_key;

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	__aligned_u64 push_db_mmap_key;

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	__u16 push_offset;

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	__u8 push_valid;

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	__u8 rsvd[5];

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};

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struct irdma_create_ah_resp {

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	__u32 ah_id;

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	__u8 rsvd[4];

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};

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#endif /* IRDMA_ABI_H */

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