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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/sound/pci/es1938.c
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1
// SPDX-License-Identifier: GPL-2.0-or-later
2
/*
3
* Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
4
* Copyright (c) by Jaromir Koutek <[email protected]>,
5
* Jaroslav Kysela <[email protected]>,
6
* Thomas Sailer <[email protected]>,
7
* Abramo Bagnara <[email protected]>,
8
* Markus Gruber <[email protected]>
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*
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* Rewritten from sonicvibes.c source.
11
*
12
* TODO:
13
* Rewrite better spinlocks
14
*/
15
16
/*
17
NOTES:
18
- Capture data is written unaligned starting from dma_base + 1 so I need to
19
disable mmap and to add a copy callback.
20
- After several cycle of the following:
21
while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
22
a "playback write error (DMA or IRQ trouble?)" may happen.
23
This is due to playback interrupts not generated.
24
I suspect a timing issue.
25
- Sometimes the interrupt handler is invoked wrongly during playback.
26
This generates some harmless "Unexpected hw_pointer: wrong interrupt
27
acknowledge".
28
I've seen that using small period sizes.
29
Reproducible with:
30
mpg123 test.mp3 &
31
hdparm -t -T /dev/hda
32
*/
33
34
35
#include <linux/init.h>
36
#include <linux/interrupt.h>
37
#include <linux/pci.h>
38
#include <linux/slab.h>
39
#include <linux/gameport.h>
40
#include <linux/module.h>
41
#include <linux/delay.h>
42
#include <linux/dma-mapping.h>
43
#include <linux/io.h>
44
#include <sound/core.h>
45
#include <sound/control.h>
46
#include <sound/pcm.h>
47
#include <sound/opl3.h>
48
#include <sound/mpu401.h>
49
#include <sound/initval.h>
50
#include <sound/tlv.h>
51
52
MODULE_AUTHOR("Jaromir Koutek <[email protected]>");
53
MODULE_DESCRIPTION("ESS Solo-1");
54
MODULE_LICENSE("GPL");
55
56
#if IS_REACHABLE(CONFIG_GAMEPORT)
57
#define SUPPORT_JOYSTICK 1
58
#endif
59
60
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
61
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
62
static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
63
64
module_param_array(index, int, NULL, 0444);
65
MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
66
module_param_array(id, charp, NULL, 0444);
67
MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
68
module_param_array(enable, bool, NULL, 0444);
69
MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
70
71
#define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
72
73
#define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
74
75
#define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
76
77
#define SL_PCI_LEGACYCONTROL 0x40
78
#define SL_PCI_CONFIG 0x50
79
#define SL_PCI_DDMACONTROL 0x60
80
81
#define ESSIO_REG_AUDIO2DMAADDR 0
82
#define ESSIO_REG_AUDIO2DMACOUNT 4
83
#define ESSIO_REG_AUDIO2MODE 6
84
#define ESSIO_REG_IRQCONTROL 7
85
86
#define ESSDM_REG_DMAADDR 0x00
87
#define ESSDM_REG_DMACOUNT 0x04
88
#define ESSDM_REG_DMACOMMAND 0x08
89
#define ESSDM_REG_DMASTATUS 0x08
90
#define ESSDM_REG_DMAMODE 0x0b
91
#define ESSDM_REG_DMACLEAR 0x0d
92
#define ESSDM_REG_DMAMASK 0x0f
93
94
#define ESSSB_REG_FMLOWADDR 0x00
95
#define ESSSB_REG_FMHIGHADDR 0x02
96
#define ESSSB_REG_MIXERADDR 0x04
97
#define ESSSB_REG_MIXERDATA 0x05
98
99
#define ESSSB_IREG_AUDIO1 0x14
100
#define ESSSB_IREG_MICMIX 0x1a
101
#define ESSSB_IREG_RECSRC 0x1c
102
#define ESSSB_IREG_MASTER 0x32
103
#define ESSSB_IREG_FM 0x36
104
#define ESSSB_IREG_AUXACD 0x38
105
#define ESSSB_IREG_AUXB 0x3a
106
#define ESSSB_IREG_PCSPEAKER 0x3c
107
#define ESSSB_IREG_LINE 0x3e
108
#define ESSSB_IREG_SPATCONTROL 0x50
109
#define ESSSB_IREG_SPATLEVEL 0x52
110
#define ESSSB_IREG_MASTER_LEFT 0x60
111
#define ESSSB_IREG_MASTER_RIGHT 0x62
112
#define ESSSB_IREG_MPU401CONTROL 0x64
113
#define ESSSB_IREG_MICMIXRECORD 0x68
114
#define ESSSB_IREG_AUDIO2RECORD 0x69
115
#define ESSSB_IREG_AUXACDRECORD 0x6a
116
#define ESSSB_IREG_FMRECORD 0x6b
117
#define ESSSB_IREG_AUXBRECORD 0x6c
118
#define ESSSB_IREG_MONO 0x6d
119
#define ESSSB_IREG_LINERECORD 0x6e
120
#define ESSSB_IREG_MONORECORD 0x6f
121
#define ESSSB_IREG_AUDIO2SAMPLE 0x70
122
#define ESSSB_IREG_AUDIO2MODE 0x71
123
#define ESSSB_IREG_AUDIO2FILTER 0x72
124
#define ESSSB_IREG_AUDIO2TCOUNTL 0x74
125
#define ESSSB_IREG_AUDIO2TCOUNTH 0x76
126
#define ESSSB_IREG_AUDIO2CONTROL1 0x78
127
#define ESSSB_IREG_AUDIO2CONTROL2 0x7a
128
#define ESSSB_IREG_AUDIO2 0x7c
129
130
#define ESSSB_REG_RESET 0x06
131
132
#define ESSSB_REG_READDATA 0x0a
133
#define ESSSB_REG_WRITEDATA 0x0c
134
#define ESSSB_REG_READSTATUS 0x0c
135
136
#define ESSSB_REG_STATUS 0x0e
137
138
#define ESS_CMD_EXTSAMPLERATE 0xa1
139
#define ESS_CMD_FILTERDIV 0xa2
140
#define ESS_CMD_DMACNTRELOADL 0xa4
141
#define ESS_CMD_DMACNTRELOADH 0xa5
142
#define ESS_CMD_ANALOGCONTROL 0xa8
143
#define ESS_CMD_IRQCONTROL 0xb1
144
#define ESS_CMD_DRQCONTROL 0xb2
145
#define ESS_CMD_RECLEVEL 0xb4
146
#define ESS_CMD_SETFORMAT 0xb6
147
#define ESS_CMD_SETFORMAT2 0xb7
148
#define ESS_CMD_DMACONTROL 0xb8
149
#define ESS_CMD_DMATYPE 0xb9
150
#define ESS_CMD_OFFSETLEFT 0xba
151
#define ESS_CMD_OFFSETRIGHT 0xbb
152
#define ESS_CMD_READREG 0xc0
153
#define ESS_CMD_ENABLEEXT 0xc6
154
#define ESS_CMD_PAUSEDMA 0xd0
155
#define ESS_CMD_ENABLEAUDIO1 0xd1
156
#define ESS_CMD_STOPAUDIO1 0xd3
157
#define ESS_CMD_AUDIO1STATUS 0xd8
158
#define ESS_CMD_CONTDMA 0xd4
159
#define ESS_CMD_TESTIRQ 0xf2
160
161
#define ESS_RECSRC_MIC 0
162
#define ESS_RECSRC_AUXACD 2
163
#define ESS_RECSRC_AUXB 5
164
#define ESS_RECSRC_LINE 6
165
#define ESS_RECSRC_NONE 7
166
167
#define DAC1 0x01
168
#define ADC1 0x02
169
#define DAC2 0x04
170
171
/*
172
173
*/
174
175
#define SAVED_REG_SIZE 32 /* max. number of registers to save */
176
177
struct es1938 {
178
int irq;
179
180
unsigned long io_port;
181
unsigned long sb_port;
182
unsigned long vc_port;
183
unsigned long mpu_port;
184
unsigned long game_port;
185
unsigned long ddma_port;
186
187
unsigned char irqmask;
188
unsigned char revision;
189
190
struct snd_kcontrol *hw_volume;
191
struct snd_kcontrol *hw_switch;
192
struct snd_kcontrol *master_volume;
193
struct snd_kcontrol *master_switch;
194
195
struct pci_dev *pci;
196
struct snd_card *card;
197
struct snd_pcm *pcm;
198
struct snd_pcm_substream *capture_substream;
199
struct snd_pcm_substream *playback1_substream;
200
struct snd_pcm_substream *playback2_substream;
201
struct snd_rawmidi *rmidi;
202
203
unsigned int dma1_size;
204
unsigned int dma2_size;
205
unsigned int dma1_start;
206
unsigned int dma2_start;
207
unsigned int dma1_shift;
208
unsigned int dma2_shift;
209
unsigned int last_capture_dmaaddr;
210
unsigned int active;
211
212
spinlock_t reg_lock;
213
spinlock_t mixer_lock;
214
struct snd_info_entry *proc_entry;
215
216
#ifdef SUPPORT_JOYSTICK
217
struct gameport *gameport;
218
#endif
219
unsigned char saved_regs[SAVED_REG_SIZE];
220
};
221
222
static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
223
224
static const struct pci_device_id snd_es1938_ids[] = {
225
{ PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */
226
{ 0, }
227
};
228
229
MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
230
231
#define RESET_LOOP_TIMEOUT 0x10000
232
#define WRITE_LOOP_TIMEOUT 0x10000
233
#define GET_LOOP_TIMEOUT 0x01000
234
235
/* -----------------------------------------------------------------
236
* Write to a mixer register
237
* -----------------------------------------------------------------*/
238
static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
239
{
240
guard(spinlock_irqsave)(&chip->mixer_lock);
241
outb(reg, SLSB_REG(chip, MIXERADDR));
242
outb(val, SLSB_REG(chip, MIXERDATA));
243
dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val);
244
}
245
246
/* -----------------------------------------------------------------
247
* Read from a mixer register
248
* -----------------------------------------------------------------*/
249
static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
250
{
251
int data;
252
253
guard(spinlock_irqsave)(&chip->mixer_lock);
254
outb(reg, SLSB_REG(chip, MIXERADDR));
255
data = inb(SLSB_REG(chip, MIXERDATA));
256
dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data);
257
return data;
258
}
259
260
/* -----------------------------------------------------------------
261
* Write to some bits of a mixer register (return old value)
262
* -----------------------------------------------------------------*/
263
static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
264
unsigned char mask, unsigned char val)
265
{
266
unsigned char old, new, oval;
267
268
guard(spinlock_irqsave)(&chip->mixer_lock);
269
outb(reg, SLSB_REG(chip, MIXERADDR));
270
old = inb(SLSB_REG(chip, MIXERDATA));
271
oval = old & mask;
272
if (val != oval) {
273
new = (old & ~mask) | (val & mask);
274
outb(new, SLSB_REG(chip, MIXERDATA));
275
dev_dbg(chip->card->dev,
276
"Mixer reg %02x was %02x, set to %02x\n",
277
reg, old, new);
278
}
279
return oval;
280
}
281
282
/* -----------------------------------------------------------------
283
* Write command to Controller Registers
284
* -----------------------------------------------------------------*/
285
static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
286
{
287
int i;
288
unsigned char v;
289
for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
290
v = inb(SLSB_REG(chip, READSTATUS));
291
if (!(v & 0x80)) {
292
outb(cmd, SLSB_REG(chip, WRITEDATA));
293
return;
294
}
295
}
296
dev_err(chip->card->dev,
297
"snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
298
}
299
300
/* -----------------------------------------------------------------
301
* Read the Read Data Buffer
302
* -----------------------------------------------------------------*/
303
static int snd_es1938_get_byte(struct es1938 *chip)
304
{
305
int i;
306
unsigned char v;
307
for (i = GET_LOOP_TIMEOUT; i; i--) {
308
v = inb(SLSB_REG(chip, STATUS));
309
if (v & 0x80)
310
return inb(SLSB_REG(chip, READDATA));
311
}
312
dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v);
313
return -ENODEV;
314
}
315
316
/* -----------------------------------------------------------------
317
* Write value cmd register
318
* -----------------------------------------------------------------*/
319
static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
320
{
321
guard(spinlock_irqsave)(&chip->reg_lock);
322
snd_es1938_write_cmd(chip, reg);
323
snd_es1938_write_cmd(chip, val);
324
dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val);
325
}
326
327
/* -----------------------------------------------------------------
328
* Read data from cmd register and return it
329
* -----------------------------------------------------------------*/
330
static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
331
{
332
unsigned char val;
333
334
guard(spinlock_irqsave)(&chip->reg_lock);
335
snd_es1938_write_cmd(chip, ESS_CMD_READREG);
336
snd_es1938_write_cmd(chip, reg);
337
val = snd_es1938_get_byte(chip);
338
dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val);
339
return val;
340
}
341
342
/* -----------------------------------------------------------------
343
* Write data to cmd register and return old value
344
* -----------------------------------------------------------------*/
345
static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
346
unsigned char val)
347
{
348
unsigned char old, new, oval;
349
350
guard(spinlock_irqsave)(&chip->reg_lock);
351
snd_es1938_write_cmd(chip, ESS_CMD_READREG);
352
snd_es1938_write_cmd(chip, reg);
353
old = snd_es1938_get_byte(chip);
354
oval = old & mask;
355
if (val != oval) {
356
snd_es1938_write_cmd(chip, reg);
357
new = (old & ~mask) | (val & mask);
358
snd_es1938_write_cmd(chip, new);
359
dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n",
360
reg, old, new);
361
}
362
return oval;
363
}
364
365
/* --------------------------------------------------------------------
366
* Reset the chip
367
* --------------------------------------------------------------------*/
368
static void snd_es1938_reset(struct es1938 *chip)
369
{
370
int i;
371
372
outb(3, SLSB_REG(chip, RESET));
373
inb(SLSB_REG(chip, RESET));
374
outb(0, SLSB_REG(chip, RESET));
375
for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
376
if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
377
if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
378
goto __next;
379
}
380
}
381
dev_err(chip->card->dev, "ESS Solo-1 reset failed\n");
382
383
__next:
384
snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
385
386
/* Demand transfer DMA: 4 bytes per DMA request */
387
snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
388
389
/* Change behaviour of register A1
390
4x oversampling
391
2nd channel DAC asynchronous */
392
snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
393
/* enable/select DMA channel and IRQ channel */
394
snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
395
snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
396
snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
397
/* Set spatializer parameters to recommended values */
398
snd_es1938_mixer_write(chip, 0x54, 0x8f);
399
snd_es1938_mixer_write(chip, 0x56, 0x95);
400
snd_es1938_mixer_write(chip, 0x58, 0x94);
401
snd_es1938_mixer_write(chip, 0x5a, 0x80);
402
}
403
404
/* --------------------------------------------------------------------
405
* Reset the FIFOs
406
* --------------------------------------------------------------------*/
407
static void snd_es1938_reset_fifo(struct es1938 *chip)
408
{
409
outb(2, SLSB_REG(chip, RESET));
410
outb(0, SLSB_REG(chip, RESET));
411
}
412
413
static const struct snd_ratnum clocks[2] = {
414
{
415
.num = 793800,
416
.den_min = 1,
417
.den_max = 128,
418
.den_step = 1,
419
},
420
{
421
.num = 768000,
422
.den_min = 1,
423
.den_max = 128,
424
.den_step = 1,
425
}
426
};
427
428
static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
429
.nrats = 2,
430
.rats = clocks,
431
};
432
433
434
static void snd_es1938_rate_set(struct es1938 *chip,
435
struct snd_pcm_substream *substream,
436
int mode)
437
{
438
unsigned int bits, div0;
439
struct snd_pcm_runtime *runtime = substream->runtime;
440
if (runtime->rate_num == clocks[0].num)
441
bits = 128 - runtime->rate_den;
442
else
443
bits = 256 - runtime->rate_den;
444
445
/* set filter register */
446
div0 = 256 - 7160000*20/(8*82*runtime->rate);
447
448
if (mode == DAC2) {
449
snd_es1938_mixer_write(chip, 0x70, bits);
450
snd_es1938_mixer_write(chip, 0x72, div0);
451
} else {
452
snd_es1938_write(chip, 0xA1, bits);
453
snd_es1938_write(chip, 0xA2, div0);
454
}
455
}
456
457
/* --------------------------------------------------------------------
458
* Configure Solo1 builtin DMA Controller
459
* --------------------------------------------------------------------*/
460
461
static void snd_es1938_playback1_setdma(struct es1938 *chip)
462
{
463
outb(0x00, SLIO_REG(chip, AUDIO2MODE));
464
outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
465
outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
466
outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
467
}
468
469
static void snd_es1938_playback2_setdma(struct es1938 *chip)
470
{
471
/* Enable DMA controller */
472
outb(0xc4, SLDM_REG(chip, DMACOMMAND));
473
/* 1. Master reset */
474
outb(0, SLDM_REG(chip, DMACLEAR));
475
/* 2. Mask DMA */
476
outb(1, SLDM_REG(chip, DMAMASK));
477
outb(0x18, SLDM_REG(chip, DMAMODE));
478
outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
479
outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
480
/* 3. Unmask DMA */
481
outb(0, SLDM_REG(chip, DMAMASK));
482
}
483
484
static void snd_es1938_capture_setdma(struct es1938 *chip)
485
{
486
/* Enable DMA controller */
487
outb(0xc4, SLDM_REG(chip, DMACOMMAND));
488
/* 1. Master reset */
489
outb(0, SLDM_REG(chip, DMACLEAR));
490
/* 2. Mask DMA */
491
outb(1, SLDM_REG(chip, DMAMASK));
492
outb(0x14, SLDM_REG(chip, DMAMODE));
493
outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
494
chip->last_capture_dmaaddr = chip->dma1_start;
495
outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
496
/* 3. Unmask DMA */
497
outb(0, SLDM_REG(chip, DMAMASK));
498
}
499
500
/* ----------------------------------------------------------------------
501
*
502
* *** PCM part ***
503
*/
504
505
static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
506
int cmd)
507
{
508
struct es1938 *chip = snd_pcm_substream_chip(substream);
509
int val;
510
switch (cmd) {
511
case SNDRV_PCM_TRIGGER_START:
512
case SNDRV_PCM_TRIGGER_RESUME:
513
val = 0x0f;
514
chip->active |= ADC1;
515
break;
516
case SNDRV_PCM_TRIGGER_STOP:
517
case SNDRV_PCM_TRIGGER_SUSPEND:
518
val = 0x00;
519
chip->active &= ~ADC1;
520
break;
521
default:
522
return -EINVAL;
523
}
524
snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
525
return 0;
526
}
527
528
static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
529
int cmd)
530
{
531
struct es1938 *chip = snd_pcm_substream_chip(substream);
532
switch (cmd) {
533
case SNDRV_PCM_TRIGGER_START:
534
case SNDRV_PCM_TRIGGER_RESUME:
535
/* According to the documentation this should be:
536
0x13 but that value may randomly swap stereo channels */
537
snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
538
udelay(10);
539
snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
540
/* This two stage init gives the FIFO -> DAC connection time to
541
* settle before first data from DMA flows in. This should ensure
542
* no swapping of stereo channels. Report a bug if otherwise :-) */
543
outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
544
chip->active |= DAC2;
545
break;
546
case SNDRV_PCM_TRIGGER_STOP:
547
case SNDRV_PCM_TRIGGER_SUSPEND:
548
outb(0, SLIO_REG(chip, AUDIO2MODE));
549
snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
550
chip->active &= ~DAC2;
551
break;
552
default:
553
return -EINVAL;
554
}
555
return 0;
556
}
557
558
static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
559
int cmd)
560
{
561
struct es1938 *chip = snd_pcm_substream_chip(substream);
562
int val;
563
switch (cmd) {
564
case SNDRV_PCM_TRIGGER_START:
565
case SNDRV_PCM_TRIGGER_RESUME:
566
val = 5;
567
chip->active |= DAC1;
568
break;
569
case SNDRV_PCM_TRIGGER_STOP:
570
case SNDRV_PCM_TRIGGER_SUSPEND:
571
val = 0;
572
chip->active &= ~DAC1;
573
break;
574
default:
575
return -EINVAL;
576
}
577
snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
578
return 0;
579
}
580
581
static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
582
int cmd)
583
{
584
switch (substream->number) {
585
case 0:
586
return snd_es1938_playback1_trigger(substream, cmd);
587
case 1:
588
return snd_es1938_playback2_trigger(substream, cmd);
589
}
590
snd_BUG();
591
return -EINVAL;
592
}
593
594
/* --------------------------------------------------------------------
595
* First channel for Extended Mode Audio 1 ADC Operation
596
* --------------------------------------------------------------------*/
597
static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
598
{
599
struct es1938 *chip = snd_pcm_substream_chip(substream);
600
struct snd_pcm_runtime *runtime = substream->runtime;
601
int u, is8, mono;
602
unsigned int size = snd_pcm_lib_buffer_bytes(substream);
603
unsigned int count = snd_pcm_lib_period_bytes(substream);
604
605
chip->dma1_size = size;
606
chip->dma1_start = runtime->dma_addr;
607
608
mono = (runtime->channels > 1) ? 0 : 1;
609
is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
610
u = snd_pcm_format_unsigned(runtime->format);
611
612
chip->dma1_shift = 2 - mono - is8;
613
614
snd_es1938_reset_fifo(chip);
615
616
/* program type */
617
snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
618
619
/* set clock and counters */
620
snd_es1938_rate_set(chip, substream, ADC1);
621
622
count = 0x10000 - count;
623
snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
624
snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
625
626
/* initialize and configure ADC */
627
snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
628
snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
629
(u ? 0x00 : 0x20) |
630
(is8 ? 0x00 : 0x04) |
631
(mono ? 0x40 : 0x08));
632
633
// snd_es1938_reset_fifo(chip);
634
635
/* 11. configure system interrupt controller and DMA controller */
636
snd_es1938_capture_setdma(chip);
637
638
return 0;
639
}
640
641
642
/* ------------------------------------------------------------------------------
643
* Second Audio channel DAC Operation
644
* ------------------------------------------------------------------------------*/
645
static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
646
{
647
struct es1938 *chip = snd_pcm_substream_chip(substream);
648
struct snd_pcm_runtime *runtime = substream->runtime;
649
int u, is8, mono;
650
unsigned int size = snd_pcm_lib_buffer_bytes(substream);
651
unsigned int count = snd_pcm_lib_period_bytes(substream);
652
653
chip->dma2_size = size;
654
chip->dma2_start = runtime->dma_addr;
655
656
mono = (runtime->channels > 1) ? 0 : 1;
657
is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
658
u = snd_pcm_format_unsigned(runtime->format);
659
660
chip->dma2_shift = 2 - mono - is8;
661
662
snd_es1938_reset_fifo(chip);
663
664
/* set clock and counters */
665
snd_es1938_rate_set(chip, substream, DAC2);
666
667
count >>= 1;
668
count = 0x10000 - count;
669
snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
670
snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
671
672
/* initialize and configure Audio 2 DAC */
673
snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
674
(mono ? 0 : 2) | (is8 ? 0 : 1));
675
676
/* program DMA */
677
snd_es1938_playback1_setdma(chip);
678
679
return 0;
680
}
681
682
static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
683
{
684
struct es1938 *chip = snd_pcm_substream_chip(substream);
685
struct snd_pcm_runtime *runtime = substream->runtime;
686
int u, is8, mono;
687
unsigned int size = snd_pcm_lib_buffer_bytes(substream);
688
unsigned int count = snd_pcm_lib_period_bytes(substream);
689
690
chip->dma1_size = size;
691
chip->dma1_start = runtime->dma_addr;
692
693
mono = (runtime->channels > 1) ? 0 : 1;
694
is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
695
u = snd_pcm_format_unsigned(runtime->format);
696
697
chip->dma1_shift = 2 - mono - is8;
698
699
count = 0x10000 - count;
700
701
/* reset */
702
snd_es1938_reset_fifo(chip);
703
704
snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
705
706
/* set clock and counters */
707
snd_es1938_rate_set(chip, substream, DAC1);
708
snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
709
snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
710
711
/* initialized and configure DAC */
712
snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
713
snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
714
snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
715
0x90 | (mono ? 0x40 : 0x08) |
716
(is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
717
718
/* program DMA */
719
snd_es1938_playback2_setdma(chip);
720
721
return 0;
722
}
723
724
static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
725
{
726
switch (substream->number) {
727
case 0:
728
return snd_es1938_playback1_prepare(substream);
729
case 1:
730
return snd_es1938_playback2_prepare(substream);
731
}
732
snd_BUG();
733
return -EINVAL;
734
}
735
736
/* during the incrementing of dma counters the DMA register reads sometimes
737
returns garbage. To ensure a valid hw pointer, the following checks which
738
should be very unlikely to fail are used:
739
- is the current DMA address in the valid DMA range ?
740
- is the sum of DMA address and DMA counter pointing to the last DMA byte ?
741
One can argue this could differ by one byte depending on which register is
742
updated first, so the implementation below allows for that.
743
*/
744
static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
745
{
746
struct es1938 *chip = snd_pcm_substream_chip(substream);
747
size_t ptr;
748
#if 0
749
size_t old, new;
750
/* This stuff is *needed*, don't ask why - AB */
751
old = inw(SLDM_REG(chip, DMACOUNT));
752
while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
753
old = new;
754
ptr = chip->dma1_size - 1 - new;
755
#else
756
size_t count;
757
unsigned int diff;
758
759
ptr = inl(SLDM_REG(chip, DMAADDR));
760
count = inw(SLDM_REG(chip, DMACOUNT));
761
diff = chip->dma1_start + chip->dma1_size - ptr - count;
762
763
if (diff > 3 || ptr < chip->dma1_start
764
|| ptr >= chip->dma1_start+chip->dma1_size)
765
ptr = chip->last_capture_dmaaddr; /* bad, use last saved */
766
else
767
chip->last_capture_dmaaddr = ptr; /* good, remember it */
768
769
ptr -= chip->dma1_start;
770
#endif
771
return ptr >> chip->dma1_shift;
772
}
773
774
static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
775
{
776
struct es1938 *chip = snd_pcm_substream_chip(substream);
777
size_t ptr;
778
#if 1
779
ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
780
#else
781
ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
782
#endif
783
return ptr >> chip->dma2_shift;
784
}
785
786
static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
787
{
788
struct es1938 *chip = snd_pcm_substream_chip(substream);
789
size_t ptr;
790
size_t old, new;
791
#if 1
792
/* This stuff is *needed*, don't ask why - AB */
793
old = inw(SLDM_REG(chip, DMACOUNT));
794
while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
795
old = new;
796
ptr = chip->dma1_size - 1 - new;
797
#else
798
ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
799
#endif
800
return ptr >> chip->dma1_shift;
801
}
802
803
static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
804
{
805
switch (substream->number) {
806
case 0:
807
return snd_es1938_playback1_pointer(substream);
808
case 1:
809
return snd_es1938_playback2_pointer(substream);
810
}
811
snd_BUG();
812
return -EINVAL;
813
}
814
815
static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
816
int channel, unsigned long pos,
817
struct iov_iter *dst, unsigned long count)
818
{
819
struct snd_pcm_runtime *runtime = substream->runtime;
820
struct es1938 *chip = snd_pcm_substream_chip(substream);
821
822
if (snd_BUG_ON(pos + count > chip->dma1_size))
823
return -EINVAL;
824
if (pos + count < chip->dma1_size) {
825
if (copy_to_iter(runtime->dma_area + pos + 1, count, dst) != count)
826
return -EFAULT;
827
} else {
828
if (copy_to_iter(runtime->dma_area + pos + 1, count - 1, dst) != count - 1)
829
return -EFAULT;
830
if (copy_to_iter(runtime->dma_area, 1, dst) != 1)
831
return -EFAULT;
832
}
833
return 0;
834
}
835
836
/* ----------------------------------------------------------------------
837
* Audio1 Capture (ADC)
838
* ----------------------------------------------------------------------*/
839
static const struct snd_pcm_hardware snd_es1938_capture =
840
{
841
.info = (SNDRV_PCM_INFO_INTERLEAVED |
842
SNDRV_PCM_INFO_BLOCK_TRANSFER),
843
.formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
844
SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
845
.rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
846
.rate_min = 6000,
847
.rate_max = 48000,
848
.channels_min = 1,
849
.channels_max = 2,
850
.buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
851
.period_bytes_min = 64,
852
.period_bytes_max = 0x8000,
853
.periods_min = 1,
854
.periods_max = 1024,
855
.fifo_size = 256,
856
};
857
858
/* -----------------------------------------------------------------------
859
* Audio2 Playback (DAC)
860
* -----------------------------------------------------------------------*/
861
static const struct snd_pcm_hardware snd_es1938_playback =
862
{
863
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
864
SNDRV_PCM_INFO_BLOCK_TRANSFER |
865
SNDRV_PCM_INFO_MMAP_VALID),
866
.formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
867
SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
868
.rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
869
.rate_min = 6000,
870
.rate_max = 48000,
871
.channels_min = 1,
872
.channels_max = 2,
873
.buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
874
.period_bytes_min = 64,
875
.period_bytes_max = 0x8000,
876
.periods_min = 1,
877
.periods_max = 1024,
878
.fifo_size = 256,
879
};
880
881
static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
882
{
883
struct es1938 *chip = snd_pcm_substream_chip(substream);
884
struct snd_pcm_runtime *runtime = substream->runtime;
885
886
if (chip->playback2_substream)
887
return -EAGAIN;
888
chip->capture_substream = substream;
889
runtime->hw = snd_es1938_capture;
890
snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
891
&hw_constraints_clocks);
892
snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
893
return 0;
894
}
895
896
static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
897
{
898
struct es1938 *chip = snd_pcm_substream_chip(substream);
899
struct snd_pcm_runtime *runtime = substream->runtime;
900
901
switch (substream->number) {
902
case 0:
903
chip->playback1_substream = substream;
904
break;
905
case 1:
906
if (chip->capture_substream)
907
return -EAGAIN;
908
chip->playback2_substream = substream;
909
break;
910
default:
911
snd_BUG();
912
return -EINVAL;
913
}
914
runtime->hw = snd_es1938_playback;
915
snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
916
&hw_constraints_clocks);
917
snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
918
return 0;
919
}
920
921
static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
922
{
923
struct es1938 *chip = snd_pcm_substream_chip(substream);
924
925
chip->capture_substream = NULL;
926
return 0;
927
}
928
929
static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
930
{
931
struct es1938 *chip = snd_pcm_substream_chip(substream);
932
933
switch (substream->number) {
934
case 0:
935
chip->playback1_substream = NULL;
936
break;
937
case 1:
938
chip->playback2_substream = NULL;
939
break;
940
default:
941
snd_BUG();
942
return -EINVAL;
943
}
944
return 0;
945
}
946
947
static const struct snd_pcm_ops snd_es1938_playback_ops = {
948
.open = snd_es1938_playback_open,
949
.close = snd_es1938_playback_close,
950
.prepare = snd_es1938_playback_prepare,
951
.trigger = snd_es1938_playback_trigger,
952
.pointer = snd_es1938_playback_pointer,
953
};
954
955
static const struct snd_pcm_ops snd_es1938_capture_ops = {
956
.open = snd_es1938_capture_open,
957
.close = snd_es1938_capture_close,
958
.prepare = snd_es1938_capture_prepare,
959
.trigger = snd_es1938_capture_trigger,
960
.pointer = snd_es1938_capture_pointer,
961
.copy = snd_es1938_capture_copy,
962
};
963
964
static int snd_es1938_new_pcm(struct es1938 *chip, int device)
965
{
966
struct snd_pcm *pcm;
967
int err;
968
969
err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm);
970
if (err < 0)
971
return err;
972
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
973
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
974
975
pcm->private_data = chip;
976
pcm->info_flags = 0;
977
strscpy(pcm->name, "ESS Solo-1");
978
979
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
980
&chip->pci->dev, 64*1024, 64*1024);
981
982
chip->pcm = pcm;
983
return 0;
984
}
985
986
/* -------------------------------------------------------------------
987
*
988
* *** Mixer part ***
989
*/
990
991
static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
992
struct snd_ctl_elem_info *uinfo)
993
{
994
static const char * const texts[8] = {
995
"Mic", "Mic Master", "CD", "AOUT",
996
"Mic1", "Mix", "Line", "Master"
997
};
998
999
return snd_ctl_enum_info(uinfo, 1, 8, texts);
1000
}
1001
1002
static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
1003
struct snd_ctl_elem_value *ucontrol)
1004
{
1005
struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1006
ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
1007
return 0;
1008
}
1009
1010
static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
1011
struct snd_ctl_elem_value *ucontrol)
1012
{
1013
struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1014
unsigned char val = ucontrol->value.enumerated.item[0];
1015
1016
if (val > 7)
1017
return -EINVAL;
1018
return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
1019
}
1020
1021
#define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info
1022
1023
static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
1024
struct snd_ctl_elem_value *ucontrol)
1025
{
1026
struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1027
unsigned char val = snd_es1938_mixer_read(chip, 0x50);
1028
ucontrol->value.integer.value[0] = !!(val & 8);
1029
return 0;
1030
}
1031
1032
static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
1033
struct snd_ctl_elem_value *ucontrol)
1034
{
1035
struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1036
unsigned char oval, nval;
1037
int change;
1038
nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1039
oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
1040
change = nval != oval;
1041
if (change) {
1042
snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
1043
snd_es1938_mixer_write(chip, 0x50, nval);
1044
}
1045
return change;
1046
}
1047
1048
static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
1049
struct snd_ctl_elem_info *uinfo)
1050
{
1051
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1052
uinfo->count = 2;
1053
uinfo->value.integer.min = 0;
1054
uinfo->value.integer.max = 63;
1055
return 0;
1056
}
1057
1058
static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
1059
struct snd_ctl_elem_value *ucontrol)
1060
{
1061
struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1062
ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
1063
ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
1064
return 0;
1065
}
1066
1067
#define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info
1068
1069
static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
1070
struct snd_ctl_elem_value *ucontrol)
1071
{
1072
struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1073
ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
1074
ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
1075
return 0;
1076
}
1077
1078
static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
1079
{
1080
struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1081
chip->master_volume = NULL;
1082
chip->master_switch = NULL;
1083
chip->hw_volume = NULL;
1084
chip->hw_switch = NULL;
1085
}
1086
1087
static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
1088
unsigned char mask, unsigned char val)
1089
{
1090
if (reg < 0xa0)
1091
return snd_es1938_mixer_bits(chip, reg, mask, val);
1092
else
1093
return snd_es1938_bits(chip, reg, mask, val);
1094
}
1095
1096
static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
1097
{
1098
if (reg < 0xa0)
1099
return snd_es1938_mixer_read(chip, reg);
1100
else
1101
return snd_es1938_read(chip, reg);
1102
}
1103
1104
#define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
1105
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1106
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1107
.name = xname, .index = xindex, \
1108
.info = snd_es1938_info_single, \
1109
.get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1110
.private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1111
.tlv = { .p = xtlv } }
1112
#define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
1113
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1114
.info = snd_es1938_info_single, \
1115
.get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1116
.private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1117
1118
static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
1119
struct snd_ctl_elem_info *uinfo)
1120
{
1121
int mask = (kcontrol->private_value >> 16) & 0xff;
1122
1123
uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1124
uinfo->count = 1;
1125
uinfo->value.integer.min = 0;
1126
uinfo->value.integer.max = mask;
1127
return 0;
1128
}
1129
1130
static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
1131
struct snd_ctl_elem_value *ucontrol)
1132
{
1133
struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1134
int reg = kcontrol->private_value & 0xff;
1135
int shift = (kcontrol->private_value >> 8) & 0xff;
1136
int mask = (kcontrol->private_value >> 16) & 0xff;
1137
int invert = (kcontrol->private_value >> 24) & 0xff;
1138
int val;
1139
1140
val = snd_es1938_reg_read(chip, reg);
1141
ucontrol->value.integer.value[0] = (val >> shift) & mask;
1142
if (invert)
1143
ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1144
return 0;
1145
}
1146
1147
static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
1148
struct snd_ctl_elem_value *ucontrol)
1149
{
1150
struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1151
int reg = kcontrol->private_value & 0xff;
1152
int shift = (kcontrol->private_value >> 8) & 0xff;
1153
int mask = (kcontrol->private_value >> 16) & 0xff;
1154
int invert = (kcontrol->private_value >> 24) & 0xff;
1155
unsigned char val;
1156
1157
val = (ucontrol->value.integer.value[0] & mask);
1158
if (invert)
1159
val = mask - val;
1160
mask <<= shift;
1161
val <<= shift;
1162
return snd_es1938_reg_bits(chip, reg, mask, val) != val;
1163
}
1164
1165
#define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1166
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1167
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1168
.name = xname, .index = xindex, \
1169
.info = snd_es1938_info_double, \
1170
.get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1171
.private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
1172
.tlv = { .p = xtlv } }
1173
#define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1174
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1175
.info = snd_es1938_info_double, \
1176
.get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1177
.private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1178
1179
static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
1180
struct snd_ctl_elem_info *uinfo)
1181
{
1182
int mask = (kcontrol->private_value >> 24) & 0xff;
1183
1184
uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1185
uinfo->count = 2;
1186
uinfo->value.integer.min = 0;
1187
uinfo->value.integer.max = mask;
1188
return 0;
1189
}
1190
1191
static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
1192
struct snd_ctl_elem_value *ucontrol)
1193
{
1194
struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1195
int left_reg = kcontrol->private_value & 0xff;
1196
int right_reg = (kcontrol->private_value >> 8) & 0xff;
1197
int shift_left = (kcontrol->private_value >> 16) & 0x07;
1198
int shift_right = (kcontrol->private_value >> 19) & 0x07;
1199
int mask = (kcontrol->private_value >> 24) & 0xff;
1200
int invert = (kcontrol->private_value >> 22) & 1;
1201
unsigned char left, right;
1202
1203
left = snd_es1938_reg_read(chip, left_reg);
1204
if (left_reg != right_reg)
1205
right = snd_es1938_reg_read(chip, right_reg);
1206
else
1207
right = left;
1208
ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1209
ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1210
if (invert) {
1211
ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1212
ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1213
}
1214
return 0;
1215
}
1216
1217
static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
1218
struct snd_ctl_elem_value *ucontrol)
1219
{
1220
struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1221
int left_reg = kcontrol->private_value & 0xff;
1222
int right_reg = (kcontrol->private_value >> 8) & 0xff;
1223
int shift_left = (kcontrol->private_value >> 16) & 0x07;
1224
int shift_right = (kcontrol->private_value >> 19) & 0x07;
1225
int mask = (kcontrol->private_value >> 24) & 0xff;
1226
int invert = (kcontrol->private_value >> 22) & 1;
1227
int change;
1228
unsigned char val1, val2, mask1, mask2;
1229
1230
val1 = ucontrol->value.integer.value[0] & mask;
1231
val2 = ucontrol->value.integer.value[1] & mask;
1232
if (invert) {
1233
val1 = mask - val1;
1234
val2 = mask - val2;
1235
}
1236
val1 <<= shift_left;
1237
val2 <<= shift_right;
1238
mask1 = mask << shift_left;
1239
mask2 = mask << shift_right;
1240
if (left_reg != right_reg) {
1241
change = 0;
1242
if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
1243
change = 1;
1244
if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
1245
change = 1;
1246
} else {
1247
change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
1248
val1 | val2) != (val1 | val2));
1249
}
1250
return change;
1251
}
1252
1253
static const DECLARE_TLV_DB_RANGE(db_scale_master,
1254
0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1255
54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
1256
);
1257
1258
static const DECLARE_TLV_DB_RANGE(db_scale_audio1,
1259
0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1260
8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
1261
);
1262
1263
static const DECLARE_TLV_DB_RANGE(db_scale_audio2,
1264
0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1265
8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
1266
);
1267
1268
static const DECLARE_TLV_DB_RANGE(db_scale_mic,
1269
0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1270
8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
1271
);
1272
1273
static const DECLARE_TLV_DB_RANGE(db_scale_line,
1274
0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1275
8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
1276
);
1277
1278
static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
1279
1280
static const struct snd_kcontrol_new snd_es1938_controls[] = {
1281
ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
1282
db_scale_master),
1283
ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1284
{
1285
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1286
.name = "Hardware Master Playback Volume",
1287
.access = SNDRV_CTL_ELEM_ACCESS_READ,
1288
.info = snd_es1938_info_hw_volume,
1289
.get = snd_es1938_get_hw_volume,
1290
},
1291
{
1292
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1293
.access = (SNDRV_CTL_ELEM_ACCESS_READ |
1294
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1295
.name = "Hardware Master Playback Switch",
1296
.info = snd_es1938_info_hw_switch,
1297
.get = snd_es1938_get_hw_switch,
1298
.tlv = { .p = db_scale_master },
1299
},
1300
ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
1301
ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
1302
db_scale_line),
1303
ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
1304
ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
1305
db_scale_mic),
1306
ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1307
db_scale_line),
1308
ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
1309
db_scale_mic),
1310
ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
1311
db_scale_line),
1312
ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
1313
db_scale_capture),
1314
ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0),
1315
ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1316
ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
1317
{
1318
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1319
.name = "Capture Source",
1320
.info = snd_es1938_info_mux,
1321
.get = snd_es1938_get_mux,
1322
.put = snd_es1938_put_mux,
1323
},
1324
ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1325
db_scale_line),
1326
ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
1327
db_scale_audio2),
1328
ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
1329
db_scale_mic),
1330
ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
1331
db_scale_line),
1332
ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
1333
db_scale_mic),
1334
ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
1335
db_scale_line),
1336
ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
1337
db_scale_line),
1338
ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
1339
db_scale_line),
1340
ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
1341
db_scale_audio2),
1342
ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
1343
db_scale_audio1),
1344
ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1345
{
1346
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1347
.name = "3D Control - Switch",
1348
.info = snd_es1938_info_spatializer_enable,
1349
.get = snd_es1938_get_spatializer_enable,
1350
.put = snd_es1938_put_spatializer_enable,
1351
},
1352
ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
1353
};
1354
1355
1356
/* ---------------------------------------------------------------------------- */
1357
/* ---------------------------------------------------------------------------- */
1358
1359
/*
1360
* initialize the chip - used by resume callback, too
1361
*/
1362
static void snd_es1938_chip_init(struct es1938 *chip)
1363
{
1364
/* reset chip */
1365
snd_es1938_reset(chip);
1366
1367
/* configure native mode */
1368
1369
/* enable bus master */
1370
pci_set_master(chip->pci);
1371
1372
/* disable legacy audio */
1373
pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
1374
1375
/* set DDMA base */
1376
pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
1377
1378
/* set DMA/IRQ policy */
1379
pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
1380
1381
/* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
1382
outb(0xf0, SLIO_REG(chip, IRQCONTROL));
1383
1384
/* reset DMA */
1385
outb(0, SLDM_REG(chip, DMACLEAR));
1386
}
1387
1388
/*
1389
* PM support
1390
*/
1391
1392
static const unsigned char saved_regs[SAVED_REG_SIZE+1] = {
1393
0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
1394
0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
1395
0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
1396
0xa8, 0xb4,
1397
};
1398
1399
1400
static int es1938_suspend(struct device *dev)
1401
{
1402
struct snd_card *card = dev_get_drvdata(dev);
1403
struct es1938 *chip = card->private_data;
1404
const unsigned char *s;
1405
unsigned char *d;
1406
1407
snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1408
1409
/* save mixer-related registers */
1410
for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
1411
*d = snd_es1938_reg_read(chip, *s);
1412
1413
outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
1414
if (chip->irq >= 0) {
1415
free_irq(chip->irq, chip);
1416
chip->irq = -1;
1417
card->sync_irq = -1;
1418
}
1419
return 0;
1420
}
1421
1422
static int es1938_resume(struct device *dev)
1423
{
1424
struct pci_dev *pci = to_pci_dev(dev);
1425
struct snd_card *card = dev_get_drvdata(dev);
1426
struct es1938 *chip = card->private_data;
1427
const unsigned char *s;
1428
unsigned char *d;
1429
1430
if (request_irq(pci->irq, snd_es1938_interrupt,
1431
IRQF_SHARED, KBUILD_MODNAME, chip)) {
1432
dev_err(dev, "unable to grab IRQ %d, disabling device\n",
1433
pci->irq);
1434
snd_card_disconnect(card);
1435
return -EIO;
1436
}
1437
chip->irq = pci->irq;
1438
card->sync_irq = chip->irq;
1439
snd_es1938_chip_init(chip);
1440
1441
/* restore mixer-related registers */
1442
for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
1443
if (*s < 0xa0)
1444
snd_es1938_mixer_write(chip, *s, *d);
1445
else
1446
snd_es1938_write(chip, *s, *d);
1447
}
1448
1449
snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1450
return 0;
1451
}
1452
1453
static DEFINE_SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume);
1454
1455
#ifdef SUPPORT_JOYSTICK
1456
static int snd_es1938_create_gameport(struct es1938 *chip)
1457
{
1458
struct gameport *gp;
1459
1460
chip->gameport = gp = gameport_allocate_port();
1461
if (!gp) {
1462
dev_err(chip->card->dev,
1463
"cannot allocate memory for gameport\n");
1464
return -ENOMEM;
1465
}
1466
1467
gameport_set_name(gp, "ES1938");
1468
gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1469
gameport_set_dev_parent(gp, &chip->pci->dev);
1470
gp->io = chip->game_port;
1471
1472
gameport_register_port(gp);
1473
1474
return 0;
1475
}
1476
1477
static void snd_es1938_free_gameport(struct es1938 *chip)
1478
{
1479
if (chip->gameport) {
1480
gameport_unregister_port(chip->gameport);
1481
chip->gameport = NULL;
1482
}
1483
}
1484
#else
1485
static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
1486
static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
1487
#endif /* SUPPORT_JOYSTICK */
1488
1489
static void snd_es1938_free(struct snd_card *card)
1490
{
1491
struct es1938 *chip = card->private_data;
1492
1493
/* disable irqs */
1494
outb(0x00, SLIO_REG(chip, IRQCONTROL));
1495
if (chip->rmidi)
1496
snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
1497
1498
snd_es1938_free_gameport(chip);
1499
1500
if (chip->irq >= 0)
1501
free_irq(chip->irq, chip);
1502
}
1503
1504
static int snd_es1938_create(struct snd_card *card,
1505
struct pci_dev *pci)
1506
{
1507
struct es1938 *chip = card->private_data;
1508
int err;
1509
1510
/* enable PCI device */
1511
err = pcim_enable_device(pci);
1512
if (err < 0)
1513
return err;
1514
/* check, if we can restrict PCI DMA transfers to 24 bits */
1515
if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(24))) {
1516
dev_err(card->dev,
1517
"architecture does not support 24bit PCI busmaster DMA\n");
1518
return -ENXIO;
1519
}
1520
1521
spin_lock_init(&chip->reg_lock);
1522
spin_lock_init(&chip->mixer_lock);
1523
chip->card = card;
1524
chip->pci = pci;
1525
chip->irq = -1;
1526
err = pcim_request_all_regions(pci, "ESS Solo-1");
1527
if (err < 0)
1528
return err;
1529
chip->io_port = pci_resource_start(pci, 0);
1530
chip->sb_port = pci_resource_start(pci, 1);
1531
chip->vc_port = pci_resource_start(pci, 2);
1532
chip->mpu_port = pci_resource_start(pci, 3);
1533
chip->game_port = pci_resource_start(pci, 4);
1534
/* still use non-managed irq handler as it's re-acquired at PM resume */
1535
if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
1536
KBUILD_MODNAME, chip)) {
1537
dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1538
return -EBUSY;
1539
}
1540
chip->irq = pci->irq;
1541
card->sync_irq = chip->irq;
1542
card->private_free = snd_es1938_free;
1543
dev_dbg(card->dev,
1544
"create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
1545
chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
1546
1547
chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
1548
1549
snd_es1938_chip_init(chip);
1550
return 0;
1551
}
1552
1553
/* --------------------------------------------------------------------
1554
* Interrupt handler
1555
* -------------------------------------------------------------------- */
1556
static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
1557
{
1558
struct es1938 *chip = dev_id;
1559
unsigned char status;
1560
__always_unused unsigned char audiostatus;
1561
int handled = 0;
1562
1563
status = inb(SLIO_REG(chip, IRQCONTROL));
1564
#if 0
1565
dev_dbg(chip->card->dev,
1566
"Es1938debug - interrupt status: =0x%x\n", status);
1567
#endif
1568
1569
/* AUDIO 1 */
1570
if (status & 0x10) {
1571
#if 0
1572
dev_dbg(chip->card->dev,
1573
"Es1938debug - AUDIO channel 1 interrupt\n");
1574
dev_dbg(chip->card->dev,
1575
"Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
1576
inw(SLDM_REG(chip, DMACOUNT)));
1577
dev_dbg(chip->card->dev,
1578
"Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
1579
inl(SLDM_REG(chip, DMAADDR)));
1580
dev_dbg(chip->card->dev,
1581
"Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
1582
inl(SLDM_REG(chip, DMASTATUS)));
1583
#endif
1584
/* clear irq */
1585
handled = 1;
1586
audiostatus = inb(SLSB_REG(chip, STATUS));
1587
if (chip->active & ADC1)
1588
snd_pcm_period_elapsed(chip->capture_substream);
1589
else if (chip->active & DAC1)
1590
snd_pcm_period_elapsed(chip->playback2_substream);
1591
}
1592
1593
/* AUDIO 2 */
1594
if (status & 0x20) {
1595
#if 0
1596
dev_dbg(chip->card->dev,
1597
"Es1938debug - AUDIO channel 2 interrupt\n");
1598
dev_dbg(chip->card->dev,
1599
"Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
1600
inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
1601
dev_dbg(chip->card->dev,
1602
"Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
1603
inl(SLIO_REG(chip, AUDIO2DMAADDR)));
1604
1605
#endif
1606
/* clear irq */
1607
handled = 1;
1608
snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
1609
if (chip->active & DAC2)
1610
snd_pcm_period_elapsed(chip->playback1_substream);
1611
}
1612
1613
/* Hardware volume */
1614
if (status & 0x40) {
1615
int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
1616
handled = 1;
1617
snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
1618
snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
1619
if (!split) {
1620
snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1621
&chip->master_switch->id);
1622
snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1623
&chip->master_volume->id);
1624
}
1625
/* ack interrupt */
1626
snd_es1938_mixer_write(chip, 0x66, 0x00);
1627
}
1628
1629
/* MPU401 */
1630
if (status & 0x80) {
1631
// the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
1632
// replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
1633
// [email protected]
1634
// snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
1635
if (chip->rmidi) {
1636
handled = 1;
1637
snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1638
}
1639
}
1640
return IRQ_RETVAL(handled);
1641
}
1642
1643
#define ES1938_DMA_SIZE 64
1644
1645
static int snd_es1938_mixer(struct es1938 *chip)
1646
{
1647
struct snd_card *card;
1648
unsigned int idx;
1649
int err;
1650
1651
card = chip->card;
1652
1653
strscpy(card->mixername, "ESS Solo-1");
1654
1655
for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
1656
struct snd_kcontrol *kctl;
1657
kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
1658
switch (idx) {
1659
case 0:
1660
chip->master_volume = kctl;
1661
kctl->private_free = snd_es1938_hwv_free;
1662
break;
1663
case 1:
1664
chip->master_switch = kctl;
1665
kctl->private_free = snd_es1938_hwv_free;
1666
break;
1667
case 2:
1668
chip->hw_volume = kctl;
1669
kctl->private_free = snd_es1938_hwv_free;
1670
break;
1671
case 3:
1672
chip->hw_switch = kctl;
1673
kctl->private_free = snd_es1938_hwv_free;
1674
break;
1675
}
1676
err = snd_ctl_add(card, kctl);
1677
if (err < 0)
1678
return err;
1679
}
1680
return 0;
1681
}
1682
1683
1684
static int __snd_es1938_probe(struct pci_dev *pci,
1685
const struct pci_device_id *pci_id)
1686
{
1687
static int dev;
1688
struct snd_card *card;
1689
struct es1938 *chip;
1690
struct snd_opl3 *opl3;
1691
int idx, err;
1692
1693
if (dev >= SNDRV_CARDS)
1694
return -ENODEV;
1695
if (!enable[dev]) {
1696
dev++;
1697
return -ENOENT;
1698
}
1699
1700
err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1701
sizeof(*chip), &card);
1702
if (err < 0)
1703
return err;
1704
chip = card->private_data;
1705
1706
for (idx = 0; idx < 5; idx++)
1707
if (pci_resource_start(pci, idx) == 0 ||
1708
!(pci_resource_flags(pci, idx) & IORESOURCE_IO))
1709
return -ENODEV;
1710
1711
err = snd_es1938_create(card, pci);
1712
if (err < 0)
1713
return err;
1714
1715
strscpy(card->driver, "ES1938");
1716
strscpy(card->shortname, "ESS ES1938 (Solo-1)");
1717
sprintf(card->longname, "%s rev %i, irq %i",
1718
card->shortname,
1719
chip->revision,
1720
chip->irq);
1721
1722
err = snd_es1938_new_pcm(chip, 0);
1723
if (err < 0)
1724
return err;
1725
err = snd_es1938_mixer(chip);
1726
if (err < 0)
1727
return err;
1728
if (snd_opl3_create(card,
1729
SLSB_REG(chip, FMLOWADDR),
1730
SLSB_REG(chip, FMHIGHADDR),
1731
OPL3_HW_OPL3, 1, &opl3) < 0) {
1732
dev_err(card->dev, "OPL3 not detected at 0x%lx\n",
1733
SLSB_REG(chip, FMLOWADDR));
1734
} else {
1735
err = snd_opl3_timer_new(opl3, 0, 1);
1736
if (err < 0)
1737
return err;
1738
err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);
1739
if (err < 0)
1740
return err;
1741
}
1742
if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
1743
chip->mpu_port,
1744
MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
1745
-1, &chip->rmidi) < 0) {
1746
dev_err(card->dev, "unable to initialize MPU-401\n");
1747
} else {
1748
// this line is vital for MIDI interrupt handling on ess-solo1
1749
// [email protected]
1750
snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
1751
}
1752
1753
snd_es1938_create_gameport(chip);
1754
1755
err = snd_card_register(card);
1756
if (err < 0)
1757
return err;
1758
1759
pci_set_drvdata(pci, card);
1760
dev++;
1761
return 0;
1762
}
1763
1764
static int snd_es1938_probe(struct pci_dev *pci,
1765
const struct pci_device_id *pci_id)
1766
{
1767
return snd_card_free_on_error(&pci->dev, __snd_es1938_probe(pci, pci_id));
1768
}
1769
1770
static struct pci_driver es1938_driver = {
1771
.name = KBUILD_MODNAME,
1772
.id_table = snd_es1938_ids,
1773
.probe = snd_es1938_probe,
1774
.driver = {
1775
.pm = &es1938_pm,
1776
},
1777
};
1778
1779
module_pci_driver(es1938_driver);
1780
1781