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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/sound/pci/ice1712/delta.c
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1
// SPDX-License-Identifier: GPL-2.0-or-later
2
/*
3
* ALSA driver for ICEnsemble ICE1712 (Envy24)
4
*
5
* Lowlevel functions for M-Audio Delta 1010, 1010E, 44, 66, 66E, Dio2496,
6
* Audiophile, Digigram VX442
7
*
8
* Copyright (c) 2000 Jaroslav Kysela <[email protected]>
9
*/
10
11
#include <linux/delay.h>
12
#include <linux/interrupt.h>
13
#include <linux/init.h>
14
#include <linux/slab.h>
15
#include <linux/mutex.h>
16
17
#include <sound/core.h>
18
#include <sound/cs8427.h>
19
#include <sound/asoundef.h>
20
21
#include "ice1712.h"
22
#include "delta.h"
23
24
#define SND_CS8403
25
#include <sound/cs8403.h>
26
27
28
/*
29
* CS8427 via SPI mode (for Audiophile), emulated I2C
30
*/
31
32
/* send 8 bits */
33
static void ap_cs8427_write_byte(struct snd_ice1712 *ice, unsigned char data, unsigned char tmp)
34
{
35
int idx;
36
37
for (idx = 7; idx >= 0; idx--) {
38
tmp &= ~(ICE1712_DELTA_AP_DOUT|ICE1712_DELTA_AP_CCLK);
39
if (data & (1 << idx))
40
tmp |= ICE1712_DELTA_AP_DOUT;
41
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
42
udelay(5);
43
tmp |= ICE1712_DELTA_AP_CCLK;
44
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
45
udelay(5);
46
}
47
}
48
49
/* read 8 bits */
50
static unsigned char ap_cs8427_read_byte(struct snd_ice1712 *ice, unsigned char tmp)
51
{
52
unsigned char data = 0;
53
int idx;
54
55
for (idx = 7; idx >= 0; idx--) {
56
tmp &= ~ICE1712_DELTA_AP_CCLK;
57
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
58
udelay(5);
59
if (snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_DELTA_AP_DIN)
60
data |= 1 << idx;
61
tmp |= ICE1712_DELTA_AP_CCLK;
62
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
63
udelay(5);
64
}
65
return data;
66
}
67
68
/* assert chip select */
69
static unsigned char ap_cs8427_codec_select(struct snd_ice1712 *ice)
70
{
71
unsigned char tmp;
72
tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
73
switch (ice->eeprom.subvendor) {
74
case ICE1712_SUBDEVICE_DELTA1010E:
75
case ICE1712_SUBDEVICE_DELTA1010LT:
76
tmp &= ~ICE1712_DELTA_1010LT_CS;
77
tmp |= ICE1712_DELTA_1010LT_CCLK | ICE1712_DELTA_1010LT_CS_CS8427;
78
break;
79
case ICE1712_SUBDEVICE_AUDIOPHILE:
80
case ICE1712_SUBDEVICE_DELTA410:
81
tmp |= ICE1712_DELTA_AP_CCLK | ICE1712_DELTA_AP_CS_CODEC;
82
tmp &= ~ICE1712_DELTA_AP_CS_DIGITAL;
83
break;
84
case ICE1712_SUBDEVICE_DELTA66E:
85
tmp |= ICE1712_DELTA_66E_CCLK | ICE1712_DELTA_66E_CS_CHIP_A |
86
ICE1712_DELTA_66E_CS_CHIP_B;
87
tmp &= ~ICE1712_DELTA_66E_CS_CS8427;
88
break;
89
case ICE1712_SUBDEVICE_VX442:
90
tmp |= ICE1712_VX442_CCLK | ICE1712_VX442_CODEC_CHIP_A | ICE1712_VX442_CODEC_CHIP_B;
91
tmp &= ~ICE1712_VX442_CS_DIGITAL;
92
break;
93
}
94
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
95
udelay(5);
96
return tmp;
97
}
98
99
/* deassert chip select */
100
static void ap_cs8427_codec_deassert(struct snd_ice1712 *ice, unsigned char tmp)
101
{
102
switch (ice->eeprom.subvendor) {
103
case ICE1712_SUBDEVICE_DELTA1010E:
104
case ICE1712_SUBDEVICE_DELTA1010LT:
105
tmp &= ~ICE1712_DELTA_1010LT_CS;
106
tmp |= ICE1712_DELTA_1010LT_CS_NONE;
107
break;
108
case ICE1712_SUBDEVICE_AUDIOPHILE:
109
case ICE1712_SUBDEVICE_DELTA410:
110
tmp |= ICE1712_DELTA_AP_CS_DIGITAL;
111
break;
112
case ICE1712_SUBDEVICE_DELTA66E:
113
tmp |= ICE1712_DELTA_66E_CS_CS8427;
114
break;
115
case ICE1712_SUBDEVICE_VX442:
116
tmp |= ICE1712_VX442_CS_DIGITAL;
117
break;
118
}
119
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
120
}
121
122
/* sequential write */
123
static int ap_cs8427_sendbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
124
{
125
struct snd_ice1712 *ice = device->bus->private_data;
126
int res = count;
127
unsigned char tmp;
128
129
guard(mutex)(&ice->gpio_mutex);
130
tmp = ap_cs8427_codec_select(ice);
131
ap_cs8427_write_byte(ice, (device->addr << 1) | 0, tmp); /* address + write mode */
132
while (count-- > 0)
133
ap_cs8427_write_byte(ice, *bytes++, tmp);
134
ap_cs8427_codec_deassert(ice, tmp);
135
return res;
136
}
137
138
/* sequential read */
139
static int ap_cs8427_readbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
140
{
141
struct snd_ice1712 *ice = device->bus->private_data;
142
int res = count;
143
unsigned char tmp;
144
145
guard(mutex)(&ice->gpio_mutex);
146
tmp = ap_cs8427_codec_select(ice);
147
ap_cs8427_write_byte(ice, (device->addr << 1) | 1, tmp); /* address + read mode */
148
while (count-- > 0)
149
*bytes++ = ap_cs8427_read_byte(ice, tmp);
150
ap_cs8427_codec_deassert(ice, tmp);
151
return res;
152
}
153
154
static int ap_cs8427_probeaddr(struct snd_i2c_bus *bus, unsigned short addr)
155
{
156
if (addr == 0x10)
157
return 1;
158
return -ENOENT;
159
}
160
161
static const struct snd_i2c_ops ap_cs8427_i2c_ops = {
162
.sendbytes = ap_cs8427_sendbytes,
163
.readbytes = ap_cs8427_readbytes,
164
.probeaddr = ap_cs8427_probeaddr,
165
};
166
167
/*
168
*/
169
170
static void snd_ice1712_delta_cs8403_spdif_write(struct snd_ice1712 *ice, unsigned char bits)
171
{
172
unsigned char tmp, mask1, mask2;
173
int idx;
174
/* send byte to transmitter */
175
mask1 = ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK;
176
mask2 = ICE1712_DELTA_SPDIF_OUT_STAT_DATA;
177
guard(mutex)(&ice->gpio_mutex);
178
tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
179
for (idx = 7; idx >= 0; idx--) {
180
tmp &= ~(mask1 | mask2);
181
if (bits & (1 << idx))
182
tmp |= mask2;
183
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
184
udelay(100);
185
tmp |= mask1;
186
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
187
udelay(100);
188
}
189
tmp &= ~mask1;
190
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
191
}
192
193
194
static void delta_spdif_default_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
195
{
196
snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_bits);
197
}
198
199
static int delta_spdif_default_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
200
{
201
unsigned int val;
202
int change;
203
204
val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
205
scoped_guard(spinlock_irq, &ice->reg_lock) {
206
change = ice->spdif.cs8403_bits != val;
207
ice->spdif.cs8403_bits = val;
208
if (!change || ice->playback_pro_substream)
209
return change;
210
}
211
snd_ice1712_delta_cs8403_spdif_write(ice, val);
212
return change;
213
}
214
215
static void delta_spdif_stream_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
216
{
217
snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_stream_bits);
218
}
219
220
static int delta_spdif_stream_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
221
{
222
unsigned int val;
223
int change;
224
225
val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
226
scoped_guard(spinlock_irq, &ice->reg_lock) {
227
change = ice->spdif.cs8403_stream_bits != val;
228
ice->spdif.cs8403_stream_bits = val;
229
if (!change || ice->playback_pro_substream)
230
return change;
231
}
232
snd_ice1712_delta_cs8403_spdif_write(ice, val);
233
return change;
234
}
235
236
237
/*
238
* AK4524 on Delta 44 and 66 to choose the chip mask
239
*/
240
static void delta_ak4524_lock(struct snd_akm4xxx *ak, int chip)
241
{
242
struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
243
struct snd_ice1712 *ice = ak->private_data[0];
244
245
snd_ice1712_save_gpio_status(ice);
246
priv->cs_mask =
247
priv->cs_addr = chip == 0 ? ICE1712_DELTA_CODEC_CHIP_A :
248
ICE1712_DELTA_CODEC_CHIP_B;
249
}
250
251
/*
252
* AK4524 on Delta1010LT to choose the chip address
253
*/
254
static void delta1010lt_ak4524_lock(struct snd_akm4xxx *ak, int chip)
255
{
256
struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
257
struct snd_ice1712 *ice = ak->private_data[0];
258
259
snd_ice1712_save_gpio_status(ice);
260
priv->cs_mask = ICE1712_DELTA_1010LT_CS;
261
priv->cs_addr = chip << 4;
262
}
263
264
/*
265
* AK4524 on Delta66 rev E to choose the chip address
266
*/
267
static void delta66e_ak4524_lock(struct snd_akm4xxx *ak, int chip)
268
{
269
struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
270
struct snd_ice1712 *ice = ak->private_data[0];
271
272
snd_ice1712_save_gpio_status(ice);
273
priv->cs_mask =
274
priv->cs_addr = chip == 0 ? ICE1712_DELTA_66E_CS_CHIP_A :
275
ICE1712_DELTA_66E_CS_CHIP_B;
276
}
277
278
/*
279
* AK4528 on VX442 to choose the chip mask
280
*/
281
static void vx442_ak4524_lock(struct snd_akm4xxx *ak, int chip)
282
{
283
struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
284
struct snd_ice1712 *ice = ak->private_data[0];
285
286
snd_ice1712_save_gpio_status(ice);
287
priv->cs_mask =
288
priv->cs_addr = chip == 0 ? ICE1712_VX442_CODEC_CHIP_A :
289
ICE1712_VX442_CODEC_CHIP_B;
290
}
291
292
/*
293
* change the DFS bit according rate for Delta1010
294
*/
295
static void delta_1010_set_rate_val(struct snd_ice1712 *ice, unsigned int rate)
296
{
297
unsigned char tmp, tmp2;
298
299
if (rate == 0) /* no hint - S/PDIF input is master, simply return */
300
return;
301
302
guard(mutex)(&ice->gpio_mutex);
303
tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
304
tmp2 = tmp & ~ICE1712_DELTA_DFS;
305
if (rate > 48000)
306
tmp2 |= ICE1712_DELTA_DFS;
307
if (tmp != tmp2)
308
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp2);
309
}
310
311
/*
312
* change the rate of AK4524 on Delta 44/66, AP, 1010LT
313
*/
314
static void delta_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
315
{
316
unsigned char tmp, tmp2;
317
struct snd_ice1712 *ice = ak->private_data[0];
318
319
if (rate == 0) /* no hint - S/PDIF input is master, simply return */
320
return;
321
322
/* check before reset ak4524 to avoid unnecessary clicks */
323
scoped_guard(mutex, &ice->gpio_mutex) {
324
tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
325
}
326
tmp2 = tmp & ~ICE1712_DELTA_DFS;
327
if (rate > 48000)
328
tmp2 |= ICE1712_DELTA_DFS;
329
if (tmp == tmp2)
330
return;
331
332
/* do it again */
333
snd_akm4xxx_reset(ak, 1);
334
scoped_guard(mutex, &ice->gpio_mutex) {
335
tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ~ICE1712_DELTA_DFS;
336
if (rate > 48000)
337
tmp |= ICE1712_DELTA_DFS;
338
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
339
}
340
snd_akm4xxx_reset(ak, 0);
341
}
342
343
/*
344
* change the rate of AK4524 on VX442
345
*/
346
static void vx442_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
347
{
348
unsigned char val;
349
350
val = (rate > 48000) ? 0x65 : 0x60;
351
if (snd_akm4xxx_get(ak, 0, 0x02) != val ||
352
snd_akm4xxx_get(ak, 1, 0x02) != val) {
353
snd_akm4xxx_reset(ak, 1);
354
snd_akm4xxx_write(ak, 0, 0x02, val);
355
snd_akm4xxx_write(ak, 1, 0x02, val);
356
snd_akm4xxx_reset(ak, 0);
357
}
358
}
359
360
361
/*
362
* SPDIF ops for Delta 1010, Dio, 66
363
*/
364
365
/* open callback */
366
static void delta_open_spdif(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
367
{
368
ice->spdif.cs8403_stream_bits = ice->spdif.cs8403_bits;
369
}
370
371
/* set up */
372
static void delta_setup_spdif(struct snd_ice1712 *ice, int rate)
373
{
374
unsigned int tmp;
375
int change;
376
377
scoped_guard(spinlock_irqsave, &ice->reg_lock) {
378
tmp = ice->spdif.cs8403_stream_bits;
379
if (tmp & 0x01) /* consumer */
380
tmp &= (tmp & 0x01) ? ~0x06 : ~0x18;
381
switch (rate) {
382
case 32000: tmp |= (tmp & 0x01) ? 0x04 : 0x00; break;
383
case 44100: tmp |= (tmp & 0x01) ? 0x00 : 0x10; break;
384
case 48000: tmp |= (tmp & 0x01) ? 0x02 : 0x08; break;
385
default: tmp |= (tmp & 0x01) ? 0x00 : 0x18; break;
386
}
387
change = ice->spdif.cs8403_stream_bits != tmp;
388
ice->spdif.cs8403_stream_bits = tmp;
389
}
390
if (change)
391
snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif.stream_ctl->id);
392
snd_ice1712_delta_cs8403_spdif_write(ice, tmp);
393
}
394
395
#define snd_ice1712_delta1010lt_wordclock_status_info \
396
snd_ctl_boolean_mono_info
397
398
static int snd_ice1712_delta1010lt_wordclock_status_get(struct snd_kcontrol *kcontrol,
399
struct snd_ctl_elem_value *ucontrol)
400
{
401
char reg = 0x10; /* CS8427 receiver error register */
402
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
403
404
if (snd_i2c_sendbytes(ice->cs8427, &reg, 1) != 1)
405
dev_err(ice->card->dev,
406
"unable to send register 0x%x byte to CS8427\n", reg);
407
snd_i2c_readbytes(ice->cs8427, &reg, 1);
408
ucontrol->value.integer.value[0] = (reg & CS8427_UNLOCK) ? 1 : 0;
409
return 0;
410
}
411
412
static const struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_status =
413
{
414
.access = (SNDRV_CTL_ELEM_ACCESS_READ),
415
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
416
.name = "Word Clock Status",
417
.info = snd_ice1712_delta1010lt_wordclock_status_info,
418
.get = snd_ice1712_delta1010lt_wordclock_status_get,
419
};
420
421
/*
422
* initialize the chips on M-Audio cards
423
*/
424
425
static const struct snd_akm4xxx akm_audiophile = {
426
.type = SND_AK4528,
427
.num_adcs = 2,
428
.num_dacs = 2,
429
.ops = {
430
.set_rate_val = delta_ak4524_set_rate_val
431
}
432
};
433
434
static const struct snd_ak4xxx_private akm_audiophile_priv = {
435
.caddr = 2,
436
.cif = 0,
437
.data_mask = ICE1712_DELTA_AP_DOUT,
438
.clk_mask = ICE1712_DELTA_AP_CCLK,
439
.cs_mask = ICE1712_DELTA_AP_CS_CODEC,
440
.cs_addr = ICE1712_DELTA_AP_CS_CODEC,
441
.cs_none = 0,
442
.add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
443
.mask_flags = 0,
444
};
445
446
static const struct snd_akm4xxx akm_delta410 = {
447
.type = SND_AK4529,
448
.num_adcs = 2,
449
.num_dacs = 8,
450
.ops = {
451
.set_rate_val = delta_ak4524_set_rate_val
452
}
453
};
454
455
static const struct snd_ak4xxx_private akm_delta410_priv = {
456
.caddr = 0,
457
.cif = 0,
458
.data_mask = ICE1712_DELTA_AP_DOUT,
459
.clk_mask = ICE1712_DELTA_AP_CCLK,
460
.cs_mask = ICE1712_DELTA_AP_CS_CODEC,
461
.cs_addr = ICE1712_DELTA_AP_CS_CODEC,
462
.cs_none = 0,
463
.add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
464
.mask_flags = 0,
465
};
466
467
static const struct snd_akm4xxx akm_delta1010lt = {
468
.type = SND_AK4524,
469
.num_adcs = 8,
470
.num_dacs = 8,
471
.ops = {
472
.lock = delta1010lt_ak4524_lock,
473
.set_rate_val = delta_ak4524_set_rate_val
474
}
475
};
476
477
static const struct snd_ak4xxx_private akm_delta1010lt_priv = {
478
.caddr = 2,
479
.cif = 0, /* the default level of the CIF pin from AK4524 */
480
.data_mask = ICE1712_DELTA_1010LT_DOUT,
481
.clk_mask = ICE1712_DELTA_1010LT_CCLK,
482
.cs_mask = 0,
483
.cs_addr = 0, /* set later */
484
.cs_none = ICE1712_DELTA_1010LT_CS_NONE,
485
.add_flags = 0,
486
.mask_flags = 0,
487
};
488
489
static const struct snd_akm4xxx akm_delta66e = {
490
.type = SND_AK4524,
491
.num_adcs = 4,
492
.num_dacs = 4,
493
.ops = {
494
.lock = delta66e_ak4524_lock,
495
.set_rate_val = delta_ak4524_set_rate_val
496
}
497
};
498
499
static const struct snd_ak4xxx_private akm_delta66e_priv = {
500
.caddr = 2,
501
.cif = 0, /* the default level of the CIF pin from AK4524 */
502
.data_mask = ICE1712_DELTA_66E_DOUT,
503
.clk_mask = ICE1712_DELTA_66E_CCLK,
504
.cs_mask = 0,
505
.cs_addr = 0, /* set later */
506
.cs_none = 0,
507
.add_flags = 0,
508
.mask_flags = 0,
509
};
510
511
512
static const struct snd_akm4xxx akm_delta44 = {
513
.type = SND_AK4524,
514
.num_adcs = 4,
515
.num_dacs = 4,
516
.ops = {
517
.lock = delta_ak4524_lock,
518
.set_rate_val = delta_ak4524_set_rate_val
519
}
520
};
521
522
static const struct snd_ak4xxx_private akm_delta44_priv = {
523
.caddr = 2,
524
.cif = 0, /* the default level of the CIF pin from AK4524 */
525
.data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA,
526
.clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK,
527
.cs_mask = 0,
528
.cs_addr = 0, /* set later */
529
.cs_none = 0,
530
.add_flags = 0,
531
.mask_flags = 0,
532
};
533
534
static const struct snd_akm4xxx akm_vx442 = {
535
.type = SND_AK4524,
536
.num_adcs = 4,
537
.num_dacs = 4,
538
.ops = {
539
.lock = vx442_ak4524_lock,
540
.set_rate_val = vx442_ak4524_set_rate_val
541
}
542
};
543
544
static const struct snd_ak4xxx_private akm_vx442_priv = {
545
.caddr = 2,
546
.cif = 0,
547
.data_mask = ICE1712_VX442_DOUT,
548
.clk_mask = ICE1712_VX442_CCLK,
549
.cs_mask = 0,
550
.cs_addr = 0, /* set later */
551
.cs_none = 0,
552
.add_flags = 0,
553
.mask_flags = 0,
554
};
555
556
#ifdef CONFIG_PM_SLEEP
557
static int snd_ice1712_delta_resume(struct snd_ice1712 *ice)
558
{
559
unsigned char akm_img_bak[AK4XXX_IMAGE_SIZE];
560
unsigned char akm_vol_bak[AK4XXX_IMAGE_SIZE];
561
562
/* init spdif */
563
switch (ice->eeprom.subvendor) {
564
case ICE1712_SUBDEVICE_AUDIOPHILE:
565
case ICE1712_SUBDEVICE_DELTA410:
566
case ICE1712_SUBDEVICE_DELTA1010E:
567
case ICE1712_SUBDEVICE_DELTA1010LT:
568
case ICE1712_SUBDEVICE_VX442:
569
case ICE1712_SUBDEVICE_DELTA66E:
570
snd_cs8427_init(ice->i2c, ice->cs8427);
571
break;
572
case ICE1712_SUBDEVICE_DELTA1010:
573
case ICE1712_SUBDEVICE_MEDIASTATION:
574
/* nothing */
575
break;
576
case ICE1712_SUBDEVICE_DELTADIO2496:
577
case ICE1712_SUBDEVICE_DELTA66:
578
/* Set spdif defaults */
579
snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits);
580
break;
581
}
582
583
/* init codec and restore registers */
584
if (ice->akm_codecs) {
585
memcpy(akm_img_bak, ice->akm->images, sizeof(akm_img_bak));
586
memcpy(akm_vol_bak, ice->akm->volumes, sizeof(akm_vol_bak));
587
snd_akm4xxx_init(ice->akm);
588
memcpy(ice->akm->images, akm_img_bak, sizeof(akm_img_bak));
589
memcpy(ice->akm->volumes, akm_vol_bak, sizeof(akm_vol_bak));
590
snd_akm4xxx_reset(ice->akm, 0);
591
}
592
593
return 0;
594
}
595
596
static int snd_ice1712_delta_suspend(struct snd_ice1712 *ice)
597
{
598
if (ice->akm_codecs) /* reset & mute codec */
599
snd_akm4xxx_reset(ice->akm, 1);
600
601
return 0;
602
}
603
#endif
604
605
static int snd_ice1712_delta_init(struct snd_ice1712 *ice)
606
{
607
int err;
608
struct snd_akm4xxx *ak;
609
unsigned char tmp;
610
611
if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA1010 &&
612
ice->eeprom.gpiodir == 0x7b)
613
ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA1010E;
614
615
if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA66 &&
616
ice->eeprom.gpiodir == 0xfb)
617
ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA66E;
618
619
/* determine I2C, DACs and ADCs */
620
switch (ice->eeprom.subvendor) {
621
case ICE1712_SUBDEVICE_AUDIOPHILE:
622
ice->num_total_dacs = 2;
623
ice->num_total_adcs = 2;
624
break;
625
case ICE1712_SUBDEVICE_DELTA410:
626
ice->num_total_dacs = 8;
627
ice->num_total_adcs = 2;
628
break;
629
case ICE1712_SUBDEVICE_DELTA44:
630
case ICE1712_SUBDEVICE_DELTA66:
631
ice->num_total_dacs = ice->omni ? 8 : 4;
632
ice->num_total_adcs = ice->omni ? 8 : 4;
633
break;
634
case ICE1712_SUBDEVICE_DELTA1010:
635
case ICE1712_SUBDEVICE_DELTA1010E:
636
case ICE1712_SUBDEVICE_DELTA1010LT:
637
case ICE1712_SUBDEVICE_MEDIASTATION:
638
case ICE1712_SUBDEVICE_EDIROLDA2496:
639
ice->num_total_dacs = 8;
640
ice->num_total_adcs = 8;
641
break;
642
case ICE1712_SUBDEVICE_DELTADIO2496:
643
ice->num_total_dacs = 4; /* two AK4324 codecs */
644
break;
645
case ICE1712_SUBDEVICE_VX442:
646
case ICE1712_SUBDEVICE_DELTA66E: /* omni not supported yet */
647
ice->num_total_dacs = 4;
648
ice->num_total_adcs = 4;
649
break;
650
}
651
#ifdef CONFIG_PM_SLEEP
652
ice->pm_resume = snd_ice1712_delta_resume;
653
ice->pm_suspend = snd_ice1712_delta_suspend;
654
ice->pm_suspend_enabled = 1;
655
#endif
656
/* initialize the SPI clock to high */
657
tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
658
tmp |= ICE1712_DELTA_AP_CCLK;
659
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
660
udelay(5);
661
662
/* initialize spdif */
663
switch (ice->eeprom.subvendor) {
664
case ICE1712_SUBDEVICE_AUDIOPHILE:
665
case ICE1712_SUBDEVICE_DELTA410:
666
case ICE1712_SUBDEVICE_DELTA1010E:
667
case ICE1712_SUBDEVICE_DELTA1010LT:
668
case ICE1712_SUBDEVICE_VX442:
669
case ICE1712_SUBDEVICE_DELTA66E:
670
err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c);
671
if (err < 0) {
672
dev_err(ice->card->dev, "unable to create I2C bus\n");
673
return err;
674
}
675
ice->i2c->private_data = ice;
676
ice->i2c->ops = &ap_cs8427_i2c_ops;
677
err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR);
678
if (err < 0)
679
return err;
680
break;
681
case ICE1712_SUBDEVICE_DELTA1010:
682
case ICE1712_SUBDEVICE_MEDIASTATION:
683
ice->gpio.set_pro_rate = delta_1010_set_rate_val;
684
break;
685
case ICE1712_SUBDEVICE_DELTADIO2496:
686
ice->gpio.set_pro_rate = delta_1010_set_rate_val;
687
fallthrough;
688
case ICE1712_SUBDEVICE_DELTA66:
689
ice->spdif.ops.open = delta_open_spdif;
690
ice->spdif.ops.setup_rate = delta_setup_spdif;
691
ice->spdif.ops.default_get = delta_spdif_default_get;
692
ice->spdif.ops.default_put = delta_spdif_default_put;
693
ice->spdif.ops.stream_get = delta_spdif_stream_get;
694
ice->spdif.ops.stream_put = delta_spdif_stream_put;
695
/* Set spdif defaults */
696
snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits);
697
break;
698
}
699
700
/* no analog? */
701
switch (ice->eeprom.subvendor) {
702
case ICE1712_SUBDEVICE_DELTA1010:
703
case ICE1712_SUBDEVICE_DELTA1010E:
704
case ICE1712_SUBDEVICE_DELTADIO2496:
705
case ICE1712_SUBDEVICE_MEDIASTATION:
706
return 0;
707
}
708
709
/* second stage of initialization, analog parts and others */
710
ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
711
if (! ak)
712
return -ENOMEM;
713
ice->akm_codecs = 1;
714
715
switch (ice->eeprom.subvendor) {
716
case ICE1712_SUBDEVICE_AUDIOPHILE:
717
err = snd_ice1712_akm4xxx_init(ak, &akm_audiophile, &akm_audiophile_priv, ice);
718
break;
719
case ICE1712_SUBDEVICE_DELTA410:
720
err = snd_ice1712_akm4xxx_init(ak, &akm_delta410, &akm_delta410_priv, ice);
721
break;
722
case ICE1712_SUBDEVICE_DELTA1010LT:
723
case ICE1712_SUBDEVICE_EDIROLDA2496:
724
err = snd_ice1712_akm4xxx_init(ak, &akm_delta1010lt, &akm_delta1010lt_priv, ice);
725
break;
726
case ICE1712_SUBDEVICE_DELTA66:
727
case ICE1712_SUBDEVICE_DELTA44:
728
err = snd_ice1712_akm4xxx_init(ak, &akm_delta44, &akm_delta44_priv, ice);
729
break;
730
case ICE1712_SUBDEVICE_VX442:
731
err = snd_ice1712_akm4xxx_init(ak, &akm_vx442, &akm_vx442_priv, ice);
732
break;
733
case ICE1712_SUBDEVICE_DELTA66E:
734
err = snd_ice1712_akm4xxx_init(ak, &akm_delta66e, &akm_delta66e_priv, ice);
735
break;
736
default:
737
snd_BUG();
738
return -EINVAL;
739
}
740
741
return err;
742
}
743
744
745
/*
746
* additional controls for M-Audio cards
747
*/
748
749
static const struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_select =
750
ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_WORD_CLOCK_SELECT, 1, 0);
751
static const struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_select =
752
ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_1010LT_WORDCLOCK, 0, 0);
753
static const struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_status =
754
ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Status", 0, ICE1712_DELTA_WORD_CLOCK_STATUS, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
755
static const struct snd_kcontrol_new snd_ice1712_deltadio2496_spdif_in_select =
756
ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, ICE1712_DELTA_SPDIF_INPUT_SELECT, 0, 0);
757
static const struct snd_kcontrol_new snd_ice1712_delta_spdif_in_status =
758
ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Delta IEC958 Input Status", 0, ICE1712_DELTA_SPDIF_IN_STAT, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
759
760
761
static int snd_ice1712_delta_add_controls(struct snd_ice1712 *ice)
762
{
763
int err;
764
765
/* 1010 and dio specific controls */
766
switch (ice->eeprom.subvendor) {
767
case ICE1712_SUBDEVICE_DELTA1010:
768
case ICE1712_SUBDEVICE_MEDIASTATION:
769
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_select, ice));
770
if (err < 0)
771
return err;
772
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_status, ice));
773
if (err < 0)
774
return err;
775
break;
776
case ICE1712_SUBDEVICE_DELTADIO2496:
777
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_deltadio2496_spdif_in_select, ice));
778
if (err < 0)
779
return err;
780
break;
781
case ICE1712_SUBDEVICE_DELTA1010E:
782
case ICE1712_SUBDEVICE_DELTA1010LT:
783
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_select, ice));
784
if (err < 0)
785
return err;
786
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_status, ice));
787
if (err < 0)
788
return err;
789
break;
790
}
791
792
/* normal spdif controls */
793
switch (ice->eeprom.subvendor) {
794
case ICE1712_SUBDEVICE_DELTA1010:
795
case ICE1712_SUBDEVICE_DELTADIO2496:
796
case ICE1712_SUBDEVICE_DELTA66:
797
case ICE1712_SUBDEVICE_MEDIASTATION:
798
err = snd_ice1712_spdif_build_controls(ice);
799
if (err < 0)
800
return err;
801
break;
802
}
803
804
/* spdif status in */
805
switch (ice->eeprom.subvendor) {
806
case ICE1712_SUBDEVICE_DELTA1010:
807
case ICE1712_SUBDEVICE_DELTADIO2496:
808
case ICE1712_SUBDEVICE_DELTA66:
809
case ICE1712_SUBDEVICE_MEDIASTATION:
810
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta_spdif_in_status, ice));
811
if (err < 0)
812
return err;
813
break;
814
}
815
816
/* ak4524 controls */
817
switch (ice->eeprom.subvendor) {
818
case ICE1712_SUBDEVICE_DELTA1010LT:
819
case ICE1712_SUBDEVICE_AUDIOPHILE:
820
case ICE1712_SUBDEVICE_DELTA410:
821
case ICE1712_SUBDEVICE_DELTA44:
822
case ICE1712_SUBDEVICE_DELTA66:
823
case ICE1712_SUBDEVICE_VX442:
824
case ICE1712_SUBDEVICE_DELTA66E:
825
case ICE1712_SUBDEVICE_EDIROLDA2496:
826
err = snd_ice1712_akm4xxx_build_controls(ice);
827
if (err < 0)
828
return err;
829
break;
830
}
831
832
return 0;
833
}
834
835
836
/* entry point */
837
struct snd_ice1712_card_info snd_ice1712_delta_cards[] = {
838
{
839
.subvendor = ICE1712_SUBDEVICE_DELTA1010,
840
.name = "M Audio Delta 1010",
841
.model = "delta1010",
842
.chip_init = snd_ice1712_delta_init,
843
.build_controls = snd_ice1712_delta_add_controls,
844
},
845
{
846
.subvendor = ICE1712_SUBDEVICE_DELTADIO2496,
847
.name = "M Audio Delta DiO 2496",
848
.model = "dio2496",
849
.chip_init = snd_ice1712_delta_init,
850
.build_controls = snd_ice1712_delta_add_controls,
851
.no_mpu401 = 1,
852
},
853
{
854
.subvendor = ICE1712_SUBDEVICE_DELTA66,
855
.name = "M Audio Delta 66",
856
.model = "delta66",
857
.chip_init = snd_ice1712_delta_init,
858
.build_controls = snd_ice1712_delta_add_controls,
859
.no_mpu401 = 1,
860
},
861
{
862
.subvendor = ICE1712_SUBDEVICE_DELTA44,
863
.name = "M Audio Delta 44",
864
.model = "delta44",
865
.chip_init = snd_ice1712_delta_init,
866
.build_controls = snd_ice1712_delta_add_controls,
867
.no_mpu401 = 1,
868
},
869
{
870
.subvendor = ICE1712_SUBDEVICE_AUDIOPHILE,
871
.name = "M Audio Audiophile 24/96",
872
.model = "audiophile",
873
.chip_init = snd_ice1712_delta_init,
874
.build_controls = snd_ice1712_delta_add_controls,
875
},
876
{
877
.subvendor = ICE1712_SUBDEVICE_DELTA410,
878
.name = "M Audio Delta 410",
879
.model = "delta410",
880
.chip_init = snd_ice1712_delta_init,
881
.build_controls = snd_ice1712_delta_add_controls,
882
},
883
{
884
.subvendor = ICE1712_SUBDEVICE_DELTA1010LT,
885
.name = "M Audio Delta 1010LT",
886
.model = "delta1010lt",
887
.chip_init = snd_ice1712_delta_init,
888
.build_controls = snd_ice1712_delta_add_controls,
889
},
890
{
891
.subvendor = ICE1712_SUBDEVICE_VX442,
892
.name = "Digigram VX442",
893
.model = "vx442",
894
.chip_init = snd_ice1712_delta_init,
895
.build_controls = snd_ice1712_delta_add_controls,
896
.no_mpu401 = 1,
897
},
898
{
899
.subvendor = ICE1712_SUBDEVICE_MEDIASTATION,
900
.name = "Lionstracs Mediastation",
901
.model = "mediastation",
902
.chip_init = snd_ice1712_delta_init,
903
.build_controls = snd_ice1712_delta_add_controls,
904
},
905
{
906
.subvendor = ICE1712_SUBDEVICE_EDIROLDA2496,
907
.name = "Edirol DA2496",
908
.model = "da2496",
909
.chip_init = snd_ice1712_delta_init,
910
.build_controls = snd_ice1712_delta_add_controls,
911
},
912
{ } /* terminator */
913
};
914
915