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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/sound/pci/ice1712/ice1712.c
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1
// SPDX-License-Identifier: GPL-2.0-or-later
2
/*
3
* ALSA driver for ICEnsemble ICE1712 (Envy24)
4
*
5
* Copyright (c) 2000 Jaroslav Kysela <[email protected]>
6
*/
7
8
/*
9
NOTES:
10
- spdif nonaudio consumer mode does not work (at least with my
11
Sony STR-DB830)
12
*/
13
14
/*
15
* Changes:
16
*
17
* 2002.09.09 Takashi Iwai <[email protected]>
18
* split the code to several files. each low-level routine
19
* is stored in the local file and called from registration
20
* function from card_info struct.
21
*
22
* 2002.11.26 James Stafford <[email protected]>
23
* Added support for VT1724 (Envy24HT)
24
* I have left out support for 176.4 and 192 KHz for the moment.
25
* I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
26
*
27
* 2003.02.20 Taksahi Iwai <[email protected]>
28
* Split vt1724 part to an independent driver.
29
* The GPIO is accessed through the callback functions now.
30
*
31
* 2004.03.31 Doug McLain <[email protected]>
32
* Added support for Event Electronics EZ8 card to hoontech.c.
33
*/
34
35
36
#include <linux/delay.h>
37
#include <linux/interrupt.h>
38
#include <linux/init.h>
39
#include <linux/pci.h>
40
#include <linux/dma-mapping.h>
41
#include <linux/slab.h>
42
#include <linux/module.h>
43
#include <linux/mutex.h>
44
45
#include <sound/core.h>
46
#include <sound/cs8427.h>
47
#include <sound/info.h>
48
#include <sound/initval.h>
49
#include <sound/tlv.h>
50
51
#include <sound/asoundef.h>
52
53
#include "ice1712.h"
54
55
/* lowlevel routines */
56
#include "delta.h"
57
#include "ews.h"
58
#include "hoontech.h"
59
60
MODULE_AUTHOR("Jaroslav Kysela <[email protected]>");
61
MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
62
MODULE_LICENSE("GPL");
63
64
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
65
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
66
static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
67
static char *model[SNDRV_CARDS];
68
static bool omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
69
static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transceiver reset timeout value in msec */
70
static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
71
72
module_param_array(index, int, NULL, 0444);
73
MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
74
module_param_array(id, charp, NULL, 0444);
75
MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
76
module_param_array(enable, bool, NULL, 0444);
77
MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
78
module_param_array(omni, bool, NULL, 0444);
79
MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
80
module_param_array(cs8427_timeout, int, NULL, 0444);
81
MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
82
module_param_array(model, charp, NULL, 0444);
83
MODULE_PARM_DESC(model, "Use the given board model.");
84
module_param_array(dxr_enable, int, NULL, 0444);
85
MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
86
87
88
static const struct pci_device_id snd_ice1712_ids[] = {
89
{ PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 }, /* ICE1712 */
90
{ 0, }
91
};
92
93
MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
94
95
static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
96
static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
97
98
static int PRO_RATE_LOCKED;
99
static int PRO_RATE_RESET = 1;
100
static unsigned int PRO_RATE_DEFAULT = 44100;
101
102
/*
103
* Basic I/O
104
*/
105
106
/* check whether the clock mode is spdif-in */
107
static inline int is_spdif_master(struct snd_ice1712 *ice)
108
{
109
return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
110
}
111
112
static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
113
{
114
return is_spdif_master(ice) || PRO_RATE_LOCKED;
115
}
116
117
static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data)
118
{
119
outb((channel << 4) | addr, ICEDS(ice, INDEX));
120
outl(data, ICEDS(ice, DATA));
121
}
122
123
static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr)
124
{
125
outb((channel << 4) | addr, ICEDS(ice, INDEX));
126
return inl(ICEDS(ice, DATA));
127
}
128
129
static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
130
unsigned short reg,
131
unsigned short val)
132
{
133
struct snd_ice1712 *ice = ac97->private_data;
134
int tm;
135
unsigned char old_cmd = 0;
136
137
for (tm = 0; tm < 0x10000; tm++) {
138
old_cmd = inb(ICEREG(ice, AC97_CMD));
139
if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
140
continue;
141
if (!(old_cmd & ICE1712_AC97_READY))
142
continue;
143
break;
144
}
145
outb(reg, ICEREG(ice, AC97_INDEX));
146
outw(val, ICEREG(ice, AC97_DATA));
147
old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
148
outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
149
for (tm = 0; tm < 0x10000; tm++)
150
if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
151
break;
152
}
153
154
static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
155
unsigned short reg)
156
{
157
struct snd_ice1712 *ice = ac97->private_data;
158
int tm;
159
unsigned char old_cmd = 0;
160
161
for (tm = 0; tm < 0x10000; tm++) {
162
old_cmd = inb(ICEREG(ice, AC97_CMD));
163
if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
164
continue;
165
if (!(old_cmd & ICE1712_AC97_READY))
166
continue;
167
break;
168
}
169
outb(reg, ICEREG(ice, AC97_INDEX));
170
outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
171
for (tm = 0; tm < 0x10000; tm++)
172
if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
173
break;
174
if (tm >= 0x10000) /* timeout */
175
return ~0;
176
return inw(ICEREG(ice, AC97_DATA));
177
}
178
179
/*
180
* pro ac97 section
181
*/
182
183
static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
184
unsigned short reg,
185
unsigned short val)
186
{
187
struct snd_ice1712 *ice = ac97->private_data;
188
int tm;
189
unsigned char old_cmd = 0;
190
191
for (tm = 0; tm < 0x10000; tm++) {
192
old_cmd = inb(ICEMT(ice, AC97_CMD));
193
if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
194
continue;
195
if (!(old_cmd & ICE1712_AC97_READY))
196
continue;
197
break;
198
}
199
outb(reg, ICEMT(ice, AC97_INDEX));
200
outw(val, ICEMT(ice, AC97_DATA));
201
old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
202
outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
203
for (tm = 0; tm < 0x10000; tm++)
204
if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
205
break;
206
}
207
208
209
static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
210
unsigned short reg)
211
{
212
struct snd_ice1712 *ice = ac97->private_data;
213
int tm;
214
unsigned char old_cmd = 0;
215
216
for (tm = 0; tm < 0x10000; tm++) {
217
old_cmd = inb(ICEMT(ice, AC97_CMD));
218
if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
219
continue;
220
if (!(old_cmd & ICE1712_AC97_READY))
221
continue;
222
break;
223
}
224
outb(reg, ICEMT(ice, AC97_INDEX));
225
outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
226
for (tm = 0; tm < 0x10000; tm++)
227
if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
228
break;
229
if (tm >= 0x10000) /* timeout */
230
return ~0;
231
return inw(ICEMT(ice, AC97_DATA));
232
}
233
234
/*
235
* consumer ac97 digital mix
236
*/
237
#define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info
238
239
static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
240
{
241
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
242
243
ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
244
return 0;
245
}
246
247
static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
248
{
249
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
250
unsigned char val, nval;
251
252
guard(spinlock_irq)(&ice->reg_lock);
253
val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
254
nval = val & ~ICE1712_ROUTE_AC97;
255
if (ucontrol->value.integer.value[0])
256
nval |= ICE1712_ROUTE_AC97;
257
outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
258
return val != nval;
259
}
260
261
static const struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 = {
262
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
263
.name = "Digital Mixer To AC97",
264
.info = snd_ice1712_digmix_route_ac97_info,
265
.get = snd_ice1712_digmix_route_ac97_get,
266
.put = snd_ice1712_digmix_route_ac97_put,
267
};
268
269
270
/*
271
* gpio operations
272
*/
273
static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
274
{
275
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
276
inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
277
}
278
279
static unsigned int snd_ice1712_get_gpio_dir(struct snd_ice1712 *ice)
280
{
281
return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION);
282
}
283
284
static unsigned int snd_ice1712_get_gpio_mask(struct snd_ice1712 *ice)
285
{
286
return snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK);
287
}
288
289
static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
290
{
291
snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
292
inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
293
}
294
295
static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
296
{
297
return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
298
}
299
300
static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
301
{
302
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
303
inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
304
}
305
306
/*
307
*
308
* CS8427 interface
309
*
310
*/
311
312
/*
313
* change the input clock selection
314
* spdif_clock = 1 - IEC958 input, 0 - Envy24
315
*/
316
static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
317
{
318
unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
319
unsigned char val, nval;
320
int res = 0;
321
322
snd_i2c_lock(ice->i2c);
323
if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
324
snd_i2c_unlock(ice->i2c);
325
return -EIO;
326
}
327
if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
328
snd_i2c_unlock(ice->i2c);
329
return -EIO;
330
}
331
nval = val & 0xf0;
332
if (spdif_clock)
333
nval |= 0x01;
334
else
335
nval |= 0x04;
336
if (val != nval) {
337
reg[1] = nval;
338
if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
339
res = -EIO;
340
} else {
341
res++;
342
}
343
}
344
snd_i2c_unlock(ice->i2c);
345
return res;
346
}
347
348
/*
349
* spdif callbacks
350
*/
351
static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
352
{
353
snd_cs8427_iec958_active(ice->cs8427, 1);
354
}
355
356
static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
357
{
358
snd_cs8427_iec958_active(ice->cs8427, 0);
359
}
360
361
static void setup_cs8427(struct snd_ice1712 *ice, int rate)
362
{
363
snd_cs8427_iec958_pcm(ice->cs8427, rate);
364
}
365
366
/*
367
* create and initialize callbacks for cs8427 interface
368
*/
369
int snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
370
{
371
int err;
372
373
err = snd_cs8427_create(ice->i2c, addr,
374
(ice->cs8427_timeout * HZ) / 1000, &ice->cs8427);
375
if (err < 0) {
376
dev_err(ice->card->dev, "CS8427 initialization failed\n");
377
return err;
378
}
379
ice->spdif.ops.open = open_cs8427;
380
ice->spdif.ops.close = close_cs8427;
381
ice->spdif.ops.setup_rate = setup_cs8427;
382
return 0;
383
}
384
385
static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
386
{
387
/* change CS8427 clock source too */
388
if (ice->cs8427)
389
snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
390
/* notify ak4524 chip as well */
391
if (spdif_is_master) {
392
unsigned int i;
393
for (i = 0; i < ice->akm_codecs; i++) {
394
if (ice->akm[i].ops.set_rate_val)
395
ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
396
}
397
}
398
}
399
400
/*
401
* Interrupt handler
402
*/
403
404
static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id)
405
{
406
struct snd_ice1712 *ice = dev_id;
407
unsigned char status;
408
int handled = 0;
409
410
while (1) {
411
status = inb(ICEREG(ice, IRQSTAT));
412
if (status == 0)
413
break;
414
handled = 1;
415
if (status & ICE1712_IRQ_MPU1) {
416
if (ice->rmidi[0])
417
snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
418
outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
419
status &= ~ICE1712_IRQ_MPU1;
420
}
421
if (status & ICE1712_IRQ_TIMER)
422
outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
423
if (status & ICE1712_IRQ_MPU2) {
424
if (ice->rmidi[1])
425
snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data);
426
outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
427
status &= ~ICE1712_IRQ_MPU2;
428
}
429
if (status & ICE1712_IRQ_PROPCM) {
430
unsigned char mtstat = inb(ICEMT(ice, IRQ));
431
if (mtstat & ICE1712_MULTI_PBKSTATUS) {
432
if (ice->playback_pro_substream)
433
snd_pcm_period_elapsed(ice->playback_pro_substream);
434
outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
435
}
436
if (mtstat & ICE1712_MULTI_CAPSTATUS) {
437
if (ice->capture_pro_substream)
438
snd_pcm_period_elapsed(ice->capture_pro_substream);
439
outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
440
}
441
}
442
if (status & ICE1712_IRQ_FM)
443
outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
444
if (status & ICE1712_IRQ_PBKDS) {
445
u32 idx;
446
u16 pbkstatus;
447
struct snd_pcm_substream *substream;
448
pbkstatus = inw(ICEDS(ice, INTSTAT));
449
/* dev_dbg(ice->card->dev, "pbkstatus = 0x%x\n", pbkstatus); */
450
for (idx = 0; idx < 6; idx++) {
451
if ((pbkstatus & (3 << (idx * 2))) == 0)
452
continue;
453
substream = ice->playback_con_substream_ds[idx];
454
if (substream != NULL)
455
snd_pcm_period_elapsed(substream);
456
outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
457
}
458
outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
459
}
460
if (status & ICE1712_IRQ_CONCAP) {
461
if (ice->capture_con_substream)
462
snd_pcm_period_elapsed(ice->capture_con_substream);
463
outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
464
}
465
if (status & ICE1712_IRQ_CONPBK) {
466
if (ice->playback_con_substream)
467
snd_pcm_period_elapsed(ice->playback_con_substream);
468
outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
469
}
470
}
471
return IRQ_RETVAL(handled);
472
}
473
474
475
/*
476
* PCM part - consumer I/O
477
*/
478
479
static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
480
int cmd)
481
{
482
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
483
int result = 0;
484
u32 tmp;
485
486
guard(spinlock)(&ice->reg_lock);
487
tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
488
if (cmd == SNDRV_PCM_TRIGGER_START) {
489
tmp |= 1;
490
} else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
491
tmp &= ~1;
492
} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
493
tmp |= 2;
494
} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
495
tmp &= ~2;
496
} else {
497
result = -EINVAL;
498
}
499
snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
500
return result;
501
}
502
503
static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
504
int cmd)
505
{
506
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
507
int result = 0;
508
u32 tmp;
509
510
guard(spinlock)(&ice->reg_lock);
511
tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
512
if (cmd == SNDRV_PCM_TRIGGER_START) {
513
tmp |= 1;
514
} else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
515
tmp &= ~1;
516
} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
517
tmp |= 2;
518
} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
519
tmp &= ~2;
520
} else {
521
result = -EINVAL;
522
}
523
snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
524
return result;
525
}
526
527
static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
528
int cmd)
529
{
530
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
531
int result = 0;
532
u8 tmp;
533
534
guard(spinlock)(&ice->reg_lock);
535
tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
536
if (cmd == SNDRV_PCM_TRIGGER_START) {
537
tmp |= 1;
538
} else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
539
tmp &= ~1;
540
} else {
541
result = -EINVAL;
542
}
543
snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
544
return result;
545
}
546
547
static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
548
{
549
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
550
struct snd_pcm_runtime *runtime = substream->runtime;
551
u32 period_size, buf_size, rate, tmp;
552
553
period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
554
buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
555
tmp = 0x0000;
556
if (snd_pcm_format_width(runtime->format) == 16)
557
tmp |= 0x10;
558
if (runtime->channels == 2)
559
tmp |= 0x08;
560
rate = (runtime->rate * 8192) / 375;
561
if (rate > 0x000fffff)
562
rate = 0x000fffff;
563
guard(spinlock_irq)(&ice->reg_lock);
564
outb(0, ice->ddma_port + 15);
565
outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
566
outl(runtime->dma_addr, ice->ddma_port + 0);
567
outw(buf_size, ice->ddma_port + 4);
568
snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
569
snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
570
snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
571
snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
572
snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
573
snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
574
snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
575
snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
576
return 0;
577
}
578
579
static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
580
{
581
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
582
struct snd_pcm_runtime *runtime = substream->runtime;
583
u32 period_size, rate, tmp, chn;
584
585
period_size = snd_pcm_lib_period_bytes(substream) - 1;
586
tmp = 0x0064;
587
if (snd_pcm_format_width(runtime->format) == 16)
588
tmp &= ~0x04;
589
if (runtime->channels == 2)
590
tmp |= 0x08;
591
rate = (runtime->rate * 8192) / 375;
592
if (rate > 0x000fffff)
593
rate = 0x000fffff;
594
ice->playback_con_active_buf[substream->number] = 0;
595
ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
596
chn = substream->number * 2;
597
guard(spinlock_irq)(&ice->reg_lock);
598
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
599
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
600
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
601
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
602
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
603
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
604
snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
605
if (runtime->channels == 2) {
606
snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
607
snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
608
}
609
return 0;
610
}
611
612
static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
613
{
614
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
615
struct snd_pcm_runtime *runtime = substream->runtime;
616
u32 period_size, buf_size;
617
u8 tmp;
618
619
period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
620
buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
621
tmp = 0x06;
622
if (snd_pcm_format_width(runtime->format) == 16)
623
tmp &= ~0x04;
624
if (runtime->channels == 2)
625
tmp &= ~0x02;
626
scoped_guard(spinlock_irq, &ice->reg_lock) {
627
outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
628
outw(buf_size, ICEREG(ice, CONCAP_COUNT));
629
snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
630
snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
631
snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
632
}
633
snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
634
return 0;
635
}
636
637
static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
638
{
639
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
640
struct snd_pcm_runtime *runtime = substream->runtime;
641
size_t ptr;
642
643
if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
644
return 0;
645
ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
646
ptr = bytes_to_frames(substream->runtime, ptr);
647
if (ptr == runtime->buffer_size)
648
ptr = 0;
649
return ptr;
650
}
651
652
static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
653
{
654
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
655
u8 addr;
656
size_t ptr;
657
658
if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
659
return 0;
660
if (ice->playback_con_active_buf[substream->number])
661
addr = ICE1712_DSC_ADDR1;
662
else
663
addr = ICE1712_DSC_ADDR0;
664
ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
665
ice->playback_con_virt_addr[substream->number];
666
ptr = bytes_to_frames(substream->runtime, ptr);
667
if (ptr == substream->runtime->buffer_size)
668
ptr = 0;
669
return ptr;
670
}
671
672
static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
673
{
674
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
675
size_t ptr;
676
677
if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
678
return 0;
679
ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
680
ptr = bytes_to_frames(substream->runtime, ptr);
681
if (ptr == substream->runtime->buffer_size)
682
ptr = 0;
683
return ptr;
684
}
685
686
static const struct snd_pcm_hardware snd_ice1712_playback = {
687
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
688
SNDRV_PCM_INFO_BLOCK_TRANSFER |
689
SNDRV_PCM_INFO_MMAP_VALID |
690
SNDRV_PCM_INFO_PAUSE),
691
.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
692
.rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
693
.rate_min = 4000,
694
.rate_max = 48000,
695
.channels_min = 1,
696
.channels_max = 2,
697
.buffer_bytes_max = (64*1024),
698
.period_bytes_min = 64,
699
.period_bytes_max = (64*1024),
700
.periods_min = 1,
701
.periods_max = 1024,
702
.fifo_size = 0,
703
};
704
705
static const struct snd_pcm_hardware snd_ice1712_playback_ds = {
706
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
707
SNDRV_PCM_INFO_BLOCK_TRANSFER |
708
SNDRV_PCM_INFO_MMAP_VALID |
709
SNDRV_PCM_INFO_PAUSE),
710
.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
711
.rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
712
.rate_min = 4000,
713
.rate_max = 48000,
714
.channels_min = 1,
715
.channels_max = 2,
716
.buffer_bytes_max = (128*1024),
717
.period_bytes_min = 64,
718
.period_bytes_max = (128*1024),
719
.periods_min = 2,
720
.periods_max = 2,
721
.fifo_size = 0,
722
};
723
724
static const struct snd_pcm_hardware snd_ice1712_capture = {
725
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
726
SNDRV_PCM_INFO_BLOCK_TRANSFER |
727
SNDRV_PCM_INFO_MMAP_VALID),
728
.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
729
.rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
730
.rate_min = 4000,
731
.rate_max = 48000,
732
.channels_min = 1,
733
.channels_max = 2,
734
.buffer_bytes_max = (64*1024),
735
.period_bytes_min = 64,
736
.period_bytes_max = (64*1024),
737
.periods_min = 1,
738
.periods_max = 1024,
739
.fifo_size = 0,
740
};
741
742
static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
743
{
744
struct snd_pcm_runtime *runtime = substream->runtime;
745
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
746
747
ice->playback_con_substream = substream;
748
runtime->hw = snd_ice1712_playback;
749
return 0;
750
}
751
752
static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
753
{
754
struct snd_pcm_runtime *runtime = substream->runtime;
755
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
756
u32 tmp;
757
758
ice->playback_con_substream_ds[substream->number] = substream;
759
runtime->hw = snd_ice1712_playback_ds;
760
guard(spinlock_irq)(&ice->reg_lock);
761
tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
762
outw(tmp, ICEDS(ice, INTMASK));
763
return 0;
764
}
765
766
static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
767
{
768
struct snd_pcm_runtime *runtime = substream->runtime;
769
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
770
771
ice->capture_con_substream = substream;
772
runtime->hw = snd_ice1712_capture;
773
runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
774
if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
775
runtime->hw.rate_min = 48000;
776
return 0;
777
}
778
779
static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
780
{
781
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
782
783
ice->playback_con_substream = NULL;
784
return 0;
785
}
786
787
static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
788
{
789
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
790
u32 tmp;
791
792
guard(spinlock_irq)(&ice->reg_lock);
793
tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
794
outw(tmp, ICEDS(ice, INTMASK));
795
ice->playback_con_substream_ds[substream->number] = NULL;
796
return 0;
797
}
798
799
static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
800
{
801
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
802
803
ice->capture_con_substream = NULL;
804
return 0;
805
}
806
807
static const struct snd_pcm_ops snd_ice1712_playback_ops = {
808
.open = snd_ice1712_playback_open,
809
.close = snd_ice1712_playback_close,
810
.prepare = snd_ice1712_playback_prepare,
811
.trigger = snd_ice1712_playback_trigger,
812
.pointer = snd_ice1712_playback_pointer,
813
};
814
815
static const struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
816
.open = snd_ice1712_playback_ds_open,
817
.close = snd_ice1712_playback_ds_close,
818
.prepare = snd_ice1712_playback_ds_prepare,
819
.trigger = snd_ice1712_playback_ds_trigger,
820
.pointer = snd_ice1712_playback_ds_pointer,
821
};
822
823
static const struct snd_pcm_ops snd_ice1712_capture_ops = {
824
.open = snd_ice1712_capture_open,
825
.close = snd_ice1712_capture_close,
826
.prepare = snd_ice1712_capture_prepare,
827
.trigger = snd_ice1712_capture_trigger,
828
.pointer = snd_ice1712_capture_pointer,
829
};
830
831
static int snd_ice1712_pcm(struct snd_ice1712 *ice, int device)
832
{
833
struct snd_pcm *pcm;
834
int err;
835
836
err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
837
if (err < 0)
838
return err;
839
840
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
841
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
842
843
pcm->private_data = ice;
844
pcm->info_flags = 0;
845
strscpy(pcm->name, "ICE1712 consumer");
846
ice->pcm = pcm;
847
848
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
849
&ice->pci->dev, 64*1024, 64*1024);
850
851
dev_warn(ice->card->dev,
852
"Consumer PCM code does not work well at the moment --jk\n");
853
854
return 0;
855
}
856
857
static int snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device)
858
{
859
struct snd_pcm *pcm;
860
int err;
861
862
err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
863
if (err < 0)
864
return err;
865
866
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
867
868
pcm->private_data = ice;
869
pcm->info_flags = 0;
870
strscpy(pcm->name, "ICE1712 consumer (DS)");
871
ice->pcm_ds = pcm;
872
873
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
874
&ice->pci->dev, 64*1024, 128*1024);
875
876
return 0;
877
}
878
879
/*
880
* PCM code - professional part (multitrack)
881
*/
882
883
static const unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
884
32000, 44100, 48000, 64000, 88200, 96000 };
885
886
static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
887
.count = ARRAY_SIZE(rates),
888
.list = rates,
889
.mask = 0,
890
};
891
892
static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
893
int cmd)
894
{
895
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
896
switch (cmd) {
897
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
898
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
899
{
900
unsigned int what;
901
unsigned int old;
902
if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
903
return -EINVAL;
904
what = ICE1712_PLAYBACK_PAUSE;
905
snd_pcm_trigger_done(substream, substream);
906
guard(spinlock)(&ice->reg_lock);
907
old = inl(ICEMT(ice, PLAYBACK_CONTROL));
908
if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
909
old |= what;
910
else
911
old &= ~what;
912
outl(old, ICEMT(ice, PLAYBACK_CONTROL));
913
break;
914
}
915
case SNDRV_PCM_TRIGGER_START:
916
case SNDRV_PCM_TRIGGER_STOP:
917
{
918
unsigned int what = 0;
919
unsigned int old;
920
struct snd_pcm_substream *s;
921
922
snd_pcm_group_for_each_entry(s, substream) {
923
if (s == ice->playback_pro_substream) {
924
what |= ICE1712_PLAYBACK_START;
925
snd_pcm_trigger_done(s, substream);
926
} else if (s == ice->capture_pro_substream) {
927
what |= ICE1712_CAPTURE_START_SHADOW;
928
snd_pcm_trigger_done(s, substream);
929
}
930
}
931
guard(spinlock)(&ice->reg_lock);
932
old = inl(ICEMT(ice, PLAYBACK_CONTROL));
933
if (cmd == SNDRV_PCM_TRIGGER_START)
934
old |= what;
935
else
936
old &= ~what;
937
outl(old, ICEMT(ice, PLAYBACK_CONTROL));
938
break;
939
}
940
default:
941
return -EINVAL;
942
}
943
return 0;
944
}
945
946
/*
947
*/
948
static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
949
{
950
unsigned char val, old;
951
unsigned int i;
952
953
switch (rate) {
954
case 8000: val = 6; break;
955
case 9600: val = 3; break;
956
case 11025: val = 10; break;
957
case 12000: val = 2; break;
958
case 16000: val = 5; break;
959
case 22050: val = 9; break;
960
case 24000: val = 1; break;
961
case 32000: val = 4; break;
962
case 44100: val = 8; break;
963
case 48000: val = 0; break;
964
case 64000: val = 15; break;
965
case 88200: val = 11; break;
966
case 96000: val = 7; break;
967
default:
968
snd_BUG();
969
val = 0;
970
rate = 48000;
971
break;
972
}
973
974
scoped_guard(spinlock_irqsave, &ice->reg_lock) {
975
if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
976
ICE1712_PLAYBACK_PAUSE|
977
ICE1712_PLAYBACK_START))
978
return;
979
if (!force && is_pro_rate_locked(ice))
980
return;
981
982
old = inb(ICEMT(ice, RATE));
983
if (!force && old == val)
984
return;
985
986
ice->cur_rate = rate;
987
outb(val, ICEMT(ice, RATE));
988
}
989
990
if (ice->gpio.set_pro_rate)
991
ice->gpio.set_pro_rate(ice, rate);
992
for (i = 0; i < ice->akm_codecs; i++) {
993
if (ice->akm[i].ops.set_rate_val)
994
ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
995
}
996
if (ice->spdif.ops.setup_rate)
997
ice->spdif.ops.setup_rate(ice, rate);
998
}
999
1000
static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
1001
{
1002
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1003
1004
ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
1005
guard(spinlock_irq)(&ice->reg_lock);
1006
outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
1007
outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
1008
outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
1009
1010
return 0;
1011
}
1012
1013
static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
1014
struct snd_pcm_hw_params *hw_params)
1015
{
1016
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1017
1018
snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1019
return 0;
1020
}
1021
1022
static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
1023
{
1024
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1025
1026
ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
1027
guard(spinlock_irq)(&ice->reg_lock);
1028
outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
1029
outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
1030
outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
1031
return 0;
1032
}
1033
1034
static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
1035
struct snd_pcm_hw_params *hw_params)
1036
{
1037
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1038
1039
snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1040
return 0;
1041
}
1042
1043
static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
1044
{
1045
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1046
size_t ptr;
1047
1048
if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
1049
return 0;
1050
ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
1051
ptr = bytes_to_frames(substream->runtime, ptr);
1052
if (ptr == substream->runtime->buffer_size)
1053
ptr = 0;
1054
return ptr;
1055
}
1056
1057
static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
1058
{
1059
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1060
size_t ptr;
1061
1062
if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
1063
return 0;
1064
ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
1065
ptr = bytes_to_frames(substream->runtime, ptr);
1066
if (ptr == substream->runtime->buffer_size)
1067
ptr = 0;
1068
return ptr;
1069
}
1070
1071
static const struct snd_pcm_hardware snd_ice1712_playback_pro = {
1072
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1073
SNDRV_PCM_INFO_BLOCK_TRANSFER |
1074
SNDRV_PCM_INFO_MMAP_VALID |
1075
SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1076
.formats = SNDRV_PCM_FMTBIT_S32_LE,
1077
.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1078
.rate_min = 4000,
1079
.rate_max = 96000,
1080
.channels_min = 10,
1081
.channels_max = 10,
1082
.buffer_bytes_max = (256*1024),
1083
.period_bytes_min = 10 * 4 * 2,
1084
.period_bytes_max = 131040,
1085
.periods_min = 1,
1086
.periods_max = 1024,
1087
.fifo_size = 0,
1088
};
1089
1090
static const struct snd_pcm_hardware snd_ice1712_capture_pro = {
1091
.info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1092
SNDRV_PCM_INFO_BLOCK_TRANSFER |
1093
SNDRV_PCM_INFO_MMAP_VALID |
1094
SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1095
.formats = SNDRV_PCM_FMTBIT_S32_LE,
1096
.rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1097
.rate_min = 4000,
1098
.rate_max = 96000,
1099
.channels_min = 12,
1100
.channels_max = 12,
1101
.buffer_bytes_max = (256*1024),
1102
.period_bytes_min = 12 * 4 * 2,
1103
.period_bytes_max = 131040,
1104
.periods_min = 1,
1105
.periods_max = 1024,
1106
.fifo_size = 0,
1107
};
1108
1109
static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
1110
{
1111
struct snd_pcm_runtime *runtime = substream->runtime;
1112
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1113
1114
ice->playback_pro_substream = substream;
1115
runtime->hw = snd_ice1712_playback_pro;
1116
snd_pcm_set_sync(substream);
1117
snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1118
snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1119
if (is_pro_rate_locked(ice)) {
1120
runtime->hw.rate_min = PRO_RATE_DEFAULT;
1121
runtime->hw.rate_max = PRO_RATE_DEFAULT;
1122
}
1123
1124
if (ice->spdif.ops.open)
1125
ice->spdif.ops.open(ice, substream);
1126
1127
return 0;
1128
}
1129
1130
static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
1131
{
1132
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1133
struct snd_pcm_runtime *runtime = substream->runtime;
1134
1135
ice->capture_pro_substream = substream;
1136
runtime->hw = snd_ice1712_capture_pro;
1137
snd_pcm_set_sync(substream);
1138
snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1139
snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1140
if (is_pro_rate_locked(ice)) {
1141
runtime->hw.rate_min = PRO_RATE_DEFAULT;
1142
runtime->hw.rate_max = PRO_RATE_DEFAULT;
1143
}
1144
1145
return 0;
1146
}
1147
1148
static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
1149
{
1150
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1151
1152
if (PRO_RATE_RESET)
1153
snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1154
ice->playback_pro_substream = NULL;
1155
if (ice->spdif.ops.close)
1156
ice->spdif.ops.close(ice, substream);
1157
1158
return 0;
1159
}
1160
1161
static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
1162
{
1163
struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1164
1165
if (PRO_RATE_RESET)
1166
snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1167
ice->capture_pro_substream = NULL;
1168
return 0;
1169
}
1170
1171
static const struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
1172
.open = snd_ice1712_playback_pro_open,
1173
.close = snd_ice1712_playback_pro_close,
1174
.hw_params = snd_ice1712_playback_pro_hw_params,
1175
.prepare = snd_ice1712_playback_pro_prepare,
1176
.trigger = snd_ice1712_pro_trigger,
1177
.pointer = snd_ice1712_playback_pro_pointer,
1178
};
1179
1180
static const struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
1181
.open = snd_ice1712_capture_pro_open,
1182
.close = snd_ice1712_capture_pro_close,
1183
.hw_params = snd_ice1712_capture_pro_hw_params,
1184
.prepare = snd_ice1712_capture_pro_prepare,
1185
.trigger = snd_ice1712_pro_trigger,
1186
.pointer = snd_ice1712_capture_pro_pointer,
1187
};
1188
1189
static int snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device)
1190
{
1191
struct snd_pcm *pcm;
1192
int err;
1193
1194
err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
1195
if (err < 0)
1196
return err;
1197
1198
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
1199
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
1200
1201
pcm->private_data = ice;
1202
pcm->info_flags = 0;
1203
strscpy(pcm->name, "ICE1712 multi");
1204
1205
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1206
&ice->pci->dev, 256*1024, 256*1024);
1207
1208
ice->pcm_pro = pcm;
1209
1210
if (ice->cs8427) {
1211
/* assign channels to iec958 */
1212
err = snd_cs8427_iec958_build(ice->cs8427,
1213
pcm->streams[0].substream,
1214
pcm->streams[1].substream);
1215
if (err < 0)
1216
return err;
1217
}
1218
1219
return snd_ice1712_build_pro_mixer(ice);
1220
}
1221
1222
/*
1223
* Mixer section
1224
*/
1225
1226
static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
1227
{
1228
unsigned int vol = ice->pro_volumes[index];
1229
unsigned short val = 0;
1230
1231
val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
1232
val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
1233
outb(index, ICEMT(ice, MONITOR_INDEX));
1234
outw(val, ICEMT(ice, MONITOR_VOLUME));
1235
}
1236
1237
#define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info
1238
1239
static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1240
{
1241
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1242
int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1243
kcontrol->private_value;
1244
1245
guard(spinlock_irq)(&ice->reg_lock);
1246
ucontrol->value.integer.value[0] =
1247
!((ice->pro_volumes[priv_idx] >> 15) & 1);
1248
ucontrol->value.integer.value[1] =
1249
!((ice->pro_volumes[priv_idx] >> 31) & 1);
1250
return 0;
1251
}
1252
1253
static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1254
{
1255
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1256
int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1257
kcontrol->private_value;
1258
unsigned int nval, change;
1259
1260
nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
1261
(ucontrol->value.integer.value[1] ? 0 : 0x80000000);
1262
guard(spinlock_irq)(&ice->reg_lock);
1263
nval |= ice->pro_volumes[priv_idx] & ~0x80008000;
1264
change = nval != ice->pro_volumes[priv_idx];
1265
ice->pro_volumes[priv_idx] = nval;
1266
snd_ice1712_update_volume(ice, priv_idx);
1267
return change;
1268
}
1269
1270
static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1271
{
1272
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1273
uinfo->count = 2;
1274
uinfo->value.integer.min = 0;
1275
uinfo->value.integer.max = 96;
1276
return 0;
1277
}
1278
1279
static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1280
{
1281
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1282
int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1283
kcontrol->private_value;
1284
1285
guard(spinlock_irq)(&ice->reg_lock);
1286
ucontrol->value.integer.value[0] =
1287
(ice->pro_volumes[priv_idx] >> 0) & 127;
1288
ucontrol->value.integer.value[1] =
1289
(ice->pro_volumes[priv_idx] >> 16) & 127;
1290
return 0;
1291
}
1292
1293
static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1294
{
1295
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1296
int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1297
kcontrol->private_value;
1298
unsigned int nval, change;
1299
1300
nval = (ucontrol->value.integer.value[0] & 127) |
1301
((ucontrol->value.integer.value[1] & 127) << 16);
1302
guard(spinlock_irq)(&ice->reg_lock);
1303
nval |= ice->pro_volumes[priv_idx] & ~0x007f007f;
1304
change = nval != ice->pro_volumes[priv_idx];
1305
ice->pro_volumes[priv_idx] = nval;
1306
snd_ice1712_update_volume(ice, priv_idx);
1307
return change;
1308
}
1309
1310
static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0);
1311
1312
static const struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] = {
1313
{
1314
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1315
.name = "Multi Playback Switch",
1316
.info = snd_ice1712_pro_mixer_switch_info,
1317
.get = snd_ice1712_pro_mixer_switch_get,
1318
.put = snd_ice1712_pro_mixer_switch_put,
1319
.private_value = 0,
1320
.count = 10,
1321
},
1322
{
1323
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1324
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1325
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1326
.name = "Multi Playback Volume",
1327
.info = snd_ice1712_pro_mixer_volume_info,
1328
.get = snd_ice1712_pro_mixer_volume_get,
1329
.put = snd_ice1712_pro_mixer_volume_put,
1330
.private_value = 0,
1331
.count = 10,
1332
.tlv = { .p = db_scale_playback }
1333
},
1334
};
1335
1336
static const struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch = {
1337
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1338
.name = "H/W Multi Capture Switch",
1339
.info = snd_ice1712_pro_mixer_switch_info,
1340
.get = snd_ice1712_pro_mixer_switch_get,
1341
.put = snd_ice1712_pro_mixer_switch_put,
1342
.private_value = 10,
1343
};
1344
1345
static const struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch = {
1346
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1347
.name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH),
1348
.info = snd_ice1712_pro_mixer_switch_info,
1349
.get = snd_ice1712_pro_mixer_switch_get,
1350
.put = snd_ice1712_pro_mixer_switch_put,
1351
.private_value = 18,
1352
.count = 2,
1353
};
1354
1355
static const struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume = {
1356
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1357
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1358
SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1359
.name = "H/W Multi Capture Volume",
1360
.info = snd_ice1712_pro_mixer_volume_info,
1361
.get = snd_ice1712_pro_mixer_volume_get,
1362
.put = snd_ice1712_pro_mixer_volume_put,
1363
.private_value = 10,
1364
.tlv = { .p = db_scale_playback }
1365
};
1366
1367
static const struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume = {
1368
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1369
.name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME),
1370
.info = snd_ice1712_pro_mixer_volume_info,
1371
.get = snd_ice1712_pro_mixer_volume_get,
1372
.put = snd_ice1712_pro_mixer_volume_put,
1373
.private_value = 18,
1374
.count = 2,
1375
};
1376
1377
static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
1378
{
1379
struct snd_card *card = ice->card;
1380
unsigned int idx;
1381
int err;
1382
1383
/* multi-channel mixer */
1384
for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
1385
err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
1386
if (err < 0)
1387
return err;
1388
}
1389
1390
if (ice->num_total_adcs > 0) {
1391
struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
1392
tmp.count = ice->num_total_adcs;
1393
err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1394
if (err < 0)
1395
return err;
1396
}
1397
1398
err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
1399
if (err < 0)
1400
return err;
1401
1402
if (ice->num_total_adcs > 0) {
1403
struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
1404
tmp.count = ice->num_total_adcs;
1405
err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1406
if (err < 0)
1407
return err;
1408
}
1409
1410
err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
1411
if (err < 0)
1412
return err;
1413
1414
/* initialize volumes */
1415
for (idx = 0; idx < 10; idx++) {
1416
ice->pro_volumes[idx] = 0x80008000; /* mute */
1417
snd_ice1712_update_volume(ice, idx);
1418
}
1419
for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
1420
ice->pro_volumes[idx] = 0x80008000; /* mute */
1421
snd_ice1712_update_volume(ice, idx);
1422
}
1423
for (idx = 18; idx < 20; idx++) {
1424
ice->pro_volumes[idx] = 0x80008000; /* mute */
1425
snd_ice1712_update_volume(ice, idx);
1426
}
1427
return 0;
1428
}
1429
1430
static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
1431
{
1432
struct snd_ice1712 *ice = ac97->private_data;
1433
ice->ac97 = NULL;
1434
}
1435
1436
static int snd_ice1712_ac97_mixer(struct snd_ice1712 *ice)
1437
{
1438
int err, bus_num = 0;
1439
struct snd_ac97_template ac97;
1440
struct snd_ac97_bus *pbus;
1441
static const struct snd_ac97_bus_ops con_ops = {
1442
.write = snd_ice1712_ac97_write,
1443
.read = snd_ice1712_ac97_read,
1444
};
1445
static const struct snd_ac97_bus_ops pro_ops = {
1446
.write = snd_ice1712_pro_ac97_write,
1447
.read = snd_ice1712_pro_ac97_read,
1448
};
1449
1450
if (ice_has_con_ac97(ice)) {
1451
err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus);
1452
if (err < 0)
1453
return err;
1454
memset(&ac97, 0, sizeof(ac97));
1455
ac97.private_data = ice;
1456
ac97.private_free = snd_ice1712_mixer_free_ac97;
1457
err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1458
if (err < 0)
1459
dev_warn(ice->card->dev,
1460
"cannot initialize ac97 for consumer, skipped\n");
1461
else {
1462
return snd_ctl_add(ice->card,
1463
snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97,
1464
ice));
1465
}
1466
}
1467
1468
if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
1469
err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus);
1470
if (err < 0)
1471
return err;
1472
memset(&ac97, 0, sizeof(ac97));
1473
ac97.private_data = ice;
1474
ac97.private_free = snd_ice1712_mixer_free_ac97;
1475
err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1476
if (err < 0)
1477
dev_warn(ice->card->dev,
1478
"cannot initialize pro ac97, skipped\n");
1479
else
1480
return 0;
1481
}
1482
/* I2S mixer only */
1483
strcat(ice->card->mixername, "ICE1712 - multitrack");
1484
return 0;
1485
}
1486
1487
/*
1488
*
1489
*/
1490
1491
static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
1492
{
1493
return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
1494
}
1495
1496
static void snd_ice1712_proc_read(struct snd_info_entry *entry,
1497
struct snd_info_buffer *buffer)
1498
{
1499
struct snd_ice1712 *ice = entry->private_data;
1500
unsigned int idx;
1501
1502
snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1503
snd_iprintf(buffer, "EEPROM:\n");
1504
1505
snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1506
snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1507
snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1508
snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
1509
snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
1510
snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
1511
snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
1512
snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1513
snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1514
snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1515
snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
1516
snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
1517
snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
1518
snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
1519
for (idx = 0; idx < 4; idx++)
1520
snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
1521
for (idx = 0; idx < 4; idx++)
1522
snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
1523
for (idx = 0x1c; idx < ice->eeprom.size; idx++)
1524
snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1525
1526
snd_iprintf(buffer, "\nRegisters:\n");
1527
snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
1528
snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
1529
snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
1530
snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
1531
snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
1532
snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
1533
snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
1534
}
1535
1536
static void snd_ice1712_proc_init(struct snd_ice1712 *ice)
1537
{
1538
snd_card_ro_proc_new(ice->card, "ice1712", ice, snd_ice1712_proc_read);
1539
}
1540
1541
/*
1542
*
1543
*/
1544
1545
static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
1546
struct snd_ctl_elem_info *uinfo)
1547
{
1548
uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1549
uinfo->count = sizeof(struct snd_ice1712_eeprom);
1550
return 0;
1551
}
1552
1553
static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
1554
struct snd_ctl_elem_value *ucontrol)
1555
{
1556
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1557
1558
memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1559
return 0;
1560
}
1561
1562
static const struct snd_kcontrol_new snd_ice1712_eeprom = {
1563
.iface = SNDRV_CTL_ELEM_IFACE_CARD,
1564
.name = "ICE1712 EEPROM",
1565
.access = SNDRV_CTL_ELEM_ACCESS_READ,
1566
.info = snd_ice1712_eeprom_info,
1567
.get = snd_ice1712_eeprom_get
1568
};
1569
1570
/*
1571
*/
1572
static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
1573
struct snd_ctl_elem_info *uinfo)
1574
{
1575
uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1576
uinfo->count = 1;
1577
return 0;
1578
}
1579
1580
static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
1581
struct snd_ctl_elem_value *ucontrol)
1582
{
1583
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1584
if (ice->spdif.ops.default_get)
1585
ice->spdif.ops.default_get(ice, ucontrol);
1586
return 0;
1587
}
1588
1589
static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
1590
struct snd_ctl_elem_value *ucontrol)
1591
{
1592
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1593
if (ice->spdif.ops.default_put)
1594
return ice->spdif.ops.default_put(ice, ucontrol);
1595
return 0;
1596
}
1597
1598
static const struct snd_kcontrol_new snd_ice1712_spdif_default =
1599
{
1600
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
1601
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1602
.info = snd_ice1712_spdif_info,
1603
.get = snd_ice1712_spdif_default_get,
1604
.put = snd_ice1712_spdif_default_put
1605
};
1606
1607
static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1608
struct snd_ctl_elem_value *ucontrol)
1609
{
1610
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1611
if (ice->spdif.ops.default_get) {
1612
ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1613
IEC958_AES0_PROFESSIONAL |
1614
IEC958_AES0_CON_NOT_COPYRIGHT |
1615
IEC958_AES0_CON_EMPHASIS;
1616
ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1617
IEC958_AES1_CON_CATEGORY;
1618
ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1619
} else {
1620
ucontrol->value.iec958.status[0] = 0xff;
1621
ucontrol->value.iec958.status[1] = 0xff;
1622
ucontrol->value.iec958.status[2] = 0xff;
1623
ucontrol->value.iec958.status[3] = 0xff;
1624
ucontrol->value.iec958.status[4] = 0xff;
1625
}
1626
return 0;
1627
}
1628
1629
static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1630
struct snd_ctl_elem_value *ucontrol)
1631
{
1632
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1633
if (ice->spdif.ops.default_get) {
1634
ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1635
IEC958_AES0_PROFESSIONAL |
1636
IEC958_AES0_PRO_FS |
1637
IEC958_AES0_PRO_EMPHASIS;
1638
ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
1639
} else {
1640
ucontrol->value.iec958.status[0] = 0xff;
1641
ucontrol->value.iec958.status[1] = 0xff;
1642
ucontrol->value.iec958.status[2] = 0xff;
1643
ucontrol->value.iec958.status[3] = 0xff;
1644
ucontrol->value.iec958.status[4] = 0xff;
1645
}
1646
return 0;
1647
}
1648
1649
static const struct snd_kcontrol_new snd_ice1712_spdif_maskc =
1650
{
1651
.access = SNDRV_CTL_ELEM_ACCESS_READ,
1652
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
1653
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1654
.info = snd_ice1712_spdif_info,
1655
.get = snd_ice1712_spdif_maskc_get,
1656
};
1657
1658
static const struct snd_kcontrol_new snd_ice1712_spdif_maskp =
1659
{
1660
.access = SNDRV_CTL_ELEM_ACCESS_READ,
1661
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
1662
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1663
.info = snd_ice1712_spdif_info,
1664
.get = snd_ice1712_spdif_maskp_get,
1665
};
1666
1667
static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
1668
struct snd_ctl_elem_value *ucontrol)
1669
{
1670
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1671
if (ice->spdif.ops.stream_get)
1672
ice->spdif.ops.stream_get(ice, ucontrol);
1673
return 0;
1674
}
1675
1676
static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
1677
struct snd_ctl_elem_value *ucontrol)
1678
{
1679
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1680
if (ice->spdif.ops.stream_put)
1681
return ice->spdif.ops.stream_put(ice, ucontrol);
1682
return 0;
1683
}
1684
1685
static const struct snd_kcontrol_new snd_ice1712_spdif_stream =
1686
{
1687
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1688
SNDRV_CTL_ELEM_ACCESS_INACTIVE),
1689
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
1690
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1691
.info = snd_ice1712_spdif_info,
1692
.get = snd_ice1712_spdif_stream_get,
1693
.put = snd_ice1712_spdif_stream_put
1694
};
1695
1696
int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
1697
struct snd_ctl_elem_value *ucontrol)
1698
{
1699
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1700
unsigned char mask = kcontrol->private_value & 0xff;
1701
int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1702
1703
snd_ice1712_save_gpio_status(ice);
1704
ucontrol->value.integer.value[0] =
1705
(snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
1706
snd_ice1712_restore_gpio_status(ice);
1707
return 0;
1708
}
1709
1710
int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1711
struct snd_ctl_elem_value *ucontrol)
1712
{
1713
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1714
unsigned char mask = kcontrol->private_value & 0xff;
1715
int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1716
unsigned int val, nval;
1717
1718
if (kcontrol->private_value & (1 << 31))
1719
return -EPERM;
1720
nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
1721
snd_ice1712_save_gpio_status(ice);
1722
val = snd_ice1712_gpio_read(ice);
1723
nval |= val & ~mask;
1724
if (val != nval)
1725
snd_ice1712_gpio_write(ice, nval);
1726
snd_ice1712_restore_gpio_status(ice);
1727
return val != nval;
1728
}
1729
1730
/*
1731
* rate
1732
*/
1733
static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1734
struct snd_ctl_elem_info *uinfo)
1735
{
1736
static const char * const texts[] = {
1737
"8000", /* 0: 6 */
1738
"9600", /* 1: 3 */
1739
"11025", /* 2: 10 */
1740
"12000", /* 3: 2 */
1741
"16000", /* 4: 5 */
1742
"22050", /* 5: 9 */
1743
"24000", /* 6: 1 */
1744
"32000", /* 7: 4 */
1745
"44100", /* 8: 8 */
1746
"48000", /* 9: 0 */
1747
"64000", /* 10: 15 */
1748
"88200", /* 11: 11 */
1749
"96000", /* 12: 7 */
1750
"IEC958 Input", /* 13: -- */
1751
};
1752
return snd_ctl_enum_info(uinfo, 1, 14, texts);
1753
}
1754
1755
static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1756
struct snd_ctl_elem_value *ucontrol)
1757
{
1758
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1759
static const unsigned char xlate[16] = {
1760
9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
1761
};
1762
unsigned char val;
1763
1764
guard(spinlock_irq)(&ice->reg_lock);
1765
if (is_spdif_master(ice)) {
1766
ucontrol->value.enumerated.item[0] = 13;
1767
} else {
1768
val = xlate[inb(ICEMT(ice, RATE)) & 15];
1769
if (val == 255) {
1770
snd_BUG();
1771
val = 0;
1772
}
1773
ucontrol->value.enumerated.item[0] = val;
1774
}
1775
return 0;
1776
}
1777
1778
static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1779
struct snd_ctl_elem_value *ucontrol)
1780
{
1781
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1782
static const unsigned int xrate[13] = {
1783
8000, 9600, 11025, 12000, 16000, 22050, 24000,
1784
32000, 44100, 48000, 64000, 88200, 96000
1785
};
1786
unsigned char oval;
1787
int change = 0;
1788
1789
spin_lock_irq(&ice->reg_lock);
1790
oval = inb(ICEMT(ice, RATE));
1791
if (ucontrol->value.enumerated.item[0] == 13) {
1792
outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
1793
} else {
1794
PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1795
spin_unlock_irq(&ice->reg_lock);
1796
snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1797
spin_lock_irq(&ice->reg_lock);
1798
}
1799
change = inb(ICEMT(ice, RATE)) != oval;
1800
spin_unlock_irq(&ice->reg_lock);
1801
1802
if ((oval & ICE1712_SPDIF_MASTER) !=
1803
(inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
1804
snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
1805
1806
return change;
1807
}
1808
1809
static const struct snd_kcontrol_new snd_ice1712_pro_internal_clock = {
1810
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1811
.name = "Multi Track Internal Clock",
1812
.info = snd_ice1712_pro_internal_clock_info,
1813
.get = snd_ice1712_pro_internal_clock_get,
1814
.put = snd_ice1712_pro_internal_clock_put
1815
};
1816
1817
static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
1818
struct snd_ctl_elem_info *uinfo)
1819
{
1820
static const char * const texts[] = {
1821
"8000", /* 0: 6 */
1822
"9600", /* 1: 3 */
1823
"11025", /* 2: 10 */
1824
"12000", /* 3: 2 */
1825
"16000", /* 4: 5 */
1826
"22050", /* 5: 9 */
1827
"24000", /* 6: 1 */
1828
"32000", /* 7: 4 */
1829
"44100", /* 8: 8 */
1830
"48000", /* 9: 0 */
1831
"64000", /* 10: 15 */
1832
"88200", /* 11: 11 */
1833
"96000", /* 12: 7 */
1834
/* "IEC958 Input", 13: -- */
1835
};
1836
return snd_ctl_enum_info(uinfo, 1, 13, texts);
1837
}
1838
1839
static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
1840
struct snd_ctl_elem_value *ucontrol)
1841
{
1842
int val;
1843
static const unsigned int xrate[13] = {
1844
8000, 9600, 11025, 12000, 16000, 22050, 24000,
1845
32000, 44100, 48000, 64000, 88200, 96000
1846
};
1847
1848
for (val = 0; val < 13; val++) {
1849
if (xrate[val] == PRO_RATE_DEFAULT)
1850
break;
1851
}
1852
1853
ucontrol->value.enumerated.item[0] = val;
1854
return 0;
1855
}
1856
1857
static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
1858
struct snd_ctl_elem_value *ucontrol)
1859
{
1860
static const unsigned int xrate[13] = {
1861
8000, 9600, 11025, 12000, 16000, 22050, 24000,
1862
32000, 44100, 48000, 64000, 88200, 96000
1863
};
1864
unsigned char oval;
1865
int change = 0;
1866
1867
oval = PRO_RATE_DEFAULT;
1868
PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1869
change = PRO_RATE_DEFAULT != oval;
1870
1871
return change;
1872
}
1873
1874
static const struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default = {
1875
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1876
.name = "Multi Track Internal Clock Default",
1877
.info = snd_ice1712_pro_internal_clock_default_info,
1878
.get = snd_ice1712_pro_internal_clock_default_get,
1879
.put = snd_ice1712_pro_internal_clock_default_put
1880
};
1881
1882
#define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info
1883
1884
static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1885
struct snd_ctl_elem_value *ucontrol)
1886
{
1887
ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1888
return 0;
1889
}
1890
1891
static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1892
struct snd_ctl_elem_value *ucontrol)
1893
{
1894
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1895
int change = 0, nval;
1896
1897
nval = ucontrol->value.integer.value[0] ? 1 : 0;
1898
guard(spinlock_irq)(&ice->reg_lock);
1899
change = PRO_RATE_LOCKED != nval;
1900
PRO_RATE_LOCKED = nval;
1901
return change;
1902
}
1903
1904
static const struct snd_kcontrol_new snd_ice1712_pro_rate_locking = {
1905
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1906
.name = "Multi Track Rate Locking",
1907
.info = snd_ice1712_pro_rate_locking_info,
1908
.get = snd_ice1712_pro_rate_locking_get,
1909
.put = snd_ice1712_pro_rate_locking_put
1910
};
1911
1912
#define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info
1913
1914
static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
1915
struct snd_ctl_elem_value *ucontrol)
1916
{
1917
ucontrol->value.integer.value[0] = PRO_RATE_RESET;
1918
return 0;
1919
}
1920
1921
static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
1922
struct snd_ctl_elem_value *ucontrol)
1923
{
1924
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1925
int change = 0, nval;
1926
1927
nval = ucontrol->value.integer.value[0] ? 1 : 0;
1928
guard(spinlock_irq)(&ice->reg_lock);
1929
change = PRO_RATE_RESET != nval;
1930
PRO_RATE_RESET = nval;
1931
return change;
1932
}
1933
1934
static const struct snd_kcontrol_new snd_ice1712_pro_rate_reset = {
1935
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1936
.name = "Multi Track Rate Reset",
1937
.info = snd_ice1712_pro_rate_reset_info,
1938
.get = snd_ice1712_pro_rate_reset_get,
1939
.put = snd_ice1712_pro_rate_reset_put
1940
};
1941
1942
/*
1943
* routing
1944
*/
1945
static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
1946
struct snd_ctl_elem_info *uinfo)
1947
{
1948
static const char * const texts[] = {
1949
"PCM Out", /* 0 */
1950
"H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
1951
"H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
1952
"IEC958 In L", "IEC958 In R", /* 9-10 */
1953
"Digital Mixer", /* 11 - optional */
1954
};
1955
int num_items = snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
1956
return snd_ctl_enum_info(uinfo, 1, num_items, texts);
1957
}
1958
1959
static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
1960
struct snd_ctl_elem_value *ucontrol)
1961
{
1962
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1963
int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1964
unsigned int val, cval;
1965
1966
scoped_guard(spinlock_irq, &ice->reg_lock) {
1967
val = inw(ICEMT(ice, ROUTE_PSDOUT03));
1968
cval = inl(ICEMT(ice, ROUTE_CAPTURE));
1969
}
1970
1971
val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
1972
val &= 3;
1973
cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
1974
if (val == 1 && idx < 2)
1975
ucontrol->value.enumerated.item[0] = 11;
1976
else if (val == 2)
1977
ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
1978
else if (val == 3)
1979
ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
1980
else
1981
ucontrol->value.enumerated.item[0] = 0;
1982
return 0;
1983
}
1984
1985
static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
1986
struct snd_ctl_elem_value *ucontrol)
1987
{
1988
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1989
int change, shift;
1990
int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1991
unsigned int val, old_val, nval;
1992
1993
/* update PSDOUT */
1994
if (ucontrol->value.enumerated.item[0] >= 11)
1995
nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
1996
else if (ucontrol->value.enumerated.item[0] >= 9)
1997
nval = 3; /* spdif in */
1998
else if (ucontrol->value.enumerated.item[0] >= 1)
1999
nval = 2; /* analog in */
2000
else
2001
nval = 0; /* pcm */
2002
shift = ((idx % 2) * 8) + ((idx / 2) * 2);
2003
scoped_guard(spinlock_irq, &ice->reg_lock) {
2004
val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2005
val &= ~(0x03 << shift);
2006
val |= nval << shift;
2007
change = val != old_val;
2008
if (change)
2009
outw(val, ICEMT(ice, ROUTE_PSDOUT03));
2010
}
2011
if (nval < 2) /* dig mixer of pcm */
2012
return change;
2013
2014
/* update CAPTURE */
2015
scoped_guard(spinlock_irq, &ice->reg_lock) {
2016
val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
2017
shift = ((idx / 2) * 8) + ((idx % 2) * 4);
2018
if (nval == 2) { /* analog in */
2019
nval = ucontrol->value.enumerated.item[0] - 1;
2020
val &= ~(0x07 << shift);
2021
val |= nval << shift;
2022
} else { /* spdif in */
2023
nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2024
val &= ~(0x08 << shift);
2025
val |= nval << shift;
2026
}
2027
if (val != old_val) {
2028
change = 1;
2029
outl(val, ICEMT(ice, ROUTE_CAPTURE));
2030
}
2031
}
2032
return change;
2033
}
2034
2035
static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2036
struct snd_ctl_elem_value *ucontrol)
2037
{
2038
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2039
int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2040
unsigned int val, cval;
2041
val = inw(ICEMT(ice, ROUTE_SPDOUT));
2042
cval = (val >> (idx * 4 + 8)) & 0x0f;
2043
val = (val >> (idx * 2)) & 0x03;
2044
if (val == 1)
2045
ucontrol->value.enumerated.item[0] = 11;
2046
else if (val == 2)
2047
ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2048
else if (val == 3)
2049
ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2050
else
2051
ucontrol->value.enumerated.item[0] = 0;
2052
return 0;
2053
}
2054
2055
static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2056
struct snd_ctl_elem_value *ucontrol)
2057
{
2058
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2059
int change, shift;
2060
int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2061
unsigned int val, old_val, nval;
2062
2063
/* update SPDOUT */
2064
guard(spinlock_irq)(&ice->reg_lock);
2065
val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
2066
if (ucontrol->value.enumerated.item[0] >= 11)
2067
nval = 1;
2068
else if (ucontrol->value.enumerated.item[0] >= 9)
2069
nval = 3;
2070
else if (ucontrol->value.enumerated.item[0] >= 1)
2071
nval = 2;
2072
else
2073
nval = 0;
2074
shift = idx * 2;
2075
val &= ~(0x03 << shift);
2076
val |= nval << shift;
2077
shift = idx * 4 + 8;
2078
if (nval == 2) {
2079
nval = ucontrol->value.enumerated.item[0] - 1;
2080
val &= ~(0x07 << shift);
2081
val |= nval << shift;
2082
} else if (nval == 3) {
2083
nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2084
val &= ~(0x08 << shift);
2085
val |= nval << shift;
2086
}
2087
change = val != old_val;
2088
if (change)
2089
outw(val, ICEMT(ice, ROUTE_SPDOUT));
2090
return change;
2091
}
2092
2093
static const struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route = {
2094
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2095
.name = "H/W Playback Route",
2096
.info = snd_ice1712_pro_route_info,
2097
.get = snd_ice1712_pro_route_analog_get,
2098
.put = snd_ice1712_pro_route_analog_put,
2099
};
2100
2101
static const struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route = {
2102
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2103
.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
2104
.info = snd_ice1712_pro_route_info,
2105
.get = snd_ice1712_pro_route_spdif_get,
2106
.put = snd_ice1712_pro_route_spdif_put,
2107
.count = 2,
2108
};
2109
2110
2111
static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
2112
struct snd_ctl_elem_info *uinfo)
2113
{
2114
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2115
uinfo->count = 1;
2116
uinfo->value.integer.min = 0;
2117
uinfo->value.integer.max = 255;
2118
return 0;
2119
}
2120
2121
static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
2122
struct snd_ctl_elem_value *ucontrol)
2123
{
2124
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2125
2126
ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
2127
return 0;
2128
}
2129
2130
static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
2131
struct snd_ctl_elem_value *ucontrol)
2132
{
2133
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2134
int change;
2135
2136
guard(spinlock_irq)(&ice->reg_lock);
2137
change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
2138
outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
2139
return change;
2140
}
2141
2142
static const struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate = {
2143
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2144
.name = "Multi Track Volume Rate",
2145
.info = snd_ice1712_pro_volume_rate_info,
2146
.get = snd_ice1712_pro_volume_rate_get,
2147
.put = snd_ice1712_pro_volume_rate_put
2148
};
2149
2150
static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
2151
struct snd_ctl_elem_info *uinfo)
2152
{
2153
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2154
uinfo->count = 22;
2155
uinfo->value.integer.min = 0;
2156
uinfo->value.integer.max = 255;
2157
return 0;
2158
}
2159
2160
static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
2161
struct snd_ctl_elem_value *ucontrol)
2162
{
2163
struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2164
int idx;
2165
2166
guard(spinlock_irq)(&ice->reg_lock);
2167
for (idx = 0; idx < 22; idx++) {
2168
outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
2169
ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
2170
}
2171
return 0;
2172
}
2173
2174
static const struct snd_kcontrol_new snd_ice1712_mixer_pro_peak = {
2175
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
2176
.name = "Multi Track Peak",
2177
.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2178
.info = snd_ice1712_pro_peak_info,
2179
.get = snd_ice1712_pro_peak_get
2180
};
2181
2182
/*
2183
*
2184
*/
2185
2186
/*
2187
* list of available boards
2188
*/
2189
static const struct snd_ice1712_card_info *card_tables[] = {
2190
snd_ice1712_hoontech_cards,
2191
snd_ice1712_delta_cards,
2192
snd_ice1712_ews_cards,
2193
NULL,
2194
};
2195
2196
static unsigned char snd_ice1712_read_i2c(struct snd_ice1712 *ice,
2197
unsigned char dev,
2198
unsigned char addr)
2199
{
2200
long t = 0x10000;
2201
2202
outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
2203
outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
2204
while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
2205
return inb(ICEREG(ice, I2C_DATA));
2206
}
2207
2208
static int snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
2209
const char *modelname)
2210
{
2211
int dev = ICE_I2C_EEPROM_ADDR; /* I2C EEPROM device address */
2212
unsigned int i, size;
2213
const struct snd_ice1712_card_info * const *tbl, *c;
2214
2215
if (!modelname || !*modelname) {
2216
ice->eeprom.subvendor = 0;
2217
if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
2218
ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
2219
(snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
2220
(snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
2221
(snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
2222
if (ice->eeprom.subvendor == 0 ||
2223
ice->eeprom.subvendor == (unsigned int)-1) {
2224
/* invalid subvendor from EEPROM, try the PCI subststem ID instead */
2225
u16 vendor, device;
2226
pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
2227
pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2228
ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
2229
if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
2230
dev_err(ice->card->dev,
2231
"No valid ID is found\n");
2232
return -ENXIO;
2233
}
2234
}
2235
}
2236
for (tbl = card_tables; *tbl; tbl++) {
2237
for (c = *tbl; c->subvendor; c++) {
2238
if (modelname && c->model && !strcmp(modelname, c->model)) {
2239
dev_info(ice->card->dev,
2240
"Using board model %s\n", c->name);
2241
ice->eeprom.subvendor = c->subvendor;
2242
} else if (c->subvendor != ice->eeprom.subvendor)
2243
continue;
2244
if (!c->eeprom_size || !c->eeprom_data)
2245
goto found;
2246
/* if the EEPROM is given by the driver, use it */
2247
dev_dbg(ice->card->dev, "using the defined eeprom..\n");
2248
ice->eeprom.version = 1;
2249
ice->eeprom.size = c->eeprom_size + 6;
2250
memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2251
goto read_skipped;
2252
}
2253
}
2254
dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n",
2255
ice->eeprom.subvendor);
2256
2257
found:
2258
ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
2259
if (ice->eeprom.size < 6)
2260
ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
2261
else if (ice->eeprom.size > 32) {
2262
dev_err(ice->card->dev,
2263
"invalid EEPROM (size = %i)\n", ice->eeprom.size);
2264
return -EIO;
2265
}
2266
ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
2267
if (ice->eeprom.version != 1) {
2268
dev_err(ice->card->dev, "invalid EEPROM version %i\n",
2269
ice->eeprom.version);
2270
/* return -EIO; */
2271
}
2272
size = ice->eeprom.size - 6;
2273
for (i = 0; i < size; i++)
2274
ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
2275
2276
read_skipped:
2277
ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
2278
ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
2279
ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
2280
2281
return 0;
2282
}
2283
2284
2285
2286
static int snd_ice1712_chip_init(struct snd_ice1712 *ice)
2287
{
2288
outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
2289
udelay(200);
2290
outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2291
udelay(200);
2292
if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
2293
!ice->dxr_enable)
2294
/* Set eeprom value to limit active ADCs and DACs to 6;
2295
* Also disable AC97 as no hardware in standard 6fire card/box
2296
* Note: DXR extensions are not currently supported
2297
*/
2298
ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
2299
pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
2300
pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2301
pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2302
pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
2303
if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24 &&
2304
ice->eeprom.subvendor != ICE1712_SUBDEVICE_STAUDIO_ADCIII) {
2305
ice->gpio.write_mask = ice->eeprom.gpiomask;
2306
ice->gpio.direction = ice->eeprom.gpiodir;
2307
snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
2308
ice->eeprom.gpiomask);
2309
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
2310
ice->eeprom.gpiodir);
2311
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2312
ice->eeprom.gpiostate);
2313
} else {
2314
ice->gpio.write_mask = 0xc0;
2315
ice->gpio.direction = 0xff;
2316
snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
2317
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
2318
snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2319
ICE1712_STDSP24_CLOCK_BIT);
2320
}
2321
snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
2322
if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
2323
outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
2324
udelay(100);
2325
outb(0, ICEREG(ice, AC97_CMD));
2326
udelay(200);
2327
snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
2328
}
2329
snd_ice1712_set_pro_rate(ice, 48000, 1);
2330
/* unmask used interrupts */
2331
outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
2332
ICE1712_IRQ_MPU2 : 0) |
2333
((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
2334
ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
2335
ICEREG(ice, IRQMASK));
2336
outb(0x00, ICEMT(ice, IRQ));
2337
2338
return 0;
2339
}
2340
2341
int snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
2342
{
2343
int err;
2344
struct snd_kcontrol *kctl;
2345
2346
if (snd_BUG_ON(!ice->pcm_pro))
2347
return -EIO;
2348
kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice);
2349
kctl->id.device = ice->pcm_pro->device;
2350
err = snd_ctl_add(ice->card, kctl);
2351
if (err < 0)
2352
return err;
2353
kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice);
2354
kctl->id.device = ice->pcm_pro->device;
2355
err = snd_ctl_add(ice->card, kctl);
2356
if (err < 0)
2357
return err;
2358
kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice);
2359
kctl->id.device = ice->pcm_pro->device;
2360
err = snd_ctl_add(ice->card, kctl);
2361
if (err < 0)
2362
return err;
2363
kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice);
2364
kctl->id.device = ice->pcm_pro->device;
2365
err = snd_ctl_add(ice->card, kctl);
2366
if (err < 0)
2367
return err;
2368
ice->spdif.stream_ctl = kctl;
2369
return 0;
2370
}
2371
2372
2373
static int snd_ice1712_build_controls(struct snd_ice1712 *ice)
2374
{
2375
int err;
2376
2377
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
2378
if (err < 0)
2379
return err;
2380
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
2381
if (err < 0)
2382
return err;
2383
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
2384
if (err < 0)
2385
return err;
2386
2387
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
2388
if (err < 0)
2389
return err;
2390
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
2391
if (err < 0)
2392
return err;
2393
2394
if (ice->num_total_dacs > 0) {
2395
struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
2396
tmp.count = ice->num_total_dacs;
2397
err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2398
if (err < 0)
2399
return err;
2400
}
2401
2402
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
2403
if (err < 0)
2404
return err;
2405
2406
err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
2407
if (err < 0)
2408
return err;
2409
return snd_ctl_add(ice->card,
2410
snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
2411
}
2412
2413
static void snd_ice1712_free(struct snd_card *card)
2414
{
2415
struct snd_ice1712 *ice = card->private_data;
2416
2417
if (ice->card_info && ice->card_info->chip_exit)
2418
ice->card_info->chip_exit(ice);
2419
2420
/* mask all interrupts */
2421
outb(ICE1712_MULTI_CAPTURE | ICE1712_MULTI_PLAYBACK, ICEMT(ice, IRQ));
2422
outb(0xff, ICEREG(ice, IRQMASK));
2423
2424
snd_ice1712_akm4xxx_free(ice);
2425
}
2426
2427
static int snd_ice1712_create(struct snd_card *card,
2428
struct pci_dev *pci,
2429
const char *modelname,
2430
int omni,
2431
int cs8427_timeout,
2432
int dxr_enable)
2433
{
2434
struct snd_ice1712 *ice = card->private_data;
2435
int err;
2436
2437
/* enable PCI device */
2438
err = pcim_enable_device(pci);
2439
if (err < 0)
2440
return err;
2441
/* check, if we can restrict PCI DMA transfers to 28 bits */
2442
if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(28))) {
2443
dev_err(card->dev,
2444
"architecture does not support 28bit PCI busmaster DMA\n");
2445
return -ENXIO;
2446
}
2447
2448
ice->omni = omni ? 1 : 0;
2449
if (cs8427_timeout < 1)
2450
cs8427_timeout = 1;
2451
else if (cs8427_timeout > 1000)
2452
cs8427_timeout = 1000;
2453
ice->cs8427_timeout = cs8427_timeout;
2454
ice->dxr_enable = dxr_enable;
2455
spin_lock_init(&ice->reg_lock);
2456
mutex_init(&ice->gpio_mutex);
2457
mutex_init(&ice->i2c_mutex);
2458
mutex_init(&ice->open_mutex);
2459
ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
2460
ice->gpio.get_mask = snd_ice1712_get_gpio_mask;
2461
ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
2462
ice->gpio.get_dir = snd_ice1712_get_gpio_dir;
2463
ice->gpio.set_data = snd_ice1712_set_gpio_data;
2464
ice->gpio.get_data = snd_ice1712_get_gpio_data;
2465
2466
ice->spdif.cs8403_bits =
2467
ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
2468
0x10 | /* no emphasis */
2469
0x20); /* PCM encoder/decoder */
2470
ice->card = card;
2471
ice->pci = pci;
2472
ice->irq = -1;
2473
pci_set_master(pci);
2474
/* disable legacy emulation */
2475
pci_write_config_word(ice->pci, 0x40, 0x807f);
2476
pci_write_config_word(ice->pci, 0x42, 0x0006);
2477
snd_ice1712_proc_init(ice);
2478
2479
err = pcim_request_all_regions(pci, "ICE1712");
2480
if (err < 0)
2481
return err;
2482
ice->port = pci_resource_start(pci, 0);
2483
ice->ddma_port = pci_resource_start(pci, 1);
2484
ice->dmapath_port = pci_resource_start(pci, 2);
2485
ice->profi_port = pci_resource_start(pci, 3);
2486
2487
if (devm_request_irq(&pci->dev, pci->irq, snd_ice1712_interrupt,
2488
IRQF_SHARED, KBUILD_MODNAME, ice)) {
2489
dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
2490
return -EIO;
2491
}
2492
2493
ice->irq = pci->irq;
2494
card->sync_irq = ice->irq;
2495
card->private_free = snd_ice1712_free;
2496
2497
if (snd_ice1712_read_eeprom(ice, modelname) < 0)
2498
return -EIO;
2499
if (snd_ice1712_chip_init(ice) < 0)
2500
return -EIO;
2501
2502
return 0;
2503
}
2504
2505
2506
/*
2507
*
2508
* Registration
2509
*
2510
*/
2511
2512
static struct snd_ice1712_card_info no_matched;
2513
2514
static int snd_ice1712_probe(struct pci_dev *pci,
2515
const struct pci_device_id *pci_id)
2516
{
2517
static int dev;
2518
struct snd_card *card;
2519
struct snd_ice1712 *ice;
2520
int pcm_dev = 0, err;
2521
const struct snd_ice1712_card_info * const *tbl, *c;
2522
2523
if (dev >= SNDRV_CARDS)
2524
return -ENODEV;
2525
if (!enable[dev]) {
2526
dev++;
2527
return -ENOENT;
2528
}
2529
2530
err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2531
sizeof(*ice), &card);
2532
if (err < 0)
2533
return err;
2534
ice = card->private_data;
2535
2536
strscpy(card->driver, "ICE1712");
2537
strscpy(card->shortname, "ICEnsemble ICE1712");
2538
2539
err = snd_ice1712_create(card, pci, model[dev], omni[dev],
2540
cs8427_timeout[dev], dxr_enable[dev]);
2541
if (err < 0)
2542
return err;
2543
2544
for (tbl = card_tables; *tbl; tbl++) {
2545
for (c = *tbl; c->subvendor; c++) {
2546
if (c->subvendor == ice->eeprom.subvendor) {
2547
strscpy(card->shortname, c->name);
2548
if (c->driver) /* specific driver? */
2549
strscpy(card->driver, c->driver);
2550
if (c->chip_init) {
2551
err = c->chip_init(ice);
2552
if (err < 0)
2553
return err;
2554
}
2555
ice->card_info = c;
2556
goto __found;
2557
}
2558
}
2559
}
2560
c = &no_matched;
2561
__found:
2562
2563
err = snd_ice1712_pcm_profi(ice, pcm_dev++);
2564
if (err < 0)
2565
return err;
2566
2567
if (ice_has_con_ac97(ice)) {
2568
err = snd_ice1712_pcm(ice, pcm_dev++);
2569
if (err < 0)
2570
return err;
2571
}
2572
2573
err = snd_ice1712_ac97_mixer(ice);
2574
if (err < 0)
2575
return err;
2576
2577
err = snd_ice1712_build_controls(ice);
2578
if (err < 0)
2579
return err;
2580
2581
if (c->build_controls) {
2582
err = c->build_controls(ice);
2583
if (err < 0)
2584
return err;
2585
}
2586
2587
if (ice_has_con_ac97(ice)) {
2588
err = snd_ice1712_pcm_ds(ice, pcm_dev++);
2589
if (err < 0)
2590
return err;
2591
}
2592
2593
if (!c->no_mpu401) {
2594
err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2595
ICEREG(ice, MPU1_CTRL),
2596
c->mpu401_1_info_flags |
2597
MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
2598
-1, &ice->rmidi[0]);
2599
if (err < 0)
2600
return err;
2601
if (c->mpu401_1_name)
2602
/* Preferred name available in card_info */
2603
snprintf(ice->rmidi[0]->name,
2604
sizeof(ice->rmidi[0]->name),
2605
"%s %d", c->mpu401_1_name, card->number);
2606
2607
if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
2608
/* 2nd port used */
2609
err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
2610
ICEREG(ice, MPU2_CTRL),
2611
c->mpu401_2_info_flags |
2612
MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
2613
-1, &ice->rmidi[1]);
2614
2615
if (err < 0)
2616
return err;
2617
if (c->mpu401_2_name)
2618
/* Preferred name available in card_info */
2619
snprintf(ice->rmidi[1]->name,
2620
sizeof(ice->rmidi[1]->name),
2621
"%s %d", c->mpu401_2_name,
2622
card->number);
2623
}
2624
}
2625
2626
snd_ice1712_set_input_clock_source(ice, 0);
2627
2628
sprintf(card->longname, "%s at 0x%lx, irq %i",
2629
card->shortname, ice->port, ice->irq);
2630
2631
err = snd_card_register(card);
2632
if (err < 0)
2633
return err;
2634
pci_set_drvdata(pci, card);
2635
dev++;
2636
return 0;
2637
}
2638
2639
#ifdef CONFIG_PM_SLEEP
2640
static int snd_ice1712_suspend(struct device *dev)
2641
{
2642
struct snd_card *card = dev_get_drvdata(dev);
2643
struct snd_ice1712 *ice = card->private_data;
2644
2645
if (!ice->pm_suspend_enabled)
2646
return 0;
2647
2648
snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2649
2650
snd_ac97_suspend(ice->ac97);
2651
2652
scoped_guard(spinlock_irq, &ice->reg_lock) {
2653
ice->pm_saved_is_spdif_master = is_spdif_master(ice);
2654
ice->pm_saved_spdif_ctrl = inw(ICEMT(ice, ROUTE_SPDOUT));
2655
ice->pm_saved_route = inw(ICEMT(ice, ROUTE_PSDOUT03));
2656
}
2657
2658
if (ice->pm_suspend)
2659
ice->pm_suspend(ice);
2660
return 0;
2661
}
2662
2663
static int snd_ice1712_resume(struct device *dev)
2664
{
2665
struct snd_card *card = dev_get_drvdata(dev);
2666
struct snd_ice1712 *ice = card->private_data;
2667
int rate;
2668
2669
if (!ice->pm_suspend_enabled)
2670
return 0;
2671
2672
if (ice->cur_rate)
2673
rate = ice->cur_rate;
2674
else
2675
rate = PRO_RATE_DEFAULT;
2676
2677
if (snd_ice1712_chip_init(ice) < 0) {
2678
snd_card_disconnect(card);
2679
return -EIO;
2680
}
2681
2682
ice->cur_rate = rate;
2683
2684
if (ice->pm_resume)
2685
ice->pm_resume(ice);
2686
2687
if (ice->pm_saved_is_spdif_master) {
2688
/* switching to external clock via SPDIF */
2689
scoped_guard(spinlock_irq, &ice->reg_lock) {
2690
outb(inb(ICEMT(ice, RATE)) | ICE1712_SPDIF_MASTER,
2691
ICEMT(ice, RATE));
2692
}
2693
snd_ice1712_set_input_clock_source(ice, 1);
2694
} else {
2695
/* internal on-card clock */
2696
snd_ice1712_set_pro_rate(ice, rate, 1);
2697
snd_ice1712_set_input_clock_source(ice, 0);
2698
}
2699
2700
outw(ice->pm_saved_spdif_ctrl, ICEMT(ice, ROUTE_SPDOUT));
2701
outw(ice->pm_saved_route, ICEMT(ice, ROUTE_PSDOUT03));
2702
2703
snd_ac97_resume(ice->ac97);
2704
2705
snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2706
return 0;
2707
}
2708
2709
static SIMPLE_DEV_PM_OPS(snd_ice1712_pm, snd_ice1712_suspend, snd_ice1712_resume);
2710
#define SND_VT1712_PM_OPS &snd_ice1712_pm
2711
#else
2712
#define SND_VT1712_PM_OPS NULL
2713
#endif /* CONFIG_PM_SLEEP */
2714
2715
static struct pci_driver ice1712_driver = {
2716
.name = KBUILD_MODNAME,
2717
.id_table = snd_ice1712_ids,
2718
.probe = snd_ice1712_probe,
2719
.driver = {
2720
.pm = SND_VT1712_PM_OPS,
2721
},
2722
};
2723
2724
module_pci_driver(ice1712_driver);
2725
2726