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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/sound/pci/oxygen/oxygen.c
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1
// SPDX-License-Identifier: GPL-2.0-only
2
/*
3
* C-Media CMI8788 driver for C-Media's reference design and similar models
4
*
5
* Copyright (c) Clemens Ladisch <[email protected]>
6
*/
7
8
/*
9
* CMI8788:
10
*
11
* SPI 0 -> 1st AK4396 (front)
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* SPI 1 -> 2nd AK4396 (surround)
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* SPI 2 -> 3rd AK4396 (center/LFE)
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* SPI 3 -> WM8785
15
* SPI 4 -> 4th AK4396 (back)
16
*
17
* GPIO 0 -> DFS0 of AK5385
18
* GPIO 1 -> DFS1 of AK5385
19
*
20
* X-Meridian models:
21
* GPIO 4 -> enable extension S/PDIF input
22
* GPIO 6 -> enable on-board S/PDIF input
23
*
24
* Claro models:
25
* GPIO 6 -> S/PDIF from optical (0) or coaxial (1) input
26
* GPIO 8 -> enable headphone amplifier
27
*
28
* CM9780:
29
*
30
* LINE_OUT -> input of ADC
31
*
32
* AUX_IN <- aux
33
* CD_IN <- CD
34
* MIC_IN <- mic
35
*
36
* GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
37
*/
38
39
#include <linux/delay.h>
40
#include <linux/mutex.h>
41
#include <linux/pci.h>
42
#include <linux/module.h>
43
#include <sound/ac97_codec.h>
44
#include <sound/control.h>
45
#include <sound/core.h>
46
#include <sound/info.h>
47
#include <sound/initval.h>
48
#include <sound/pcm.h>
49
#include <sound/pcm_params.h>
50
#include <sound/tlv.h>
51
#include "oxygen.h"
52
#include "xonar_dg.h"
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#include "ak4396.h"
54
#include "wm8785.h"
55
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MODULE_AUTHOR("Clemens Ladisch <[email protected]>");
57
MODULE_DESCRIPTION("C-Media CMI8788 driver");
58
MODULE_LICENSE("GPL v2");
59
60
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
61
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
62
static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
63
64
module_param_array(index, int, NULL, 0444);
65
MODULE_PARM_DESC(index, "card index");
66
module_param_array(id, charp, NULL, 0444);
67
MODULE_PARM_DESC(id, "ID string");
68
module_param_array(enable, bool, NULL, 0444);
69
MODULE_PARM_DESC(enable, "enable card");
70
71
enum {
72
MODEL_CMEDIA_REF,
73
MODEL_MERIDIAN,
74
MODEL_MERIDIAN_2G,
75
MODEL_CLARO,
76
MODEL_CLARO_HALO,
77
MODEL_FANTASIA,
78
MODEL_SERENADE,
79
MODEL_2CH_OUTPUT,
80
MODEL_HG2PCI,
81
MODEL_XONAR_DG,
82
MODEL_XONAR_DGX,
83
};
84
85
static const struct pci_device_id oxygen_ids[] = {
86
/* C-Media's reference design */
87
{ OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
88
{ OXYGEN_PCI_SUBID(0x10b0, 0x0217), .driver_data = MODEL_CMEDIA_REF },
89
{ OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
90
{ OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
91
{ OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
92
{ OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
94
{ OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
95
{ OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
96
/* Asus Xonar DG */
97
{ OXYGEN_PCI_SUBID(0x1043, 0x8467), .driver_data = MODEL_XONAR_DG },
98
/* Asus Xonar DGX */
99
{ OXYGEN_PCI_SUBID(0x1043, 0x8521), .driver_data = MODEL_XONAR_DGX },
100
/* PCI 2.0 HD Audio */
101
{ OXYGEN_PCI_SUBID(0x13f6, 0x8782), .driver_data = MODEL_2CH_OUTPUT },
102
/* Kuroutoshikou CMI8787-HG2PCI */
103
{ OXYGEN_PCI_SUBID(0x13f6, 0xffff), .driver_data = MODEL_HG2PCI },
104
/* TempoTec HiFier Fantasia */
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{ OXYGEN_PCI_SUBID(0x14c3, 0x1710), .driver_data = MODEL_FANTASIA },
106
/* TempoTec HiFier Serenade */
107
{ OXYGEN_PCI_SUBID(0x14c3, 0x1711), .driver_data = MODEL_SERENADE },
108
/* AuzenTech X-Meridian */
109
{ OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
110
/* AuzenTech X-Meridian 2G */
111
{ OXYGEN_PCI_SUBID(0x5431, 0x017a), .driver_data = MODEL_MERIDIAN_2G },
112
/* HT-Omega Claro */
113
{ OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
114
/* HT-Omega Claro halo */
115
{ OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
116
{ }
117
};
118
MODULE_DEVICE_TABLE(pci, oxygen_ids);
119
120
121
#define GPIO_AK5385_DFS_MASK 0x0003
122
#define GPIO_AK5385_DFS_NORMAL 0x0000
123
#define GPIO_AK5385_DFS_DOUBLE 0x0001
124
#define GPIO_AK5385_DFS_QUAD 0x0002
125
126
#define GPIO_MERIDIAN_DIG_MASK 0x0050
127
#define GPIO_MERIDIAN_DIG_EXT 0x0010
128
#define GPIO_MERIDIAN_DIG_BOARD 0x0040
129
130
#define GPIO_CLARO_DIG_COAX 0x0040
131
#define GPIO_CLARO_HP 0x0100
132
133
struct generic_data {
134
unsigned int dacs;
135
u8 ak4396_regs[4][5];
136
u16 wm8785_regs[3];
137
};
138
139
static void ak4396_write(struct oxygen *chip, unsigned int codec,
140
u8 reg, u8 value)
141
{
142
/* maps ALSA channel pair number to SPI output */
143
static const u8 codec_spi_map[4] = {
144
0, 1, 2, 4
145
};
146
struct generic_data *data = chip->model_data;
147
148
oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
149
OXYGEN_SPI_DATA_LENGTH_2 |
150
OXYGEN_SPI_CLOCK_160 |
151
(codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
152
OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
153
AK4396_WRITE | (reg << 8) | value);
154
data->ak4396_regs[codec][reg] = value;
155
}
156
157
static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
158
u8 reg, u8 value)
159
{
160
struct generic_data *data = chip->model_data;
161
162
if (value != data->ak4396_regs[codec][reg])
163
ak4396_write(chip, codec, reg, value);
164
}
165
166
static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
167
{
168
struct generic_data *data = chip->model_data;
169
170
oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
171
OXYGEN_SPI_DATA_LENGTH_2 |
172
OXYGEN_SPI_CLOCK_160 |
173
(3 << OXYGEN_SPI_CODEC_SHIFT) |
174
OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
175
(reg << 9) | value);
176
if (reg < ARRAY_SIZE(data->wm8785_regs))
177
data->wm8785_regs[reg] = value;
178
}
179
180
static void ak4396_registers_init(struct oxygen *chip)
181
{
182
struct generic_data *data = chip->model_data;
183
unsigned int i;
184
185
for (i = 0; i < data->dacs; ++i) {
186
ak4396_write(chip, i, AK4396_CONTROL_1,
187
AK4396_DIF_24_MSB | AK4396_RSTN);
188
ak4396_write(chip, i, AK4396_CONTROL_2,
189
data->ak4396_regs[0][AK4396_CONTROL_2]);
190
ak4396_write(chip, i, AK4396_CONTROL_3,
191
AK4396_PCM);
192
ak4396_write(chip, i, AK4396_LCH_ATT,
193
chip->dac_volume[i * 2]);
194
ak4396_write(chip, i, AK4396_RCH_ATT,
195
chip->dac_volume[i * 2 + 1]);
196
}
197
}
198
199
static void ak4396_init(struct oxygen *chip)
200
{
201
struct generic_data *data = chip->model_data;
202
203
data->dacs = chip->model.dac_channels_pcm / 2;
204
data->ak4396_regs[0][AK4396_CONTROL_2] =
205
AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
206
ak4396_registers_init(chip);
207
snd_component_add(chip->card, "AK4396");
208
}
209
210
static void ak5385_init(struct oxygen *chip)
211
{
212
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
213
oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
214
snd_component_add(chip->card, "AK5385");
215
}
216
217
static void wm8785_registers_init(struct oxygen *chip)
218
{
219
struct generic_data *data = chip->model_data;
220
221
wm8785_write(chip, WM8785_R7, 0);
222
wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
223
wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
224
}
225
226
static void wm8785_init(struct oxygen *chip)
227
{
228
struct generic_data *data = chip->model_data;
229
230
data->wm8785_regs[0] =
231
WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
232
data->wm8785_regs[2] = WM8785_HPFR | WM8785_HPFL;
233
wm8785_registers_init(chip);
234
snd_component_add(chip->card, "WM8785");
235
}
236
237
static void generic_init(struct oxygen *chip)
238
{
239
ak4396_init(chip);
240
wm8785_init(chip);
241
}
242
243
static void meridian_init(struct oxygen *chip)
244
{
245
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
246
GPIO_MERIDIAN_DIG_MASK);
247
oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
248
GPIO_MERIDIAN_DIG_BOARD, GPIO_MERIDIAN_DIG_MASK);
249
ak4396_init(chip);
250
ak5385_init(chip);
251
}
252
253
static void claro_enable_hp(struct oxygen *chip)
254
{
255
msleep(300);
256
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
257
oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
258
}
259
260
static void claro_init(struct oxygen *chip)
261
{
262
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
263
oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
264
ak4396_init(chip);
265
wm8785_init(chip);
266
claro_enable_hp(chip);
267
}
268
269
static void claro_halo_init(struct oxygen *chip)
270
{
271
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
272
oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
273
ak4396_init(chip);
274
ak5385_init(chip);
275
claro_enable_hp(chip);
276
}
277
278
static void fantasia_init(struct oxygen *chip)
279
{
280
ak4396_init(chip);
281
snd_component_add(chip->card, "CS5340");
282
}
283
284
static void stereo_output_init(struct oxygen *chip)
285
{
286
ak4396_init(chip);
287
}
288
289
static void generic_cleanup(struct oxygen *chip)
290
{
291
}
292
293
static void claro_disable_hp(struct oxygen *chip)
294
{
295
oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
296
}
297
298
static void claro_cleanup(struct oxygen *chip)
299
{
300
claro_disable_hp(chip);
301
}
302
303
static void claro_suspend(struct oxygen *chip)
304
{
305
claro_disable_hp(chip);
306
}
307
308
static void generic_resume(struct oxygen *chip)
309
{
310
ak4396_registers_init(chip);
311
wm8785_registers_init(chip);
312
}
313
314
static void meridian_resume(struct oxygen *chip)
315
{
316
ak4396_registers_init(chip);
317
}
318
319
static void claro_resume(struct oxygen *chip)
320
{
321
ak4396_registers_init(chip);
322
claro_enable_hp(chip);
323
}
324
325
static void stereo_resume(struct oxygen *chip)
326
{
327
ak4396_registers_init(chip);
328
}
329
330
static void set_ak4396_params(struct oxygen *chip,
331
struct snd_pcm_hw_params *params)
332
{
333
struct generic_data *data = chip->model_data;
334
unsigned int i;
335
u8 value;
336
337
value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
338
if (params_rate(params) <= 54000)
339
value |= AK4396_DFS_NORMAL;
340
else if (params_rate(params) <= 108000)
341
value |= AK4396_DFS_DOUBLE;
342
else
343
value |= AK4396_DFS_QUAD;
344
345
msleep(1); /* wait for the new MCLK to become stable */
346
347
if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
348
for (i = 0; i < data->dacs; ++i) {
349
ak4396_write(chip, i, AK4396_CONTROL_1,
350
AK4396_DIF_24_MSB);
351
ak4396_write(chip, i, AK4396_CONTROL_2, value);
352
ak4396_write(chip, i, AK4396_CONTROL_1,
353
AK4396_DIF_24_MSB | AK4396_RSTN);
354
}
355
}
356
}
357
358
static void update_ak4396_volume(struct oxygen *chip)
359
{
360
struct generic_data *data = chip->model_data;
361
unsigned int i;
362
363
for (i = 0; i < data->dacs; ++i) {
364
ak4396_write_cached(chip, i, AK4396_LCH_ATT,
365
chip->dac_volume[i * 2]);
366
ak4396_write_cached(chip, i, AK4396_RCH_ATT,
367
chip->dac_volume[i * 2 + 1]);
368
}
369
}
370
371
static void update_ak4396_mute(struct oxygen *chip)
372
{
373
struct generic_data *data = chip->model_data;
374
unsigned int i;
375
u8 value;
376
377
value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
378
if (chip->dac_mute)
379
value |= AK4396_SMUTE;
380
for (i = 0; i < data->dacs; ++i)
381
ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
382
}
383
384
static void set_wm8785_params(struct oxygen *chip,
385
struct snd_pcm_hw_params *params)
386
{
387
struct generic_data *data = chip->model_data;
388
unsigned int value;
389
390
value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
391
if (params_rate(params) <= 48000)
392
value |= WM8785_OSR_SINGLE;
393
else if (params_rate(params) <= 96000)
394
value |= WM8785_OSR_DOUBLE;
395
else
396
value |= WM8785_OSR_QUAD;
397
if (value != data->wm8785_regs[0]) {
398
wm8785_write(chip, WM8785_R7, 0);
399
wm8785_write(chip, WM8785_R0, value);
400
wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
401
}
402
}
403
404
static void set_ak5385_params(struct oxygen *chip,
405
struct snd_pcm_hw_params *params)
406
{
407
unsigned int value;
408
409
if (params_rate(params) <= 54000)
410
value = GPIO_AK5385_DFS_NORMAL;
411
else if (params_rate(params) <= 108000)
412
value = GPIO_AK5385_DFS_DOUBLE;
413
else
414
value = GPIO_AK5385_DFS_QUAD;
415
oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
416
value, GPIO_AK5385_DFS_MASK);
417
}
418
419
static void set_no_params(struct oxygen *chip, struct snd_pcm_hw_params *params)
420
{
421
}
422
423
static int rolloff_info(struct snd_kcontrol *ctl,
424
struct snd_ctl_elem_info *info)
425
{
426
static const char *const names[2] = {
427
"Sharp Roll-off", "Slow Roll-off"
428
};
429
430
return snd_ctl_enum_info(info, 1, 2, names);
431
}
432
433
static int rolloff_get(struct snd_kcontrol *ctl,
434
struct snd_ctl_elem_value *value)
435
{
436
struct oxygen *chip = ctl->private_data;
437
struct generic_data *data = chip->model_data;
438
439
value->value.enumerated.item[0] =
440
(data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
441
return 0;
442
}
443
444
static int rolloff_put(struct snd_kcontrol *ctl,
445
struct snd_ctl_elem_value *value)
446
{
447
struct oxygen *chip = ctl->private_data;
448
struct generic_data *data = chip->model_data;
449
unsigned int i;
450
int changed;
451
u8 reg;
452
453
guard(mutex)(&chip->mutex);
454
reg = data->ak4396_regs[0][AK4396_CONTROL_2];
455
if (value->value.enumerated.item[0])
456
reg |= AK4396_SLOW;
457
else
458
reg &= ~AK4396_SLOW;
459
changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
460
if (changed) {
461
for (i = 0; i < data->dacs; ++i)
462
ak4396_write(chip, i, AK4396_CONTROL_2, reg);
463
}
464
return changed;
465
}
466
467
static const struct snd_kcontrol_new rolloff_control = {
468
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
469
.name = "DAC Filter Playback Enum",
470
.info = rolloff_info,
471
.get = rolloff_get,
472
.put = rolloff_put,
473
};
474
475
static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
476
{
477
static const char *const names[2] = {
478
"None", "High-pass Filter"
479
};
480
481
return snd_ctl_enum_info(info, 1, 2, names);
482
}
483
484
static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
485
{
486
struct oxygen *chip = ctl->private_data;
487
struct generic_data *data = chip->model_data;
488
489
value->value.enumerated.item[0] =
490
(data->wm8785_regs[WM8785_R2] & WM8785_HPFR) != 0;
491
return 0;
492
}
493
494
static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
495
{
496
struct oxygen *chip = ctl->private_data;
497
struct generic_data *data = chip->model_data;
498
unsigned int reg;
499
int changed;
500
501
guard(mutex)(&chip->mutex);
502
reg = data->wm8785_regs[WM8785_R2] & ~(WM8785_HPFR | WM8785_HPFL);
503
if (value->value.enumerated.item[0])
504
reg |= WM8785_HPFR | WM8785_HPFL;
505
changed = reg != data->wm8785_regs[WM8785_R2];
506
if (changed)
507
wm8785_write(chip, WM8785_R2, reg);
508
return changed;
509
}
510
511
static const struct snd_kcontrol_new hpf_control = {
512
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
513
.name = "ADC Filter Capture Enum",
514
.info = hpf_info,
515
.get = hpf_get,
516
.put = hpf_put,
517
};
518
519
static int meridian_dig_source_info(struct snd_kcontrol *ctl,
520
struct snd_ctl_elem_info *info)
521
{
522
static const char *const names[2] = { "On-board", "Extension" };
523
524
return snd_ctl_enum_info(info, 1, 2, names);
525
}
526
527
static int claro_dig_source_info(struct snd_kcontrol *ctl,
528
struct snd_ctl_elem_info *info)
529
{
530
static const char *const names[2] = { "Optical", "Coaxial" };
531
532
return snd_ctl_enum_info(info, 1, 2, names);
533
}
534
535
static int meridian_dig_source_get(struct snd_kcontrol *ctl,
536
struct snd_ctl_elem_value *value)
537
{
538
struct oxygen *chip = ctl->private_data;
539
540
value->value.enumerated.item[0] =
541
!!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
542
GPIO_MERIDIAN_DIG_EXT);
543
return 0;
544
}
545
546
static int claro_dig_source_get(struct snd_kcontrol *ctl,
547
struct snd_ctl_elem_value *value)
548
{
549
struct oxygen *chip = ctl->private_data;
550
551
value->value.enumerated.item[0] =
552
!!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
553
GPIO_CLARO_DIG_COAX);
554
return 0;
555
}
556
557
static int meridian_dig_source_put(struct snd_kcontrol *ctl,
558
struct snd_ctl_elem_value *value)
559
{
560
struct oxygen *chip = ctl->private_data;
561
u16 old_reg, new_reg;
562
int changed;
563
564
guard(mutex)(&chip->mutex);
565
old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
566
new_reg = old_reg & ~GPIO_MERIDIAN_DIG_MASK;
567
if (value->value.enumerated.item[0] == 0)
568
new_reg |= GPIO_MERIDIAN_DIG_BOARD;
569
else
570
new_reg |= GPIO_MERIDIAN_DIG_EXT;
571
changed = new_reg != old_reg;
572
if (changed)
573
oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
574
return changed;
575
}
576
577
static int claro_dig_source_put(struct snd_kcontrol *ctl,
578
struct snd_ctl_elem_value *value)
579
{
580
struct oxygen *chip = ctl->private_data;
581
u16 old_reg, new_reg;
582
int changed;
583
584
guard(mutex)(&chip->mutex);
585
old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
586
new_reg = old_reg & ~GPIO_CLARO_DIG_COAX;
587
if (value->value.enumerated.item[0])
588
new_reg |= GPIO_CLARO_DIG_COAX;
589
changed = new_reg != old_reg;
590
if (changed)
591
oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
592
return changed;
593
}
594
595
static const struct snd_kcontrol_new meridian_dig_source_control = {
596
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
597
.name = "IEC958 Source Capture Enum",
598
.info = meridian_dig_source_info,
599
.get = meridian_dig_source_get,
600
.put = meridian_dig_source_put,
601
};
602
603
static const struct snd_kcontrol_new claro_dig_source_control = {
604
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
605
.name = "IEC958 Source Capture Enum",
606
.info = claro_dig_source_info,
607
.get = claro_dig_source_get,
608
.put = claro_dig_source_put,
609
};
610
611
static int generic_mixer_init(struct oxygen *chip)
612
{
613
return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
614
}
615
616
static int generic_wm8785_mixer_init(struct oxygen *chip)
617
{
618
int err;
619
620
err = generic_mixer_init(chip);
621
if (err < 0)
622
return err;
623
err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip));
624
if (err < 0)
625
return err;
626
return 0;
627
}
628
629
static int meridian_mixer_init(struct oxygen *chip)
630
{
631
int err;
632
633
err = generic_mixer_init(chip);
634
if (err < 0)
635
return err;
636
err = snd_ctl_add(chip->card,
637
snd_ctl_new1(&meridian_dig_source_control, chip));
638
if (err < 0)
639
return err;
640
return 0;
641
}
642
643
static int claro_mixer_init(struct oxygen *chip)
644
{
645
int err;
646
647
err = generic_wm8785_mixer_init(chip);
648
if (err < 0)
649
return err;
650
err = snd_ctl_add(chip->card,
651
snd_ctl_new1(&claro_dig_source_control, chip));
652
if (err < 0)
653
return err;
654
return 0;
655
}
656
657
static int claro_halo_mixer_init(struct oxygen *chip)
658
{
659
int err;
660
661
err = generic_mixer_init(chip);
662
if (err < 0)
663
return err;
664
err = snd_ctl_add(chip->card,
665
snd_ctl_new1(&claro_dig_source_control, chip));
666
if (err < 0)
667
return err;
668
return 0;
669
}
670
671
static void dump_ak4396_registers(struct oxygen *chip,
672
struct snd_info_buffer *buffer)
673
{
674
struct generic_data *data = chip->model_data;
675
unsigned int dac, i;
676
677
for (dac = 0; dac < data->dacs; ++dac) {
678
snd_iprintf(buffer, "\nAK4396 %u:", dac + 1);
679
for (i = 0; i < 5; ++i)
680
snd_iprintf(buffer, " %02x", data->ak4396_regs[dac][i]);
681
}
682
snd_iprintf(buffer, "\n");
683
}
684
685
static void dump_wm8785_registers(struct oxygen *chip,
686
struct snd_info_buffer *buffer)
687
{
688
struct generic_data *data = chip->model_data;
689
unsigned int i;
690
691
snd_iprintf(buffer, "\nWM8785:");
692
for (i = 0; i < 3; ++i)
693
snd_iprintf(buffer, " %03x", data->wm8785_regs[i]);
694
snd_iprintf(buffer, "\n");
695
}
696
697
static void dump_oxygen_registers(struct oxygen *chip,
698
struct snd_info_buffer *buffer)
699
{
700
dump_ak4396_registers(chip, buffer);
701
dump_wm8785_registers(chip, buffer);
702
}
703
704
static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
705
706
static const struct oxygen_model model_generic = {
707
.shortname = "C-Media CMI8788",
708
.longname = "C-Media Oxygen HD Audio",
709
.chip = "CMI8788",
710
.init = generic_init,
711
.mixer_init = generic_wm8785_mixer_init,
712
.cleanup = generic_cleanup,
713
.resume = generic_resume,
714
.set_dac_params = set_ak4396_params,
715
.set_adc_params = set_wm8785_params,
716
.update_dac_volume = update_ak4396_volume,
717
.update_dac_mute = update_ak4396_mute,
718
.dump_registers = dump_oxygen_registers,
719
.dac_tlv = ak4396_db_scale,
720
.model_data_size = sizeof(struct generic_data),
721
.device_config = PLAYBACK_0_TO_I2S |
722
PLAYBACK_1_TO_SPDIF |
723
PLAYBACK_2_TO_AC97_1 |
724
CAPTURE_0_FROM_I2S_1 |
725
CAPTURE_1_FROM_SPDIF |
726
CAPTURE_2_FROM_AC97_1 |
727
AC97_CD_INPUT,
728
.dac_channels_pcm = 8,
729
.dac_channels_mixer = 8,
730
.dac_volume_min = 0,
731
.dac_volume_max = 255,
732
.function_flags = OXYGEN_FUNCTION_SPI |
733
OXYGEN_FUNCTION_ENABLE_SPI_4_5,
734
.dac_mclks = OXYGEN_MCLKS(256, 128, 128),
735
.adc_mclks = OXYGEN_MCLKS(256, 256, 128),
736
.dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
737
.adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
738
};
739
740
static int get_oxygen_model(struct oxygen *chip,
741
const struct pci_device_id *id)
742
{
743
static const char *const names[] = {
744
[MODEL_MERIDIAN] = "AuzenTech X-Meridian",
745
[MODEL_MERIDIAN_2G] = "AuzenTech X-Meridian 2G",
746
[MODEL_CLARO] = "HT-Omega Claro",
747
[MODEL_CLARO_HALO] = "HT-Omega Claro halo",
748
[MODEL_FANTASIA] = "TempoTec HiFier Fantasia",
749
[MODEL_SERENADE] = "TempoTec HiFier Serenade",
750
[MODEL_HG2PCI] = "CMI8787-HG2PCI",
751
[MODEL_XONAR_DG] = "Xonar DG",
752
[MODEL_XONAR_DGX] = "Xonar DGX",
753
};
754
755
chip->model = model_generic;
756
switch (id->driver_data) {
757
case MODEL_MERIDIAN:
758
case MODEL_MERIDIAN_2G:
759
chip->model.init = meridian_init;
760
chip->model.mixer_init = meridian_mixer_init;
761
chip->model.resume = meridian_resume;
762
chip->model.set_adc_params = set_ak5385_params;
763
chip->model.dump_registers = dump_ak4396_registers;
764
chip->model.device_config = PLAYBACK_0_TO_I2S |
765
PLAYBACK_1_TO_SPDIF |
766
CAPTURE_0_FROM_I2S_2 |
767
CAPTURE_1_FROM_SPDIF;
768
if (id->driver_data == MODEL_MERIDIAN)
769
chip->model.device_config |= AC97_CD_INPUT;
770
break;
771
case MODEL_CLARO:
772
chip->model.init = claro_init;
773
chip->model.mixer_init = claro_mixer_init;
774
chip->model.cleanup = claro_cleanup;
775
chip->model.suspend = claro_suspend;
776
chip->model.resume = claro_resume;
777
break;
778
case MODEL_CLARO_HALO:
779
chip->model.init = claro_halo_init;
780
chip->model.mixer_init = claro_halo_mixer_init;
781
chip->model.cleanup = claro_cleanup;
782
chip->model.suspend = claro_suspend;
783
chip->model.resume = claro_resume;
784
chip->model.set_adc_params = set_ak5385_params;
785
chip->model.dump_registers = dump_ak4396_registers;
786
chip->model.device_config = PLAYBACK_0_TO_I2S |
787
PLAYBACK_1_TO_SPDIF |
788
CAPTURE_0_FROM_I2S_2 |
789
CAPTURE_1_FROM_SPDIF;
790
break;
791
case MODEL_FANTASIA:
792
case MODEL_SERENADE:
793
case MODEL_2CH_OUTPUT:
794
case MODEL_HG2PCI:
795
chip->model.shortname = "C-Media CMI8787";
796
chip->model.chip = "CMI8787";
797
if (id->driver_data == MODEL_FANTASIA)
798
chip->model.init = fantasia_init;
799
else
800
chip->model.init = stereo_output_init;
801
chip->model.resume = stereo_resume;
802
chip->model.mixer_init = generic_mixer_init;
803
chip->model.set_adc_params = set_no_params;
804
chip->model.dump_registers = dump_ak4396_registers;
805
chip->model.device_config = PLAYBACK_0_TO_I2S |
806
PLAYBACK_1_TO_SPDIF;
807
if (id->driver_data == MODEL_FANTASIA) {
808
chip->model.device_config |= CAPTURE_0_FROM_I2S_1;
809
chip->model.adc_mclks = OXYGEN_MCLKS(256, 128, 128);
810
}
811
chip->model.dac_channels_pcm = 2;
812
chip->model.dac_channels_mixer = 2;
813
break;
814
case MODEL_XONAR_DG:
815
case MODEL_XONAR_DGX:
816
chip->model = model_xonar_dg;
817
break;
818
}
819
if (id->driver_data == MODEL_MERIDIAN ||
820
id->driver_data == MODEL_MERIDIAN_2G ||
821
id->driver_data == MODEL_CLARO_HALO) {
822
chip->model.misc_flags = OXYGEN_MISC_MIDI;
823
chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
824
}
825
if (id->driver_data < ARRAY_SIZE(names) && names[id->driver_data])
826
chip->model.shortname = names[id->driver_data];
827
return 0;
828
}
829
830
static int generic_oxygen_probe(struct pci_dev *pci,
831
const struct pci_device_id *pci_id)
832
{
833
static int dev;
834
int err;
835
836
if (dev >= SNDRV_CARDS)
837
return -ENODEV;
838
if (!enable[dev]) {
839
++dev;
840
return -ENOENT;
841
}
842
err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
843
oxygen_ids, get_oxygen_model);
844
if (err >= 0)
845
++dev;
846
return err;
847
}
848
849
static struct pci_driver oxygen_driver = {
850
.name = KBUILD_MODNAME,
851
.id_table = oxygen_ids,
852
.probe = generic_oxygen_probe,
853
.driver = {
854
.pm = pm_sleep_ptr(&oxygen_pci_pm),
855
},
856
};
857
858
module_pci_driver(oxygen_driver);
859
860