Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
torvalds
GitHub Repository: torvalds/linux
Path: blob/master/tools/perf/arch/powerpc/util/perf_regs.c
29274 views
1
// SPDX-License-Identifier: GPL-2.0
2
#include <errno.h>
3
#include <string.h>
4
#include <regex.h>
5
#include <linux/zalloc.h>
6
7
#include "perf_regs.h"
8
#include "../../../util/perf_regs.h"
9
#include "../../../util/debug.h"
10
#include "../../../util/event.h"
11
#include "../../../util/header.h"
12
#include "../../../perf-sys.h"
13
#include "utils_header.h"
14
15
#include <linux/kernel.h>
16
17
#define PVR_POWER9 0x004E
18
#define PVR_POWER10 0x0080
19
#define PVR_POWER11 0x0082
20
21
static const struct sample_reg sample_reg_masks[] = {
22
SMPL_REG(r0, PERF_REG_POWERPC_R0),
23
SMPL_REG(r1, PERF_REG_POWERPC_R1),
24
SMPL_REG(r2, PERF_REG_POWERPC_R2),
25
SMPL_REG(r3, PERF_REG_POWERPC_R3),
26
SMPL_REG(r4, PERF_REG_POWERPC_R4),
27
SMPL_REG(r5, PERF_REG_POWERPC_R5),
28
SMPL_REG(r6, PERF_REG_POWERPC_R6),
29
SMPL_REG(r7, PERF_REG_POWERPC_R7),
30
SMPL_REG(r8, PERF_REG_POWERPC_R8),
31
SMPL_REG(r9, PERF_REG_POWERPC_R9),
32
SMPL_REG(r10, PERF_REG_POWERPC_R10),
33
SMPL_REG(r11, PERF_REG_POWERPC_R11),
34
SMPL_REG(r12, PERF_REG_POWERPC_R12),
35
SMPL_REG(r13, PERF_REG_POWERPC_R13),
36
SMPL_REG(r14, PERF_REG_POWERPC_R14),
37
SMPL_REG(r15, PERF_REG_POWERPC_R15),
38
SMPL_REG(r16, PERF_REG_POWERPC_R16),
39
SMPL_REG(r17, PERF_REG_POWERPC_R17),
40
SMPL_REG(r18, PERF_REG_POWERPC_R18),
41
SMPL_REG(r19, PERF_REG_POWERPC_R19),
42
SMPL_REG(r20, PERF_REG_POWERPC_R20),
43
SMPL_REG(r21, PERF_REG_POWERPC_R21),
44
SMPL_REG(r22, PERF_REG_POWERPC_R22),
45
SMPL_REG(r23, PERF_REG_POWERPC_R23),
46
SMPL_REG(r24, PERF_REG_POWERPC_R24),
47
SMPL_REG(r25, PERF_REG_POWERPC_R25),
48
SMPL_REG(r26, PERF_REG_POWERPC_R26),
49
SMPL_REG(r27, PERF_REG_POWERPC_R27),
50
SMPL_REG(r28, PERF_REG_POWERPC_R28),
51
SMPL_REG(r29, PERF_REG_POWERPC_R29),
52
SMPL_REG(r30, PERF_REG_POWERPC_R30),
53
SMPL_REG(r31, PERF_REG_POWERPC_R31),
54
SMPL_REG(nip, PERF_REG_POWERPC_NIP),
55
SMPL_REG(msr, PERF_REG_POWERPC_MSR),
56
SMPL_REG(orig_r3, PERF_REG_POWERPC_ORIG_R3),
57
SMPL_REG(ctr, PERF_REG_POWERPC_CTR),
58
SMPL_REG(link, PERF_REG_POWERPC_LINK),
59
SMPL_REG(xer, PERF_REG_POWERPC_XER),
60
SMPL_REG(ccr, PERF_REG_POWERPC_CCR),
61
SMPL_REG(softe, PERF_REG_POWERPC_SOFTE),
62
SMPL_REG(trap, PERF_REG_POWERPC_TRAP),
63
SMPL_REG(dar, PERF_REG_POWERPC_DAR),
64
SMPL_REG(dsisr, PERF_REG_POWERPC_DSISR),
65
SMPL_REG(sier, PERF_REG_POWERPC_SIER),
66
SMPL_REG(mmcra, PERF_REG_POWERPC_MMCRA),
67
SMPL_REG(mmcr0, PERF_REG_POWERPC_MMCR0),
68
SMPL_REG(mmcr1, PERF_REG_POWERPC_MMCR1),
69
SMPL_REG(mmcr2, PERF_REG_POWERPC_MMCR2),
70
SMPL_REG(mmcr3, PERF_REG_POWERPC_MMCR3),
71
SMPL_REG(sier2, PERF_REG_POWERPC_SIER2),
72
SMPL_REG(sier3, PERF_REG_POWERPC_SIER3),
73
SMPL_REG(pmc1, PERF_REG_POWERPC_PMC1),
74
SMPL_REG(pmc2, PERF_REG_POWERPC_PMC2),
75
SMPL_REG(pmc3, PERF_REG_POWERPC_PMC3),
76
SMPL_REG(pmc4, PERF_REG_POWERPC_PMC4),
77
SMPL_REG(pmc5, PERF_REG_POWERPC_PMC5),
78
SMPL_REG(pmc6, PERF_REG_POWERPC_PMC6),
79
SMPL_REG(sdar, PERF_REG_POWERPC_SDAR),
80
SMPL_REG(siar, PERF_REG_POWERPC_SIAR),
81
SMPL_REG_END
82
};
83
84
/* REG or %rREG */
85
#define SDT_OP_REGEX1 "^(%r)?([1-2]?[0-9]|3[0-1])$"
86
87
/* -NUM(REG) or NUM(REG) or -NUM(%rREG) or NUM(%rREG) */
88
#define SDT_OP_REGEX2 "^(\\-)?([0-9]+)\\((%r)?([1-2]?[0-9]|3[0-1])\\)$"
89
90
static regex_t sdt_op_regex1, sdt_op_regex2;
91
92
static int sdt_init_op_regex(void)
93
{
94
static int initialized;
95
int ret = 0;
96
97
if (initialized)
98
return 0;
99
100
ret = regcomp(&sdt_op_regex1, SDT_OP_REGEX1, REG_EXTENDED);
101
if (ret)
102
goto error;
103
104
ret = regcomp(&sdt_op_regex2, SDT_OP_REGEX2, REG_EXTENDED);
105
if (ret)
106
goto free_regex1;
107
108
initialized = 1;
109
return 0;
110
111
free_regex1:
112
regfree(&sdt_op_regex1);
113
error:
114
pr_debug4("Regex compilation error.\n");
115
return ret;
116
}
117
118
/*
119
* Parse OP and convert it into uprobe format, which is, +/-NUM(%gprREG).
120
* Possible variants of OP are:
121
* Format Example
122
* -------------------------
123
* NUM(REG) 48(18)
124
* -NUM(REG) -48(18)
125
* NUM(%rREG) 48(%r18)
126
* -NUM(%rREG) -48(%r18)
127
* REG 18
128
* %rREG %r18
129
* iNUM i0
130
* i-NUM i-1
131
*
132
* SDT marker arguments on Powerpc uses %rREG form with -mregnames flag
133
* and REG form with -mno-regnames. Here REG is general purpose register,
134
* which is in 0 to 31 range.
135
*/
136
int arch_sdt_arg_parse_op(char *old_op, char **new_op)
137
{
138
int ret, new_len;
139
regmatch_t rm[5];
140
char prefix;
141
142
/* Constant argument. Uprobe does not support it */
143
if (old_op[0] == 'i') {
144
pr_debug4("Skipping unsupported SDT argument: %s\n", old_op);
145
return SDT_ARG_SKIP;
146
}
147
148
ret = sdt_init_op_regex();
149
if (ret < 0)
150
return ret;
151
152
if (!regexec(&sdt_op_regex1, old_op, 3, rm, 0)) {
153
/* REG or %rREG --> %gprREG */
154
155
new_len = 5; /* % g p r NULL */
156
new_len += (int)(rm[2].rm_eo - rm[2].rm_so);
157
158
*new_op = zalloc(new_len);
159
if (!*new_op)
160
return -ENOMEM;
161
162
scnprintf(*new_op, new_len, "%%gpr%.*s",
163
(int)(rm[2].rm_eo - rm[2].rm_so), old_op + rm[2].rm_so);
164
} else if (!regexec(&sdt_op_regex2, old_op, 5, rm, 0)) {
165
/*
166
* -NUM(REG) or NUM(REG) or -NUM(%rREG) or NUM(%rREG) -->
167
* +/-NUM(%gprREG)
168
*/
169
prefix = (rm[1].rm_so == -1) ? '+' : '-';
170
171
new_len = 8; /* +/- ( % g p r ) NULL */
172
new_len += (int)(rm[2].rm_eo - rm[2].rm_so);
173
new_len += (int)(rm[4].rm_eo - rm[4].rm_so);
174
175
*new_op = zalloc(new_len);
176
if (!*new_op)
177
return -ENOMEM;
178
179
scnprintf(*new_op, new_len, "%c%.*s(%%gpr%.*s)", prefix,
180
(int)(rm[2].rm_eo - rm[2].rm_so), old_op + rm[2].rm_so,
181
(int)(rm[4].rm_eo - rm[4].rm_so), old_op + rm[4].rm_so);
182
} else {
183
pr_debug4("Skipping unsupported SDT argument: %s\n", old_op);
184
return SDT_ARG_SKIP;
185
}
186
187
return SDT_ARG_VALID;
188
}
189
190
uint64_t arch__intr_reg_mask(void)
191
{
192
struct perf_event_attr attr = {
193
.type = PERF_TYPE_HARDWARE,
194
.config = PERF_COUNT_HW_CPU_CYCLES,
195
.sample_type = PERF_SAMPLE_REGS_INTR,
196
.precise_ip = 1,
197
.disabled = 1,
198
.exclude_kernel = 1,
199
};
200
int fd;
201
u32 version;
202
u64 extended_mask = 0, mask = PERF_REGS_MASK;
203
204
/*
205
* Get the PVR value to set the extended
206
* mask specific to platform.
207
*/
208
version = (((mfspr(SPRN_PVR)) >> 16) & 0xFFFF);
209
if (version == PVR_POWER9)
210
extended_mask = PERF_REG_PMU_MASK_300;
211
else if ((version == PVR_POWER10) || (version == PVR_POWER11))
212
extended_mask = PERF_REG_PMU_MASK_31;
213
else
214
return mask;
215
216
attr.sample_regs_intr = extended_mask;
217
attr.sample_period = 1;
218
event_attr_init(&attr);
219
220
/*
221
* check if the pmu supports perf extended regs, before
222
* returning the register mask to sample.
223
*/
224
fd = sys_perf_event_open(&attr, 0, -1, -1, 0);
225
if (fd != -1) {
226
close(fd);
227
mask |= extended_mask;
228
}
229
return mask;
230
}
231
232
uint64_t arch__user_reg_mask(void)
233
{
234
return PERF_REGS_MASK;
235
}
236
237
const struct sample_reg *arch__sample_reg_masks(void)
238
{
239
return sample_reg_masks;
240
}
241
242