Path: blob/master/tools/perf/arch/powerpc/util/perf_regs.c
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// SPDX-License-Identifier: GPL-2.01#include <errno.h>2#include <string.h>3#include <regex.h>4#include <linux/zalloc.h>56#include "perf_regs.h"7#include "../../../util/perf_regs.h"8#include "../../../util/debug.h"9#include "../../../util/event.h"10#include "../../../util/header.h"11#include "../../../perf-sys.h"12#include "utils_header.h"1314#include <linux/kernel.h>1516#define PVR_POWER9 0x004E17#define PVR_POWER10 0x008018#define PVR_POWER11 0x00821920static const struct sample_reg sample_reg_masks[] = {21SMPL_REG(r0, PERF_REG_POWERPC_R0),22SMPL_REG(r1, PERF_REG_POWERPC_R1),23SMPL_REG(r2, PERF_REG_POWERPC_R2),24SMPL_REG(r3, PERF_REG_POWERPC_R3),25SMPL_REG(r4, PERF_REG_POWERPC_R4),26SMPL_REG(r5, PERF_REG_POWERPC_R5),27SMPL_REG(r6, PERF_REG_POWERPC_R6),28SMPL_REG(r7, PERF_REG_POWERPC_R7),29SMPL_REG(r8, PERF_REG_POWERPC_R8),30SMPL_REG(r9, PERF_REG_POWERPC_R9),31SMPL_REG(r10, PERF_REG_POWERPC_R10),32SMPL_REG(r11, PERF_REG_POWERPC_R11),33SMPL_REG(r12, PERF_REG_POWERPC_R12),34SMPL_REG(r13, PERF_REG_POWERPC_R13),35SMPL_REG(r14, PERF_REG_POWERPC_R14),36SMPL_REG(r15, PERF_REG_POWERPC_R15),37SMPL_REG(r16, PERF_REG_POWERPC_R16),38SMPL_REG(r17, PERF_REG_POWERPC_R17),39SMPL_REG(r18, PERF_REG_POWERPC_R18),40SMPL_REG(r19, PERF_REG_POWERPC_R19),41SMPL_REG(r20, PERF_REG_POWERPC_R20),42SMPL_REG(r21, PERF_REG_POWERPC_R21),43SMPL_REG(r22, PERF_REG_POWERPC_R22),44SMPL_REG(r23, PERF_REG_POWERPC_R23),45SMPL_REG(r24, PERF_REG_POWERPC_R24),46SMPL_REG(r25, PERF_REG_POWERPC_R25),47SMPL_REG(r26, PERF_REG_POWERPC_R26),48SMPL_REG(r27, PERF_REG_POWERPC_R27),49SMPL_REG(r28, PERF_REG_POWERPC_R28),50SMPL_REG(r29, PERF_REG_POWERPC_R29),51SMPL_REG(r30, PERF_REG_POWERPC_R30),52SMPL_REG(r31, PERF_REG_POWERPC_R31),53SMPL_REG(nip, PERF_REG_POWERPC_NIP),54SMPL_REG(msr, PERF_REG_POWERPC_MSR),55SMPL_REG(orig_r3, PERF_REG_POWERPC_ORIG_R3),56SMPL_REG(ctr, PERF_REG_POWERPC_CTR),57SMPL_REG(link, PERF_REG_POWERPC_LINK),58SMPL_REG(xer, PERF_REG_POWERPC_XER),59SMPL_REG(ccr, PERF_REG_POWERPC_CCR),60SMPL_REG(softe, PERF_REG_POWERPC_SOFTE),61SMPL_REG(trap, PERF_REG_POWERPC_TRAP),62SMPL_REG(dar, PERF_REG_POWERPC_DAR),63SMPL_REG(dsisr, PERF_REG_POWERPC_DSISR),64SMPL_REG(sier, PERF_REG_POWERPC_SIER),65SMPL_REG(mmcra, PERF_REG_POWERPC_MMCRA),66SMPL_REG(mmcr0, PERF_REG_POWERPC_MMCR0),67SMPL_REG(mmcr1, PERF_REG_POWERPC_MMCR1),68SMPL_REG(mmcr2, PERF_REG_POWERPC_MMCR2),69SMPL_REG(mmcr3, PERF_REG_POWERPC_MMCR3),70SMPL_REG(sier2, PERF_REG_POWERPC_SIER2),71SMPL_REG(sier3, PERF_REG_POWERPC_SIER3),72SMPL_REG(pmc1, PERF_REG_POWERPC_PMC1),73SMPL_REG(pmc2, PERF_REG_POWERPC_PMC2),74SMPL_REG(pmc3, PERF_REG_POWERPC_PMC3),75SMPL_REG(pmc4, PERF_REG_POWERPC_PMC4),76SMPL_REG(pmc5, PERF_REG_POWERPC_PMC5),77SMPL_REG(pmc6, PERF_REG_POWERPC_PMC6),78SMPL_REG(sdar, PERF_REG_POWERPC_SDAR),79SMPL_REG(siar, PERF_REG_POWERPC_SIAR),80SMPL_REG_END81};8283/* REG or %rREG */84#define SDT_OP_REGEX1 "^(%r)?([1-2]?[0-9]|3[0-1])$"8586/* -NUM(REG) or NUM(REG) or -NUM(%rREG) or NUM(%rREG) */87#define SDT_OP_REGEX2 "^(\\-)?([0-9]+)\\((%r)?([1-2]?[0-9]|3[0-1])\\)$"8889static regex_t sdt_op_regex1, sdt_op_regex2;9091static int sdt_init_op_regex(void)92{93static int initialized;94int ret = 0;9596if (initialized)97return 0;9899ret = regcomp(&sdt_op_regex1, SDT_OP_REGEX1, REG_EXTENDED);100if (ret)101goto error;102103ret = regcomp(&sdt_op_regex2, SDT_OP_REGEX2, REG_EXTENDED);104if (ret)105goto free_regex1;106107initialized = 1;108return 0;109110free_regex1:111regfree(&sdt_op_regex1);112error:113pr_debug4("Regex compilation error.\n");114return ret;115}116117/*118* Parse OP and convert it into uprobe format, which is, +/-NUM(%gprREG).119* Possible variants of OP are:120* Format Example121* -------------------------122* NUM(REG) 48(18)123* -NUM(REG) -48(18)124* NUM(%rREG) 48(%r18)125* -NUM(%rREG) -48(%r18)126* REG 18127* %rREG %r18128* iNUM i0129* i-NUM i-1130*131* SDT marker arguments on Powerpc uses %rREG form with -mregnames flag132* and REG form with -mno-regnames. Here REG is general purpose register,133* which is in 0 to 31 range.134*/135int arch_sdt_arg_parse_op(char *old_op, char **new_op)136{137int ret, new_len;138regmatch_t rm[5];139char prefix;140141/* Constant argument. Uprobe does not support it */142if (old_op[0] == 'i') {143pr_debug4("Skipping unsupported SDT argument: %s\n", old_op);144return SDT_ARG_SKIP;145}146147ret = sdt_init_op_regex();148if (ret < 0)149return ret;150151if (!regexec(&sdt_op_regex1, old_op, 3, rm, 0)) {152/* REG or %rREG --> %gprREG */153154new_len = 5; /* % g p r NULL */155new_len += (int)(rm[2].rm_eo - rm[2].rm_so);156157*new_op = zalloc(new_len);158if (!*new_op)159return -ENOMEM;160161scnprintf(*new_op, new_len, "%%gpr%.*s",162(int)(rm[2].rm_eo - rm[2].rm_so), old_op + rm[2].rm_so);163} else if (!regexec(&sdt_op_regex2, old_op, 5, rm, 0)) {164/*165* -NUM(REG) or NUM(REG) or -NUM(%rREG) or NUM(%rREG) -->166* +/-NUM(%gprREG)167*/168prefix = (rm[1].rm_so == -1) ? '+' : '-';169170new_len = 8; /* +/- ( % g p r ) NULL */171new_len += (int)(rm[2].rm_eo - rm[2].rm_so);172new_len += (int)(rm[4].rm_eo - rm[4].rm_so);173174*new_op = zalloc(new_len);175if (!*new_op)176return -ENOMEM;177178scnprintf(*new_op, new_len, "%c%.*s(%%gpr%.*s)", prefix,179(int)(rm[2].rm_eo - rm[2].rm_so), old_op + rm[2].rm_so,180(int)(rm[4].rm_eo - rm[4].rm_so), old_op + rm[4].rm_so);181} else {182pr_debug4("Skipping unsupported SDT argument: %s\n", old_op);183return SDT_ARG_SKIP;184}185186return SDT_ARG_VALID;187}188189uint64_t arch__intr_reg_mask(void)190{191struct perf_event_attr attr = {192.type = PERF_TYPE_HARDWARE,193.config = PERF_COUNT_HW_CPU_CYCLES,194.sample_type = PERF_SAMPLE_REGS_INTR,195.precise_ip = 1,196.disabled = 1,197.exclude_kernel = 1,198};199int fd;200u32 version;201u64 extended_mask = 0, mask = PERF_REGS_MASK;202203/*204* Get the PVR value to set the extended205* mask specific to platform.206*/207version = (((mfspr(SPRN_PVR)) >> 16) & 0xFFFF);208if (version == PVR_POWER9)209extended_mask = PERF_REG_PMU_MASK_300;210else if ((version == PVR_POWER10) || (version == PVR_POWER11))211extended_mask = PERF_REG_PMU_MASK_31;212else213return mask;214215attr.sample_regs_intr = extended_mask;216attr.sample_period = 1;217event_attr_init(&attr);218219/*220* check if the pmu supports perf extended regs, before221* returning the register mask to sample.222*/223fd = sys_perf_event_open(&attr, 0, -1, -1, 0);224if (fd != -1) {225close(fd);226mask |= extended_mask;227}228return mask;229}230231uint64_t arch__user_reg_mask(void)232{233return PERF_REGS_MASK;234}235236const struct sample_reg *arch__sample_reg_masks(void)237{238return sample_reg_masks;239}240241242