/*****************************************************************************1* cpu-a.S: arm cpu detection2*****************************************************************************3* Copyright (C) 2009-2016 x264 project4*5* Authors: David Conrad <[email protected]>6*7* This program is free software; you can redistribute it and/or modify8* it under the terms of the GNU General Public License as published by9* the Free Software Foundation; either version 2 of the License, or10* (at your option) any later version.11*12* This program is distributed in the hope that it will be useful,13* but WITHOUT ANY WARRANTY; without even the implied warranty of14* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the15* GNU General Public License for more details.16*17* You should have received a copy of the GNU General Public License18* along with this program; if not, write to the Free Software19* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111, USA.20*21* This program is also available under a commercial proprietary license.22* For more information, contact us at [email protected].23*****************************************************************************/2425#include "asm.S"2627.align 22829// done in gas because .fpu neon overrides the refusal to assemble30// instructions the selected -march/-mcpu doesn't support31function x264_cpu_neon_test32vadd.i16 q0, q0, q033bx lr34endfunc3536// return: 0 on success37// 1 if counters were already enabled38// 9 if lo-res counters were already enabled39function x264_cpu_enable_armv7_counter, export=040mrc p15, 0, r2, c9, c12, 0 // read PMNC41ands r0, r2, #142andne r0, r2, #94344orr r2, r2, #1 // enable counters45bic r2, r2, #8 // full resolution46mcreq p15, 0, r2, c9, c12, 0 // write PMNC47mov r2, #1 << 31 // enable cycle counter48mcr p15, 0, r2, c9, c12, 1 // write CNTENS49bx lr50endfunc5152function x264_cpu_disable_armv7_counter, export=053mrc p15, 0, r0, c9, c12, 0 // read PMNC54bic r0, r0, #1 // disable counters55mcr p15, 0, r0, c9, c12, 0 // write PMNC56bx lr57endfunc585960.macro READ_TIME r61mrc p15, 0, \r, c9, c13, 062.endm6364// return: 0 if transfers neon -> arm transfers take more than 10 cycles65// nonzero otherwise66function x264_cpu_fast_neon_mrc_test67// check for user access to performance counters68mrc p15, 0, r0, c9, c14, 069cmp r0, #070bxeq lr7172push {r4-r6,lr}73bl x264_cpu_enable_armv7_counter74ands r1, r0, #875mov r3, #076mov ip, #477mov r6, #478moveq r5, #179movne r5, #648081average_loop:82mov r4, r583READ_TIME r1841: subs r4, r4, #185.rept 886vmov.u32 lr, d0[0]87add lr, lr, lr88.endr89bgt 1b90READ_TIME r29192subs r6, r6, #193sub r2, r2, r194cmpgt r2, #30 << 3 // assume context switch if it took over 30 cycles95addle r3, r3, r296subsle ip, ip, #197bgt average_loop9899// disable counters if we enabled them100ands r0, r0, #1101bleq x264_cpu_disable_armv7_counter102103lsr r0, r3, #5104cmp r0, #10105movgt r0, #0106pop {r4-r6,pc}107endfunc108109110