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/****************************************************************************

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 * checkasm-arm.S: assembly check tool

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 *****************************************************************************

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 * Copyright (C) 2015-2016 x264 project

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 *

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 * Authors: Martin Storsjo <[email protected]>

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 *

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 * This program is free software; you can redistribute it and/or modify

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 * it under the terms of the GNU General Public License as published by

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 * the Free Software Foundation; either version 2 of the License, or

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 * (at your option) any later version.

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 *

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 * This program is distributed in the hope that it will be useful,

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 * but WITHOUT ANY WARRANTY; without even the implied warranty of

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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

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 * GNU General Public License for more details.

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 *

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 * You should have received a copy of the GNU General Public License

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 * along with this program; if not, write to the Free Software

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 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02111, USA.

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 *

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 * This program is also available under a commercial proprietary license.

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 * For more information, contact us at [email protected].

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 *****************************************************************************/

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#include "../common/arm/asm.S"

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.section .rodata

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.align 4

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register_init:

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.quad 0x21f86d66c8ca00ce

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.quad 0x75b6ba21077c48ad

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.quad 0xed56bb2dcb3c7736

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.quad 0x8bda43d3fd1a7e06

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.quad 0xb64a9c9e5d318408

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.quad 0xdf9a54b303f1d3a3

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.quad 0x4a75479abd64e097

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.quad 0x249214109d5d1c88

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error_message:

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.asciz "failed to preserve register"

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.text

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@ max number of args used by any x264 asm function.

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#define MAX_ARGS 15

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#define ARG_STACK 4*(MAX_ARGS - 2)

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.macro clobbercheck variant

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.equ pushed, 4*10

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function x264_checkasm_call_\variant

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    push        {r4-r11, lr}

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.ifc \variant, neon

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    vpush       {q4-q7}

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.equ pushed, pushed + 16*4

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.endif

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    movrel      r12, register_init

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.ifc \variant, neon

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    vldm        r12, {q4-q7}

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.endif

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    ldm         r12, {r4-r11}

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    push        {r1}

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    sub         sp,  sp,  #ARG_STACK

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.equ pos, 0

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.rept MAX_ARGS-2

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    ldr         r12, [sp, #ARG_STACK + pushed + 8 + pos]

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    str         r12, [sp, #pos]

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.equ pos, pos + 4

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.endr

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    mov         r12, r0

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    mov         r0,  r2

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    mov         r1,  r3

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    ldrd        r2,  r3,  [sp, #ARG_STACK + pushed]

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    blx         r12

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    add         sp,  sp,  #ARG_STACK

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    pop         {r2}

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    push        {r0, r1}

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    movrel      r12, register_init

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.ifc \variant, neon

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    vldm        r12, {q0-q3}

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    veor        q0,  q0,  q4

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    veor        q1,  q1,  q5

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    veor        q2,  q2,  q6

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    veor        q3,  q3,  q7

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    vorr        q0,  q0,  q1

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    vorr        q0,  q0,  q2

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    vorr        q0,  q0,  q3

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    vorr        d0,  d0,  d1

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    vrev64.32   d1,  d0

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    vorr        d0,  d0,  d1

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    vmov.32     r3,  d0[0]

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.else

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    mov         r3,  #0

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.endif

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.macro check_reg reg1, reg2=

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    ldrd        r0,  r1,  [r12], #8

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    eor         r0,  r0, \reg1

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    orr         r3,  r3, r0

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.ifnb \reg2

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    eor         r1,  r1, \reg2

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    orr         r3,  r3, r1

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.endif

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.endm

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    check_reg   r4,  r5

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    check_reg   r6,  r7

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@ r9 is a volatile register in the ios ABI

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#if SYS_MACOSX

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    check_reg   r8

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#else

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    check_reg   r8,  r9

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#endif

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    check_reg   r10, r11

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.purgem check_reg

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    cmp         r3,  #0

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    beq         0f

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    mov         r12, #0

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    str         r12, [r2]

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    movrel      r0, error_message

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    blx         X(puts)

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0:

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    pop         {r0, r1}

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.ifc \variant, neon

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    vpop        {q4-q7}

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.endif

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    pop         {r4-r11, pc}

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endfunc

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.endm

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clobbercheck neon

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clobbercheck noneon

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